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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Clock Generators, PLLs, Frequency Synthesizers

Skyworks Solutions Inc. SI5342D-D06391-GMR

Name: SI5342D-D06391-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5342D-D06391-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5342D-D06391-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Clock Generators, PLLs, Frequency Synthesizers

Package:: -

Datasheet:: SI5342D-D06391-GMR.pdf

Description:: IC CLOCK MULTIPLIER ATTENUATOR

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Product details

Overview

SI5342D-D06391-GMR from Skyworks is a 4-input, 2-output jitter attenuating clock multiplier with DSPLL™ and MultiSynth™ architecture, delivering 90 fs rms integrated jitter (12 kHz–20 MHz), programmable jitter attenuation bandwidth (0.1 Hz–4 kHz), and support for SyncE compliance (ITU-T G.8262 EEC Option 1/2). It operates across –40 to +85 °C and targets carrier-grade Ethernet line cards requiring deterministic holdover and hitless input switching.

For engineers reviewing the SI5342D-D06391-GMR datasheet, SI5342D-D06391-GMR pinout, SI5342D-D06391-GMR application, or SI5342D-D06391-GMR equivalent, key selection considerations include its 0.001–350 MHz output range (LVDS/LVPECL/LVCMOS/CML/HCSL), factory-programmed configuration (D variant = integer-only synthesis), 44-QFN 7×7 mm package, and dual-mode operation (locked/holdover) with 120-second frequency history averaging.

Technical Context

The SI5342D-D06391-GMR implements a fourth-generation DSPLL with fully integrated loop filter and digitally programmable loop bandwidth (0.1 Hz–4 kHz), enabling precise jitter filtering without external components. Its MultiSynth dividers support integer-only frequency synthesis (D variant), and the device uses an internal oscillator driven by a 25–54 MHz crystal for free-run/holdover stability.

It features automatic/manual input clock selection across four inputs (IN0–IN3), glitchless and ramped switching between plesiochronous sources, and status monitoring (LOS/OOF/LOL) via dedicated flags and INTRb pin. Output crosspoint routing allows any MultiSynth-generated frequency to drive either of two outputs with independent format and voltage supply configuration.

Key Specifications

Parameter	Value and Actual Design Meaning
Output count	2 independent clock outputs with full crosspoint routing and independent format/voltage control
Jitter (rms)	90 fs (12 kHz–20 MHz), enabling compliance with ITU-T G.8262 EEC Option 1/2 for SyncE applications
Output frequency range	0.001–350 MHz (D variant, integer-only synthesis), supporting 10/40/100 GbE Synchronous Ethernet line rates
Input frequency range	Differential: 8 kHz–750 MHz; LVCMOS: 8 kHz–250 MHz - accommodates SONET/SDH, OTN, and broadcast video reference clocks
Jitter attenuation BW	Digitally programmable 0.1 Hz–4 kHz - allows optimization for wander suppression (low BW) or burst-jitter cleanup (higher BW)
Holdover capability	Uses 120-second averaged historical frequency data with programmable window/delay - minimizes phase disturbance during input failure
Supply voltages	VDD = 1.8 V ±5%; VDDA = 3.3 V ±5%; independent output supply pins (3.3/2.5/1.8 V) - enables mixed-signal board integration

Pinout & Package

SI5342D-D06391-GMR is housed in a 44-pin QFN package (7 mm × 7 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are validated per Skyworks Si5342 Rev D datasheet Section 9 (Pin Descriptions) and Figure 10.2 (44-QFN outline).

Pin/Terminal	Circuit Role	Design Meaning
IN0–IN3	Differential/single-ended clock inputs	Support automatic/manual selection; IN3 serves as FB_IN in zero-delay mode - enables redundancy and multi-source synchronization
OUT0, OUT1	Differential or LVCMOS clock outputs	Configurable signal format (LVDS/LVPECL/LVCMOS/CML/HCSL), amplitude, common-mode voltage, and polarity - eliminates need for external level-shifting
XA/XB	Crytal/resonator connection	Internal load capacitors eliminate external caps; supports 25–54 MHz XTAL - reduces BOM count and PCB noise coupling
VDD, VDDA	Digital/analog core supplies	1.8 V digital rail and 3.3 V analog rail - isolates noise-sensitive PLL circuitry from logic domains
INTRb	Interrupt output	Open-drain flag for LOS/OOF/LOL events - enables real-time fault detection without polling serial interface
SCL/SDA or SCLK/SDIO	I²C or SPI interface	Two-wire or four-wire serial control with NVM storage - ensures known startup configuration without host initialization

Key Features

Feature	Design Value
Hitless input switching	Eliminates phase transients when switching between fractionally related clocks (e.g., 155.52 MHz ↔ 622.08 MHz), preserving system timing integrity
Ramped holdover exit	Linear frequency ramp (0.2–40,000 ppm/s) from holdover to locked state - prevents overshoot in SyncE recovery scenarios
Programmable DCO mode	0.001 ppb step size for fine frequency tuning via FINC/FDEC pins or register - supports IEEE 1588 PTP slave clock alignment
Glitchless input switching	Supports ±500 ppm input frequency delta without output discontinuity - enables seamless failover between OCXO and TCXO references
Status monitoring	Independent LOS (input), OOF (reference), LOL (DSPLL lock) flags with interrupt assertion - simplifies system-level fault diagnostics

Applications

OTN Muxponder	SyncE Line Card
Use Scenario: Aggregating multiple client-side 10G/100G signals into a single OTN-framed line-side interface with strict jitter mask compliance. IC Role / Device Role / Timing Role: Jitter attenuator and clock multiplier generating low-jitter 155.52 MHz, 622.08 MHz, and 2.488 GHz line clocks from a gapped or degraded reference. Use Value: Meets ITU-T G.783/G.8251 jitter transfer/accumulation requirements while enabling hitless switchover between primary/backup timing sources.	Use Scenario: Carrier Ethernet switch supporting Synchronous Ethernet (SyncE) with EEC Option 1/2 compliance and holdover stability <±4.6 ppm over 24 hours. IC Role / Device Role / Timing Role: Primary timing IC providing dual synchronized outputs for PHY and MAC layers, with autonomous holdover using 120-second frequency history. Use Value: Eliminates need for external loop filter components and delivers 90 fs rms jitter - exceeding GR-253-CORE Phase Noise Class 3 requirements.
Broadcast Video Router	Test & Measurement Instrument
Use Scenario: Genlock-capable SDI video router requiring sub-ns phase alignment across 16+ outputs and tolerance to intermittent reference loss. IC Role / Device Role / Timing Role: Jitter-cleaned master clock generator synchronizing SMPTE 2081-10/2082-10 compliant interfaces with zero-delay feedback path. Use Value: Supports gapped clock locking and ramped input switching - maintains stable video timing during reference transitions without frame glitches.	Use Scenario: High-precision signal analyzer needing ultra-low-jitter sampling clocks (100–350 MHz) with programmable frequency agility and traceable calibration paths. IC Role / Device Role / Timing Role: Reconfigurable clock source with DCO mode (0.001 ppb steps) and independent output supply rails for isolated analog/digital domains. Use Value: Enables on-the-fly frequency sweeps and phase-coherent multi-tone generation without external synthesizers or PLL relock delays.

OTN Muxponder

SyncE Line Card

Use Scenario: Aggregating multiple client-side 10G/100G signals into a single OTN-framed line-side interface with strict jitter mask compliance.

IC Role / Device Role / Timing Role: Jitter attenuator and clock multiplier generating low-jitter 155.52 MHz, 622.08 MHz, and 2.488 GHz line clocks from a gapped or degraded reference.

Use Value: Meets ITU-T G.783/G.8251 jitter transfer/accumulation requirements while enabling hitless switchover between primary/backup timing sources.

Use Scenario: Carrier Ethernet switch supporting Synchronous Ethernet (SyncE) with EEC Option 1/2 compliance and holdover stability <±4.6 ppm over 24 hours.

IC Role / Device Role / Timing Role: Primary timing IC providing dual synchronized outputs for PHY and MAC layers, with autonomous holdover using 120-second frequency history.

Use Value: Eliminates need for external loop filter components and delivers 90 fs rms jitter - exceeding GR-253-CORE Phase Noise Class 3 requirements.

Broadcast Video Router

Test & Measurement Instrument

Use Scenario: Genlock-capable SDI video router requiring sub-ns phase alignment across 16+ outputs and tolerance to intermittent reference loss.

IC Role / Device Role / Timing Role: Jitter-cleaned master clock generator synchronizing SMPTE 2081-10/2082-10 compliant interfaces with zero-delay feedback path.

Use Value: Supports gapped clock locking and ramped input switching - maintains stable video timing during reference transitions without frame glitches.

Use Scenario: High-precision signal analyzer needing ultra-low-jitter sampling clocks (100–350 MHz) with programmable frequency agility and traceable calibration paths.

IC Role / Device Role / Timing Role: Reconfigurable clock source with DCO mode (0.001 ppb steps) and independent output supply rails for isolated analog/digital domains.

Use Value: Enables on-the-fly frequency sweeps and phase-coherent multi-tone generation without external synthesizers or PLL relock delays.

Equivalent & Alternatives

The following parts are listed as comparable options for similar jitter attenuator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5342C-D-GM1	Same 44-QFN package and 2-output count, but supports fractional synthesis (0.001–1028 MHz output range)	Required where arbitrary frequencies (e.g., 122.88 MHz, 307.2 MHz) beyond 350 MHz are needed for RF sampling or CPRI	Select Si5342C-D-GM1 only if fractional synthesis and >350 MHz output capability are mandatory; SI5342D-D06391-GMR offers lower cost and optimized jitter for integer-based SyncE/OTN use cases
LMK04832ISQE/NOPB	2-input/12-output, dual-loop architecture with integrated LDOs; higher power (1.2 W vs. 0.45 W); no NVM	Preferred in systems requiring >2 outputs, ultra-low additive jitter (<30 fs), or integrated power regulation for noise-sensitive ADC/DAC clocks	Choose LMK04832ISQE/NOPB for multi-output, low-noise instrumentation; SI5342D-D06391-GMR is optimal for compact, self-contained 2-output SyncE timing with guaranteed startup configuration

Compared with Si5342C-D-GM1, SI5342D-D06391-GMR trades fractional flexibility for tighter jitter performance at integer multiples and lower BOM cost; versus LMK04832ISQE/NOPB, it provides smaller footprint, embedded NVM, and lower power - making it ideal for space-constrained carrier-grade line cards where exactly two high-stability outputs are required.

Availability

SI5342D-D06391-GMR is available at Aetrix Electronics and suitable for OTN muxponders, Synchronous Ethernet line cards, and broadcast video infrastructure requiring stable component supply, long-term lifecycle support, and factory-programmed configuration consistency.

Supply support for SI5342D-D06391-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and precision analog ICs.

The Si5342 family is designed specifically for carrier-class network timing applications demanding ultra-low jitter, robust holdover, and seamless input clock redundancy - targeting OTN, SyncE, and broadcast video infrastructure.

FAQ

What is the maximum output frequency supported by SI5342D-D06391-GMR?

The SI5342D-D06391-GMR supports an output frequency range of 0.001 MHz to 350 MHz. This upper limit is defined by its "D" variant designation in the Si5342 ordering guide, which specifies integer-only synthesis mode optimized for carrier Ethernet and OTN applications where standard line rates (e.g., 155.52, 622.08, 1244.16 MHz) are synthesized using integer division - though the device's actual hardware capability extends to 1028 MHz in other variants.

Does SI5342D-D06391-GMR require external loop filter components?

No, SI5342D-D06391-GMR integrates the entire DSPLL loop filter on-chip. This eliminates discrete capacitors and resistors traditionally needed in analog PLL designs, reducing PCB area, component count, and sensitivity to layout-induced noise - a key advantage confirmed in the Si5342 Rev D datasheet Section 1 (Features List) and Section 3.2 (DSPLL Loop Bandwidth).

How does SI5342D-D06391-GMR handle loss of input clock?

Upon input clock failure, SI5342D-D06391-GMR automatically enters holdover mode using up to 120 seconds of stored frequency history. It calculates an averaged holdover frequency from a programmable time window, then ramps output frequency to that value - minimizing phase disturbance. This behavior is documented in Section 3.4.5 (Holdover Mode) of the Si5342 Rev D datasheet and is critical for ITU-T G.8262 compliance.

Can SI5342D-D06391-GMR generate both LVDS and LVCMOS outputs simultaneously?

Yes, SI5342D-D06391-GMR supports independent configuration of OUT0 and OUT1 for different signal formats - including LVDS, LVPECL, LVCMOS, CML, and HCSL - with programmable amplitude, common-mode voltage, and polarity. Each output has dedicated supply pins (VDDOx) allowing mixed-voltage operation (e.g., 3.3 V LVDS on OUT0, 1.8 V LVCMOS on OUT1), as specified in Section 3.9 (Outputs) of the datasheet.

Is SI5342D-D06391-GMR preprogrammed, and how is configuration stored?

Yes, SI5342D-D06391-GMR is a factory preprogrammed device with configuration stored in on-chip non-volatile memory (NVM). It powers up immediately with its assigned frequency plan - no host processor initialization required. The "D06391" suffix indicates a custom ClockBuilder Pro-generated configuration, and NVM programming is verified per Skyworks' production test flow, as described in Section 2 (Ordering Guide) and Section 3.11 (In-Circuit Programming) of the datasheet.

SI5342D-D06391-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: *

Package/Case:: -

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

Type:: -

PLL:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Divider/Multiplier:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: -

Grade:: -

Qualification:: -

Supplier Device Package:: -

SI5342D-D06391-GMR FAQ

1.How can I place an order for SI5342D-D06391-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5342D-D06391-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5342D-D06391-GMR reliable?

The price and inventory of SI5342D-D06391-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5342D-D06391-GMR is usually 5 days.

3.What payment methods are accepted for SI5342D-D06391-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5342D-D06391-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5342D-D06391-GMR?

SI5342D-D06391-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5342D-D06391-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5342D-D06391-GMR?

For technical support, including SI5342D-D06391-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5342D-D06391-GMR requirements.

6.How does Aetrix verify that SI5342D-D06391-GMR is sourced from the original manufacturer or authorized distributors?

All SI5342D-D06391-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5342D-D06391-GMR meets industry standards.

7.What is the process for return or replacement of SI5342D-D06391-GMR?

All SI5342D-D06391-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5342D-D06391-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5342D-D06391-GMR part is unused and in its original packaging.

Return procedure for SI5342D-D06391-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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