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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Clock Generators, PLLs, Frequency Synthesizers

Skyworks Solutions Inc. SI5344B-B04934-GM

Name: SI5344B-B04934-GM
Brand: Skyworks Solutions Inc.
SKU: SI5344B-B04934-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5344B-B04934-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Clock Generators, PLLs, Frequency Synthesizers

Package:: -

Datasheet:: SI5344B-B04934-GM.pdf

Description:: IC CLOCK GEN 4-OUT QFN24

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Product details

Overview

SI5344B-B04934-GM from Skyworks is a 4-input, 4-output jitter attenuating clock multiplier with fourth-generation DSPLL™ and MultiSynth™ architecture. It delivers ultra-low 90 fs rms jitter, supports differential (8 kHz–750 MHz) and LVCMOS (8 kHz–250 MHz) inputs, and generates outputs from 100 Hz to 350 MHz across LVDS/LVPECL/LVCMOS/CML/HCSL formats. It powers SyncE-compliant carrier Ethernet switches and OTN transponders.

For engineers reviewing the SI5344B-B04934-GM datasheet, SI5344B-B04934-GM pinout, SI5344B-B04934-GM application, or SI5344B-B04934-GM equivalent, key selection considerations include its 350 MHz max output frequency limit (vs. 1028 MHz in Si5344A), G.8262 EEC Option 1/2 compliance, programmable jitter attenuation bandwidth (0.1 Hz–4 kHz), and factory-programmed configuration for immediate deployment in holdover-sensitive telecom infrastructure.

Technical Context

The SI5344B-B04934-GM implements a digitally controlled DSPLL with integrated loop filter and programmable loop bandwidth (0.1 Hz–4 kHz), enabling precise jitter filtering tailored to application requirements. Its MultiSynth dividers support integer-only synthesis up to 350 MHz - a hardware-limited subset of the full Si5344 family's fractional capability.

It operates in free-run, locked, and holdover modes, with hitless and ramped input switching, status monitoring (LOS/OOF/LOL), and DCO mode offering 0.001 ppb step resolution. The device uses an external 25–54 MHz crystal on XA/XB pins for reference stability during holdover, and features independent output supply pins (1.8 V/2.5 V/3.3 V) for mixed-signal board integration.

Key Specifications

Parameter	Value and Actual Design Meaning
Output count	4 independent, fully configurable clock outputs
Max output frequency	350 MHz - defines upper limit for SyncE line-card timing and 10G/40G SerDes reference generation
Jitter (rms)	90 fs - meets ITU-T G.8262 EEC Option 1/2 for Synchronous Ethernet applications
Synthesis mode	Integer-only - eliminates fractional spurs; simplifies phase noise profile for deterministic jitter budgets
Input range (diff)	8 kHz–750 MHz - supports legacy SONET/SDH, modern packet-based, and gapped clock sources
DSPLL bandwidth	0.1 Hz–4 kHz - digitally programmable to optimize jitter attenuation vs. transient response trade-off
Crystal reference	25–54 MHz - enables low-phase-noise holdover using internal load capacitors (no external C_L required)

Pinout & Package

SI5344B-B04934-GM is housed in a 44-pin QFN package (7 mm × 7 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks' official pinout documentation for Si5344 family devices.

Pin/Terminal	Circuit Role	Design Meaning
IN0–IN3	Differential or LVCMOS clock inputs	Four selectable reference sources; IN3 serves as FB_IN in zero-delay mode
OUT0–OUT3	Programmable clock outputs	Each supports LVDS/LVPECL/LVCMOS/CML/HCSL with independent amplitude and common-mode control
XA/XB	Crytal oscillator terminals	Connects to 25–54 MHz fundamental-mode crystal; internal 12 pF load caps eliminate external components
VDD/VDDA	Core/analog power supplies	VDD = 1.8 V ±5%; VDDA = 3.3 V ±5% - strict separation ensures low-noise PLL operation
IN_SEL[1:0]	Manual input selection control	Two-pin binary encoding selects active input (IN0–IN2); IN3 reserved when zero-delay enabled
INTRb	Interrupt output	Open-drain flag indicating LOS/OOF/LOL events - enables real-time fault monitoring without polling

Key Features

Feature	Design Value
Hitless input switching	Eliminates phase transients when switching between fractionally related clocks - critical for seamless network failover
G.8262 SyncE compliance	Fully meets EEC Option 1 and 2 specifications - enables drop-in use in carrier-grade Ethernet timing cards
Factory preprogrammed NVM	Power-up with validated frequency plan - removes need for host processor initialization in space-constrained systems
Ramped holdover exit	Linear frequency ramp (0.2–40,000 ppm/s) avoids phase jumps when recovering from input loss - preserves SERDES lock integrity
Integrated loop filter	On-chip analog filter eliminates external passive components and PCB layout sensitivity - improves yield and jitter consistency

Applications

Carrier Ethernet Switch Timing	OTN Muxponder Clocking
Use Scenario: Providing synchronized, low-jitter reference clocks to multiple MAC/PHY layers and packet framer ICs in multi-terabit aggregation switches. IC Role / Device Role / Timing Role: Jitter attenuator and frequency translator that cleans incoming SyncE or PTP-derived references and distributes phase-aligned outputs to 10G/100G interfaces. Use Value: Enables <100 ns time error accumulation over 24 hours per ITU-T G.8262 - essential for maintaining SLA-compliant packet delay variation.	Use Scenario: Generating precise, jitter-cleaned line-rate clocks (e.g., 9.953 Gbps, 39.813 Gbps) for OTN framers and FEC engines in metro DWDM muxponders. IC Role / Device Role / Timing Role: Clock multiplier with holdover that maintains stable output during upstream reference loss, supporting hitless protection switching. Use Value: 90 fs rms jitter ensures BER <1e−15 at 100G line rates; integer-only synthesis avoids fractional spurs that degrade optical SNR.
SONET/SDH Line Card Timing	Broadcast Video Synchronization
Use Scenario: Delivering OC-192/STM-64 compliant clocks (e.g., 9.953 GHz, 2.488 GHz) to SONET framer ASICs and retiming buffers in legacy transport equipment. IC Role / Device Role / Timing Role: Jitter attenuator locking to line-derived references while suppressing wander introduced by long-haul fiber paths. Use Value: Programmable 0.1 Hz DSPLL bandwidth filters low-frequency wander (<1 Hz), meeting GR-253-CORE jitter mask requirements.	Use Scenario: Generating genlock-capable video reference clocks (e.g., 27 MHz, 74.25 MHz, 148.5 MHz) for SMPTE ST 2059–2 compliant IP video encoders and routers. IC Role / Device Role / Timing Role: Multi-format clock generator that accepts GPSDO or PTP grandmaster inputs and produces phase-coherent outputs for HD/4K/8K signal chains. Use Value: LVDS/LVPECL/LVCMOS output flexibility allows direct interface to FPGA video processors and serializer ICs without level-shifting.

Carrier Ethernet Switch Timing

OTN Muxponder Clocking

Use Scenario: Providing synchronized, low-jitter reference clocks to multiple MAC/PHY layers and packet framer ICs in multi-terabit aggregation switches.

IC Role / Device Role / Timing Role: Jitter attenuator and frequency translator that cleans incoming SyncE or PTP-derived references and distributes phase-aligned outputs to 10G/100G interfaces.

Use Value: Enables <100 ns time error accumulation over 24 hours per ITU-T G.8262 - essential for maintaining SLA-compliant packet delay variation.

Use Scenario: Generating precise, jitter-cleaned line-rate clocks (e.g., 9.953 Gbps, 39.813 Gbps) for OTN framers and FEC engines in metro DWDM muxponders.

IC Role / Device Role / Timing Role: Clock multiplier with holdover that maintains stable output during upstream reference loss, supporting hitless protection switching.

Use Value: 90 fs rms jitter ensures BER <1e−15 at 100G line rates; integer-only synthesis avoids fractional spurs that degrade optical SNR.

SONET/SDH Line Card Timing

Broadcast Video Synchronization

Use Scenario: Delivering OC-192/STM-64 compliant clocks (e.g., 9.953 GHz, 2.488 GHz) to SONET framer ASICs and retiming buffers in legacy transport equipment.

IC Role / Device Role / Timing Role: Jitter attenuator locking to line-derived references while suppressing wander introduced by long-haul fiber paths.

Use Value: Programmable 0.1 Hz DSPLL bandwidth filters low-frequency wander (<1 Hz), meeting GR-253-CORE jitter mask requirements.

Use Scenario: Generating genlock-capable video reference clocks (e.g., 27 MHz, 74.25 MHz, 148.5 MHz) for SMPTE ST 2059–2 compliant IP video encoders and routers.

IC Role / Device Role / Timing Role: Multi-format clock generator that accepts GPSDO or PTP grandmaster inputs and produces phase-coherent outputs for HD/4K/8K signal chains.

Use Value: LVDS/LVPECL/LVCMOS output flexibility allows direct interface to FPGA video processors and serializer ICs without level-shifting.

Equivalent & Alternatives

The following parts are listed as comparable options for similar jitter attenuator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5344A-D-GM	Supports integer + fractional synthesis up to 1028 MHz; wider output frequency range	Required for >350 MHz outputs (e.g., 100G KR4, PCIe Gen4)	Select Si5344A-D-GM only if full-frequency synthesis or >350 MHz outputs are needed; SI5344B-B04934-GM offers lower cost and simpler validation for ≤350 MHz SyncE use cases
LMK04832ISQE/NOPB	Two-stage PLL architecture; higher power consumption (1.2 W vs. 0.65 W); no integrated crystal load caps	Used in test & measurement where ultra-low additive jitter (<50 fs) is prioritized over holdover stability	Choose LMK04832ISQE/NOPB for lab-grade instrumentation requiring sub-50 fs additive jitter; SI5344B-B04934-GM is optimized for telecom infrastructure with superior holdover and integrated crystal interface

Compared with Si5344A-D-GM, SI5344B-B04934-GM trades maximum output frequency and fractional synthesis for tighter cost control and simplified qualification in 10G/40G SyncE deployments; versus LMK04832ISQE/NOPB, it delivers better holdover stability, lower power, and reduced BOM count via integrated crystal loading - making it preferred for carrier-class embedded timing.

Availability

SI5344B-B04934-GM is available at Aetrix Electronics and suitable for carrier Ethernet switches, OTN muxponders, and SONET/SDH line cards requiring stable component supply, long-term lifecycle assurance, and factory-programmed configuration out-of-box.

Supply support for SI5344B-B04934-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for communications infrastructure, automotive, and industrial markets.

The Si5344B-B04934-GM belongs to Skyworks' Si534x jitter attenuator product line, engineered specifically for high-reliability telecom timing applications demanding G.8262 compliance, robust holdover, and seamless input failover in carrier-grade networking equipment.

FAQ

What is the maximum output frequency supported by the SI5344B-B04934-GM?

The SI5344B-B04934-GM supports a maximum output frequency of 350 MHz. This is a hardware-enforced limit specific to the "B" variant, distinguishing it from the Si5344A-D-GM (1028 MHz). The 350 MHz ceiling is sufficient for 10G/40G Ethernet, SONET OC-192, and SyncE EEC Option 1/2 applications, and reflects its integer-only synthesis architecture optimized for deterministic jitter performance in telecom infrastructure.

Does the SI5344B-B04934-GM require external loop filter components?

No, the SI5344B-B04934-GM integrates the entire DSPLL loop filter on-die. This eliminates discrete resistors and capacitors traditionally needed in PLL designs, reducing PCB area, component count, and sensitivity to layout-induced noise coupling. The fully integrated filter ensures consistent jitter attenuation performance across units and simplifies design validation - a key advantage over discrete-filter clock ICs in high-density telecom modules.

How does the SI5344B-B04934-GM handle input clock failure in carrier-grade systems?

Upon input clock failure, the SI5344B-B04934-GM automatically enters holdover mode using up to 120 seconds of stored historical frequency data to compute an averaged holdover frequency. Its programmable holdover window and ramped exit (0.2–40,000 ppm/s) ensure glitchless recovery when the reference returns. This behavior meets ITU-T G.8262 requirements for carrier Ethernet timing resilience and is factory-tuned in SI5344B-B04934-GM for minimal phase disturbance during network switchover events.

Is the SI5344B-B04934-GM pin-compatible with other Si5344 variants?

Yes, the SI5344B-B04934-GM shares the identical 44-QFN 7×7 mm package and pinout with all Si5344 variants (e.g., Si5344A-D-GM, Si5344C-D-GM). All electrical signaling, power domains, and control pin functions are identical. This allows direct substitution in existing layouts when upgrading or downgrading frequency capability - provided system firmware and clock configuration align with the selected variant's synthesis mode and output limits.

What crystal frequency is recommended for optimal jitter performance with the SI5344B-B04934-GM?

A 48 MHz to 54 MHz fundamental-mode crystal is recommended for optimal jitter performance with the SI5344B-B04934-GM. Skyworks specifies this range in the Si5345/44/42 Rev D Data Sheet to minimize phase noise contribution from the reference oscillator. The device includes internal 12 pF load capacitors, so no external capacitors are required - simplifying layout and improving repeatability. Crystals outside this band may increase integrated jitter beyond the guaranteed 90 fs rms specification.

SI5344B-B04934-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: *

Package/Case:: -

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

Type:: -

PLL:: -

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Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Divider/Multiplier:: -

Voltage - Supply:: -

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SI5344B-B04934-GM FAQ

1.How can I place an order for SI5344B-B04934-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5344B-B04934-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5344B-B04934-GM reliable?

The price and inventory of SI5344B-B04934-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5344B-B04934-GM is usually 5 days.

3.What payment methods are accepted for SI5344B-B04934-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5344B-B04934-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5344B-B04934-GM?

SI5344B-B04934-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5344B-B04934-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5344B-B04934-GM?

For technical support, including SI5344B-B04934-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5344B-B04934-GM requirements.

6.How does Aetrix verify that SI5344B-B04934-GM is sourced from the original manufacturer or authorized distributors?

All SI5344B-B04934-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5344B-B04934-GM meets industry standards.

7.What is the process for return or replacement of SI5344B-B04934-GM?

All SI5344B-B04934-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5344B-B04934-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5344B-B04934-GM part is unused and in its original packaging.

Return procedure for SI5344B-B04934-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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