Skyworks Solutions Inc. SI5345A-B03293-GM

Overview

SI5345A-B03293-GM from Skyworks is a 10-channel, any-frequency jitter attenuator and clock multiplier featuring fourth-generation DSPLL™ and MultiSynth™ architectures. It delivers ultra-low 90 fs rms jitter, supports differential inputs up to 750 MHz and outputs up to 1028 MHz, and operates in free-run, locked, or holdover modes - enabling precise timing for SyncE-compliant 100 GbE line cards and OTN transponders.

For engineers reviewing the SI5345A-B03293-GM datasheet, SI5345A-B03293-GM pinout, SI5345A-B03293-GM application, or SI5345A-B03293-GM equivalent, key selection considerations include its 64-QFN 9×9 mm package, programmable jitter attenuation bandwidth (0.1 Hz–4 kHz), G.8262 EEC Option 1/2 compliance, I²C/SPI configurability, and factory-programmed NVM configuration.

Technical Context

The SI5345A-B03293-GM implements a digitally controlled DSPLL with integrated loop filter and programmable loop bandwidth (0.1 Hz–4 kHz), enabling precise jitter filtering without external components. Its MultiSynth architecture provides fractional-N synthesis across all 10 outputs, supporting independent integer/fractional division (Nn/Nd) and output R-division for arbitrary frequency generation.

It features hitless input switching between fractionally related clocks, glitchless DCO-mode frequency stepping down to 0.001 ppb, and ramped holdover exit with user-selectable slew rates (0.2–40,000 ppm/s). Input qualification includes LOS/OOF/LOL monitoring, and operation spans –40 to +85 °C with 1.8 V core and 3.3 V analog supplies.

Key Specifications

Pinout & Package

SI5345A-B03293-GM uses a 64-pin QFN package (9 mm × 9 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks Si5345 Rev D datasheet Section 9 (Pin Descriptions).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar jitter attenuator applications.

Compared with SI5345A-B03293-GM, Si5345B-D-GM trades frequency flexibility and jitter performance for cost reduction in legacy networks, while LTC6955 offers simpler integration in non-telecom applications but lacks G.8262 compliance, holdover, and multi-input resilience.

Availability

SI5345A-B03293-GM is available at Aetrix Electronics and suitable for 100 GbE line cards, OTN transponders, and broadcast video infrastructure requiring stable component supply, long-term lifecycle support, and factory-programmed configuration traceability.

Supply support for SI5345A-B03293-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for communications, automotive, and industrial markets.

The Si5345 family is engineered for high-reliability telecom and datacenter timing applications, delivering jitter attenuation, multi-protocol clock synthesis, and robust holdover performance in a single-chip solution.

FAQ

What is the primary function of the SI5345A-B03293-GM in a timing architecture?

The SI5345A-B03293-GM serves as a jitter-attenuating clock multiplier that cleans and regenerates timing signals from noisy or unstable references. It locks to one of four input clocks, suppresses jitter using its DSPLL, and generates up to ten independent, ultra-low-jitter output clocks - making it ideal for synchronizing multi-rate SERDES lanes in 100 GbE and OTN systems. The SI5345A-B03293-GM achieves this with 90 fs rms jitter and programmable loop bandwidth.

Does the SI5345A-B03293-GM require an external crystal, and what frequency range is supported?

Yes, the SI5345A-B03293-GM requires an external fundamental-mode crystal connected to XA/XB pins. It supports crystals from 25 MHz to 54 MHz, with Skyworks recommending 48–54 MHz for optimal jitter performance. Internal load capacitors eliminate the need for external C_L components, simplifying layout and reducing noise susceptibility. The SI5345A-B03293-GM uses this crystal as its reference during freerun and holdover modes.

How does the SI5345A-B03293-GM handle loss of input clock, and what is its holdover behavior?

Upon loss of all valid input clocks, the SI5345A-B03293-GM automatically enters holdover mode, using up to 120 seconds of stored frequency history to compute an averaged holdover frequency. The averaging window and delay are programmable to exclude corrupted data near failure time. Output drift in holdover depends solely on the XA/XB crystal's stability - a TCXO is recommended for SyncE pizza-box applications. The SI5345A-B03293-GM exits holdover glitchlessly when a valid input returns.

Can the SI5345A-B03293-GM generate different output formats on each channel, and which are supported?

Yes, the SI5345A-B03293-GM supports independent format selection per output channel: LVDS, LVPECL, LVCMOS, CML, and HCSL. Each output has programmable common-mode voltage (for differential) and swing/amplitude (for LVCMOS), along with configurable termination and polarity. This enables simultaneous driving of diverse interfaces - e.g., LVPECL for FPGA clock inputs, LVCMOS for microcontroller peripherals, and HCSL for PCIe SerDes - all from a single SI5345A-B03293-GM device.

Is the SI5345A-B03293-GM preprogrammed, and how is configuration performed?

SI5345A-B03293-GM is a factory preprogrammed variant - its configuration (input/output frequencies, formats, modes) is stored in on-chip NVM and loads automatically at power-up. Configuration is performed using Skyworks' ClockBuilder Pro™ software, which generates custom part numbers like SI5345A-B03293-GM. The SI5345A-B03293-GM retains its settings across power cycles and supports in-circuit reprogramming via I²C or SPI if needed.