Skyworks Solutions Inc. SI5345A-B04733-GMR

Overview

SI5345A-B04733-GMR from Skyworks is a 10-channel, any-frequency jitter attenuator/clock multiplier featuring fourth-generation DSPLL™ and MultiSynth™ technologies. It delivers ultra-low 90 fs rms jitter, supports differential inputs up to 750 MHz and outputs up to 1028 MHz, and operates in free-run, locked, or holdover modes - enabling precise timing in SyncE-compliant 100 GbE line cards.

For engineers reviewing the SI5345A-B04733-GMR datasheet, SI5345A-B04733-GMR pinout, SI5345A-B04733-GMR application, or SI5345A-B04733-GMR equivalent, key selection considerations include its programmable jitter attenuation bandwidth (0.1 Hz–4 kHz), G.8262 EEC Option 1/2 compliance, 64-QFN 9×9 mm package, I²C/SPI configurability, and factory-programmed NVM configuration for known-power-up behavior.

Technical Context

The SI5345A-B04733-GMR implements a digitally controlled DSPLL with fully integrated loop filter and programmable loop bandwidth (0.1 Hz–4 kHz), enabling application-level jitter optimization. Its MultiSynth architecture supports fractional-N synthesis across all 10 outputs, allowing independent generation of any frequency from any input via integer/fractional dividers (P, M, N, R).

It features hitless and glitchless input switching between up to four differential or LVCMOS inputs, synchronized holdover using 120-second averaged historical frequency data, and DCO mode with 0.001 ppb step resolution - all managed through in-circuit programmable OTP memory and ClockBuilder Pro™ software.

Key Specifications

Pinout & Package

SI5345A-B04733-GMR is housed in a 64-pin QFN package (9 mm × 9 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks Si5345 Rev D datasheet Section 9 (Pin Descriptions) and Figure 10.1.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar jitter attenuator/clock multiplier applications.

Compared with SI5345A-B04733-GMR, Si5345B-D-GM1 trades output frequency range and synthesis flexibility for cost and simplicity, while LMK04832 offers superior raw jitter but requires external configuration storage and delivers shorter holdover stability - making SI5345A-B04733-GMR optimal for carrier-grade SyncE with guaranteed power-up behavior and full-bandwidth synthesis.

Availability

SI5345A-B04733-GMR is available at Aetrix Electronics and suitable for 100 GbE line cards, OTN muxponders, and broadcast video infrastructure requiring stable component supply, long-term lifecycle support, and factory-programmed timing configurations.

Supply support for SI5345A-B04733-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for communications, automotive, and industrial markets.

The Si5345 family is designed specifically for high-performance timing in telecom infrastructure, delivering jitter-attenuated, multi-output clock generation with integrated DSPLL and programmable holdover for SyncE, OTN, and broadcast applications.

FAQ

What is the primary function of the SI5345A-B04733-GMR in a telecom timing system?

The SI5345A-B04733-GMR serves as a jitter-attenuating clock multiplier that cleans and regenerates timing signals in carrier-grade networks. It locks to an incoming reference (e.g., BITS or recovered OTU4 clock), suppresses jitter using its DSPLL, and generates up to 10 low-jitter outputs - enabling SI5345A-B04733-GMR to meet ITU-T G.8262 EEC Option 1/2 requirements while supporting holdover during input failure.

Does the SI5345A-B04733-GMR require external loop filter components?

No. The SI5345A-B04733-GMR integrates the entire DSPLL loop filter on-die, eliminating discrete resistors, capacitors, and inductors. This reduces PCB area, avoids noise coupling from external passives, and ensures consistent loop response across temperature and voltage - a key advantage over discrete PLL solutions where SI5345A-B04733-GMR delivers guaranteed jitter performance without layout-dependent tuning.

How does the SI5345A-B04733-GMR handle clock input failure in a SyncE deployment?

Upon input failure, the SI5345A-B04733-GMR automatically enters holdover mode using up to 120 seconds of stored frequency history. It calculates an averaged holdover frequency from a programmable window of that history, minimizing phase disturbance. The SI5345A-B04733-GMR then sustains output timing accuracy based on its internal crystal reference - meeting G.8262 wander limits without requiring external TCXO unless ultra-long holdover is needed.

Can the SI5345A-B04733-GMR generate different output frequencies simultaneously?

Yes. The SI5345A-B04733-GMR uses ten independent MultiSynth dividers, each configurable via ClockBuilder Pro™ to produce distinct frequencies - for example, 156.25 MHz for Ethernet PHYs, 100 MHz for CPU clocks, and 24.576 MHz for audio codecs - all derived from a single 10 MHz input. Each SI5345A-B04733-GMR output supports LVDS, LVPECL, or LVCMOS signaling with programmable amplitude and common-mode voltage.

Is the SI5345A-B04733-GMR preprogrammed, and how is configuration stored?

Yes. SI5345A-B04733-GMR is factory preprogrammed with a specific frequency plan stored in one-time-programmable (OTP) NVM. At power-up, it loads this configuration automatically - ensuring known, repeatable behavior without host processor intervention. Configuration changes can be made in-circuit via I²C or SPI, and new settings may be saved to NVM, making SI5345A-B04733-GMR ideal for systems requiring zero-configuration boot timing.