Skyworks Solutions Inc. SI5345A-B04793-GMR

Overview

SI5345A-B04793-GMR from Skyworks is a 10-channel, any-frequency jitter attenuator/clock multiplier featuring fourth-generation DSPLL™ and MultiSynth™ technologies. It delivers ultra-low 90 fs rms jitter, supports differential inputs up to 750 MHz and outputs up to 1028 MHz, and operates in free-run, synchronous, or holdover modes - enabling precise clock synthesis for SyncE-compliant 100 GbE line cards.

For engineers reviewing the SI5345A-B04793-GMR datasheet, SI5345A-B04793-GMR pinout, SI5345A-B04793-GMR application, or SI5345A-B04793-GMR equivalent, key selection considerations include its programmable jitter attenuation bandwidth (0.1 Hz–4 kHz), G.8262 EEC Option 1/2 compliance, integrated loop filter, I²C/SPI configurability with on-chip NVM, and support for LVDS/LVPECL/LVCMOS/CML/HCSL output formats.

Technical Context

The SI5345A-B04793-GMR implements a digitally controlled DSPLL architecture with fractional input dividers (P), high-resolution MultiSynth frequency synthesis (N), and programmable integer output division (R). Its crosspoint switch routes any synthesized frequency to any of 10 outputs, enabling independent, glitchless on-the-fly frequency changes per channel.

It integrates full status monitoring (LOS/OOF/LOL), hitless and ramped input switching, DCO mode with 0.001 ppb step size, and zero-delay mode. The device uses an internal oscillator driven by a 25–54 MHz crystal (XA/XB) for freerun/holdover stability and supports gapped clock locking - critical for telecom timing resilience.

Key Specifications

Pinout & Package

SI5345A-B04793-GMR is housed in a 64-pin QFN package (9 mm × 9 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks Si5345 Rev D datasheet Section 9 (Pin Descriptions).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar jitter attenuator applications.

Compared with SI5345A-D-GM1, the SI5345A-B04793-GMR offers guaranteed field-ready SyncE timing behavior without configuration effort; compared with LMK04832RHAT, it provides superior holdover stability and lower power in telecom timing applications, though with lower maximum output frequency.

Availability

SI5345A-B04793-GMR is available at Aetrix Electronics and suitable for OTN muxponders, 100 GbE Synchronous Ethernet line cards, and broadcast video infrastructure requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for SI5345A-B04793-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for communications, automotive, and industrial markets.

The Si5345 family is designed specifically for high-performance timing in telecom infrastructure - delivering jitter attenuation, flexible clock multiplication, and resilient holdover operation for Synchronous Ethernet, OTN, and broadcast video systems.

FAQ

What is the primary function of the SI5345A-B04793-GMR in a 100 GbE line card?

The SI5345A-B04793-GMR serves as the central jitter attenuator and multi-output clock generator in 100 GbE line cards, synthesizing precise, low-jitter clocks (e.g., 103.125 GHz for CAUI-4, 156.25 MHz for MAC) from a recovered SyncE reference while meeting ITU-T G.8262 EEC Option 2 requirements. Its 90 fs rms jitter ensures signal integrity across high-speed SerDes lanes.

Does the SI5345A-B04793-GMR require external loop filter components?

No. The SI5345A-B04793-GMR integrates the entire DSPLL loop filter on-die, eliminating discrete capacitors and resistors. This removes sensitivity to PCB layout parasitics and board-level noise coupling - a key advantage over traditional PLL designs and a major contributor to its consistent 90 fs rms jitter performance.

How does the SI5345A-B04793-GMR handle loss of input reference in a SyncE application?

Upon input failure, the SI5345A-B04793-GMR automatically enters holdover mode using up to 120 seconds of stored frequency history. It calculates a final holdover frequency from a programmable window within that history, minimizing phase disturbance. The output drift is then governed solely by the 25–54 MHz crystal on XA/XB - ensuring continuity compliant with G.8262 wander limits.

Can the SI5345A-B04793-GMR generate different output frequencies simultaneously?

Yes. The SI5345A-B04793-GMR features 10 independent outputs, each routed via a crosspoint switch from one of multiple MultiSynth frequency synthesizers. Each output can be programmed to a unique frequency (e.g., 156.25 MHz, 312.5 MHz, 1.25 GHz) with independent format (LVDS/LVPECL/etc.) and amplitude - enabling single-chip clock tree consolidation.

Is the SI5345A-B04793-GMR pin-compatible with other Si5345 variants like SI5345A-D-GM1?

Yes. All Si5345 variants, including SI5345A-B04793-GMR and SI5345A-D-GM1, share identical 64-QFN 9×9 mm packaging and pinout. The "B04793" suffix denotes a factory-preprogrammed configuration optimized for specific timing profiles (e.g., SyncE EEC Option 2), not a mechanical or electrical variant - allowing drop-in replacement where firmware compatibility is confirmed.