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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Clock Generators, PLLs, Frequency Synthesizers

Skyworks Solutions Inc. SI5345A-B05743-GM

Name: SI5345A-B05743-GM
Brand: Skyworks Solutions Inc.
SKU: SI5345A-B05743-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5345A-B05743-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Clock Generators, PLLs, Frequency Synthesizers

Package:: -

Datasheet:: SI5345A-B05743-GM.pdf

Description:: IC CLK MULTIPLIER ATTENUATOR

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Product details

Overview

SI5345A-B05743-GM from Skyworks is a 10-channel, any-frequency jitter attenuator and clock multiplier IC featuring fourth-generation DSPLL™ and MultiSynth™ architectures. It delivers ultra-low 90 fs rms jitter, supports 4 differential or LVCMOS inputs and 10 programmable outputs (LVDS/LVPECL/LVCMOS/CML/HCSL), and operates across –40 to +85 °C for SyncE-compliant networking line cards.

For engineers reviewing the SI5345A-B05743-GM datasheet, SI5345A-B05743-GM pinout, SI5345A-B05743-GM application, or SI5345A-B05743-GM equivalent, key selection considerations include its G.8262 EEC Option 1/2 compliance, digitally programmable jitter attenuation bandwidth (0.1 Hz–4 kHz), in-circuit NVM configuration, and support for hitless/ramped/glitchless input switching in OTN, 100GbE, and broadcast video systems.

Technical Context

The SI5345A-B05743-GM implements a fourth-generation DSPLL with fully integrated loop filter and digitally programmable loop bandwidth (0.1 Hz–4 kHz), enabling precise jitter filtering without external components. Its MultiSynth architecture provides fractional-N synthesis on all 10 outputs with independent integer (R) and fractional (Nn/Nd) division per channel.

It supports three operational modes-free-run (crystal-referenced), locked (input-synchronized), and holdover (averaged historical frequency)-with automatic/manual input switching, status monitoring (LOS/OOF/LOL), and DCO mode offering 0.001 ppb step resolution. Input qualification handles gapped clocks down to 8 kHz, and output crosspoint routing enables any MultiSynth source to drive any output pin.

Key Specifications

Parameter	Value and Actual Design Meaning
Jitter (rms)	90 fs - meets stringent ITU-T G.8262 EEC Option 1/2 requirements for SyncE applications
Input range	Differential: 8 kHz–750 MHz; LVCMOS: 8 kHz–250 MHz - supports legacy and high-speed network timing sources
Output range	Differential: 100 Hz–1028 MHz; LVCMOS: 100 Hz–250 MHz - covers SONET/SDH, Ethernet, and broadcast video frequencies
Jitter BW	0.1 Hz–4 kHz - digitally selectable to optimize attenuation vs. transient response for specific link conditions
Supply voltages	VDD = 1.8 V ±5%; VDDA = 3.3 V ±5%; independent output supplies (1.8/2.5/3.3 V) - enables mixed-signal board integration
Interface	I²C or SPI - allows flexible host controller integration and in-system programming of NVM
Temp range	–40 to +85 °C - qualified for industrial and telecom infrastructure environments

Pinout & Package

The SI5345A-B05743-GM is housed in a 64-pin QFN package (9 × 9 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks Si5345 Rev D datasheet Section 9 (Pin Descriptions).

Pin/Terminal	Circuit Role	Design Meaning
IN0–IN3	Differential or LVCMOS input clock terminals	Support automatic/manual switching between up to four timing sources; IN3 serves as FB_IN in zero-delay mode
OUT0–OUT9	Programmable differential/LVCMOS output clocks	Each independently configurable for format (LVDS/LVPECL/etc.), amplitude, common-mode voltage, and enable/disable control
XA/XB	Crytal oscillator interface	Accepts 25–54 MHz fundamental-mode crystal; internal load caps eliminate external capacitors and reduce noise coupling
SCL/SDA or SCLK/SDIO/CSB	I²C or SPI serial interface	Enables configuration and status readback; supports in-circuit programming of on-chip OTP NVM
INTRb	Interrupt output	Asserts on LOS/OOF/LOL events; supports real-time fault monitoring without polling
RSTb	Hardware reset input	Triggers full initialization and reload from NVM - ensures deterministic power-up state

Key Features

Feature	Design Value
Any-frequency synthesis	Generates arbitrary output frequencies from any input via fractional P/M/N/R dividers - eliminates need for multiple discrete oscillators
Hitless input switching	Preserves phase continuity when switching between fractionally related inputs (e.g., 155.52 MHz ↔ 622.08 MHz) - prevents packet loss in synchronous networks
Programmable holdover	Uses 120-second history window with user-defined averaging delay to minimize phase jump during input failure - critical for carrier-grade availability
Glitchless DCO mode	0.001 ppb frequency step resolution with pin- or register-controlled FINC/FDEC - enables precise wander correction in SyncE systems
Zero-delay mode	Configures IN3 as feedback input to align OUTx phase with IN0–IN2 - satisfies deterministic latency requirements in framer/mapper interfaces

Applications

OTN Muxponders	100GbE Line Cards
Use Scenario: Aggregating multiple client-side OTU signals into a single 100G DWDM line-side interface with strict jitter accumulation limits. IC Role / Device Role / Timing Role: Jitter attenuator and multi-frequency clock generator synchronizing OTU frames, FEC engines, and SerDes lanes to a common low-jitter reference. Use Value: 90 fs rms jitter ensures compliance with ITU-T G.709 and G.8251 mask requirements while supporting 10 independent clock domains per card.	Use Scenario: Providing synchronized clocks to 100GbE MAC, PCS, and PMA layers in modular line cards where input references may vary across pluggable optics. IC Role / Device Role / Timing Role: Dual-role jitter cleaner and frequency translator - accepts diverse input rates (e.g., 156.25 MHz, 312.5 MHz, 625 MHz) and generates exact SerDes lane rates (103.125 GHz, 106.25 GHz). Use Value: Hitless switching between optical module references avoids MAC layer resets during hot-plug events; G.8262 compliance validates SyncE interoperability.
Broadcast Video Timing	Test & Measurement Equipment
Use Scenario: Generating genlock, frame sync, and pixel clocks for 4K/8K video processing pipelines requiring sub-microsecond phase alignment across multiple ASICs. IC Role / Device Role / Timing Role: Multi-output clock synthesizer delivering precisely phase-aligned LVDS clocks at 74.25 MHz, 148.5 MHz, and 297 MHz from a single 10 MHz GPSDO reference. Use Value: Programmable common-mode voltage and output swing per channel ensure signal integrity across long PCB traces to FPGAs and ADCs; zero-delay mode locks output phase to input reference.	Use Scenario: Serving as the core timing engine in high-resolution oscilloscopes and bit-error-rate testers where clock purity directly impacts measurement accuracy. IC Role / Device Role / Timing Role: Ultra-low-jitter clock multiplier generating sampling clocks (e.g., 50 GS/s equivalent) from a stable oven-controlled crystal oscillator. Use Value: 90 fs rms jitter minimizes aperture uncertainty in analog-to-digital conversion; programmable jitter bandwidth allows optimization for specific FFT or eye-diagram analysis bandwidths.

OTN Muxponders

100GbE Line Cards

Use Scenario: Aggregating multiple client-side OTU signals into a single 100G DWDM line-side interface with strict jitter accumulation limits.

IC Role / Device Role / Timing Role: Jitter attenuator and multi-frequency clock generator synchronizing OTU frames, FEC engines, and SerDes lanes to a common low-jitter reference.

Use Value: 90 fs rms jitter ensures compliance with ITU-T G.709 and G.8251 mask requirements while supporting 10 independent clock domains per card.

Use Scenario: Providing synchronized clocks to 100GbE MAC, PCS, and PMA layers in modular line cards where input references may vary across pluggable optics.

IC Role / Device Role / Timing Role: Dual-role jitter cleaner and frequency translator - accepts diverse input rates (e.g., 156.25 MHz, 312.5 MHz, 625 MHz) and generates exact SerDes lane rates (103.125 GHz, 106.25 GHz).

Use Value: Hitless switching between optical module references avoids MAC layer resets during hot-plug events; G.8262 compliance validates SyncE interoperability.

Broadcast Video Timing

Test & Measurement Equipment

Use Scenario: Generating genlock, frame sync, and pixel clocks for 4K/8K video processing pipelines requiring sub-microsecond phase alignment across multiple ASICs.

IC Role / Device Role / Timing Role: Multi-output clock synthesizer delivering precisely phase-aligned LVDS clocks at 74.25 MHz, 148.5 MHz, and 297 MHz from a single 10 MHz GPSDO reference.

Use Value: Programmable common-mode voltage and output swing per channel ensure signal integrity across long PCB traces to FPGAs and ADCs; zero-delay mode locks output phase to input reference.

Use Scenario: Serving as the core timing engine in high-resolution oscilloscopes and bit-error-rate testers where clock purity directly impacts measurement accuracy.

IC Role / Device Role / Timing Role: Ultra-low-jitter clock multiplier generating sampling clocks (e.g., 50 GS/s equivalent) from a stable oven-controlled crystal oscillator.

Use Value: 90 fs rms jitter minimizes aperture uncertainty in analog-to-digital conversion; programmable jitter bandwidth allows optimization for specific FFT or eye-diagram analysis bandwidths.

Equivalent & Alternatives

The following parts are listed as comparable options for similar jitter attenuator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5345B-D-GM	Same 64-QFN package and pinout; limited to 350 MHz max output frequency (vs. 1028 MHz); integer-only synthesis mode	Suitable for lower-frequency SyncE switches or legacy SONET where >350 MHz outputs are unnecessary	Select when cost sensitivity outweighs wideband synthesis need and system design does not require >350 MHz clocks
LTC6957-3	4-output jitter cleaner (vs. 10); fixed 3.3 V supply only; no NVM; jitter = 110 fs rms; no holdover or DCO mode	Targeted at compact instrumentation or FPGA clocking where fewer outputs and simpler configuration are acceptable	Choose for space-constrained designs needing proven Analog Devices jitter performance but lacking requirement for multi-output flexibility or telecom-grade holdover

Compared with SI5345A-B05743-GM, Si5345B-D-GM trades maximum output frequency and fractional synthesis for lower cost and simplified configuration, while LTC6957-3 offers higher integration density and faster time-to-operation but lacks telecom-specific features like G.8262 compliance, holdover, and NVM persistence.

Availability

SI5345A-B05743-GM is available at Aetrix Electronics and suitable for OTN muxponders, 100GbE line cards, and broadcast video equipment requiring stable component supply, long-term lifecycle assurance, and traceable sourcing for production ramp.

Supply support for SI5345A-B05743-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5345 family is engineered as a high-performance jitter attenuator/clock multiplier platform targeting carrier-grade synchronization in OTN, SyncE, and broadcast infrastructure - emphasizing ultra-low jitter, multi-input resilience, and field-programmable timing flexibility.

FAQ

What is the primary function of the SI5345A-B05743-GM in a telecom timing system?

The SI5345A-B05743-GM serves as a jitter attenuator and any-frequency clock multiplier, synchronizing multiple downstream clock domains to a noisy or unstable upstream reference while reducing phase noise to <90 fs rms. In telecom systems, it enables compliance with ITU-T G.8262 EEC Option 1/2 by cleaning input jitter and providing deterministic, low-wander outputs for SerDes, MAC, and framer ICs - a core capability of the SI5345A-B05743-GM.

Does the SI5345A-B05743-GM support automatic failover between input clocks?

Yes, the SI5345A-B05743-GM includes an automatic input selection state machine that monitors all four inputs (IN0–IN3) for validity (LOS/OOF), applies user-defined priority ordering, and performs hitless or ramped switching upon failure or recovery. This behavior is fully configurable via registers or pins and is integral to the SI5345A-B05743-GM's carrier-grade reliability architecture.

Can the SI5345A-B05743-GM operate without an external crystal?

No - the SI5345A-B05743-GM requires an external 25–54 MHz fundamental-mode crystal connected to XA/XB pins to provide the stable reference for free-run and holdover modes. While it can accept an external REFCLK instead, the crystal is mandatory for optimal jitter performance and is explicitly required for G.8262 compliance; this dependency is inherent to the SI5345A-B05743-GM's DSPLL architecture.

How is the SI5345A-B05743-GM configured and programmed in-system?

The SI5345A-B05743-GM is configured via I²C or SPI interface using Skyworks' ClockBuilder Pro™ software, which generates register maps and supports in-circuit programming of its on-chip OTP NVM. Once programmed, the SI5345A-B05743-GM powers up autonomously with the stored configuration - eliminating boot-time host intervention and ensuring repeatable timing behavior across power cycles.

What packaging and thermal characteristics apply to the SI5345A-B05743-GM?

The SI5345A-B05743-GM uses a 64-pin QFN package (9 × 9 mm, 0.5 mm pitch) with exposed thermal pad, rated for –40 to +85 °C operation. Its thermal resistance (θ_JA) is 32 °C/W, and recommended PCB land pattern follows Skyworks Document AN925. This mechanical and thermal profile is standardized across the Si5345 family, including the SI5345A-B05743-GM.

SI5345A-B05743-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: *

Package/Case:: -

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

Type:: -

PLL:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Divider/Multiplier:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: -

Grade:: -

Qualification:: -

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SI5345A-B05743-GM FAQ

1.How can I place an order for SI5345A-B05743-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5345A-B05743-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5345A-B05743-GM reliable?

The price and inventory of SI5345A-B05743-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5345A-B05743-GM is usually 5 days.

3.What payment methods are accepted for SI5345A-B05743-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5345A-B05743-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5345A-B05743-GM?

SI5345A-B05743-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5345A-B05743-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5345A-B05743-GM?

For technical support, including SI5345A-B05743-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5345A-B05743-GM requirements.

6.How does Aetrix verify that SI5345A-B05743-GM is sourced from the original manufacturer or authorized distributors?

All SI5345A-B05743-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5345A-B05743-GM meets industry standards.

7.What is the process for return or replacement of SI5345A-B05743-GM?

All SI5345A-B05743-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5345A-B05743-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5345A-B05743-GM part is unused and in its original packaging.

Return procedure for SI5345A-B05743-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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