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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Clock Generators, PLLs, Frequency Synthesizers

Skyworks Solutions Inc. SI5345A-B05744-GM

Name: SI5345A-B05744-GM
Brand: Skyworks Solutions Inc.
SKU: SI5345A-B05744-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5345A-B05744-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Clock Generators, PLLs, Frequency Synthesizers

Package:: -

Datasheet:: SI5345A-B05744-GM.pdf

Description:: IC CLK MULTIPLIER ATTENUATOR

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Product details

Overview

SI5345A-B05744-GM from Skyworks is a 10-channel, any-frequency jitter attenuator/clock multiplier IC featuring fourth-generation DSPLL™ and MultiSynth™ technologies. It delivers ultra-low 90 fs rms jitter, supports 4 differential or LVCMOS inputs and 10 programmable outputs (LVDS/LVPECL/LVCMOS/CML/HCSL), and operates across –40 to +85 °C for SyncE-compliant telecom line cards.

For engineers reviewing the SI5345A-B05744-GM datasheet, SI5345A-B05744-GM pinout, SI5345A-B05744-GM application, or SI5345A-B05744-GM equivalent, key selection criteria include G.8262 EEC Option 1/2 compliance, digitally programmable jitter attenuation bandwidth (0.1 Hz–4 kHz), in-circuit NVM configuration, hitless/ramped/glitchless input switching, and support for gapped clock inputs in OTN and carrier Ethernet systems.

Technical Context

The SI5345A-B05744-GM implements a fully integrated DSPLL architecture with fractional input dividers (P), high-performance MultiSynth output dividers (N), and integer R-dividers, enabling any-output-frequency synthesis from any-input-frequency. Its loop filter is on-chip, eliminating external passive components and noise coupling risks.

It supports three operational modes-freerun (crystal-referenced), locked (input-synchronized), and holdover (averaged historical frequency)-with programmable holdover window (up to 120 s history) and ramped exit (0.2–40,000 ppm/s). Input switching includes automatic priority-based selection, manual IN_SEL control, and DCO mode with 0.001 ppb step size.

Key Specifications

Parameter	Value and Actual Design Meaning
Jitter (rms)	90 fs - meets stringent ITU-T G.8262 EEC Option 1/2 requirements for SyncE line cards
Input range	Differential: 8 kHz–750 MHz; LVCMOS: 8 kHz–250 MHz - supports legacy and high-speed network clocks
Output range	Differential: 100 Hz–1028 MHz; LVCMOS: 100 Hz–250 MHz - covers SONET/SDH, Ethernet, and broadcast video rates
Jitter BW	0.1 Hz–4 kHz - digitally selectable to optimize attenuation vs. transient response per application
Crystal freq	25–54 MHz - internal loading capacitors eliminate external C_L, reducing BOM and layout sensitivity
Supply voltages	VDD = 1.8 V ±5%; VDDA = 3.3 V ±5%; independent output supplies (1.8/2.5/3.3 V) - enables mixed-signal SoC interfacing
Temp range	–40 to +85 °C - qualified for industrial and telecom infrastructure environments

Pinout & Package

SI5345A-B05744-GM is housed in a 64-QFN package (9 × 9 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are validated per Skyworks Si5345 Rev D datasheet Section 9 (Pin Descriptions).

Pin/Terminal	Circuit Role	Design Meaning
IN0–IN3	Differential or LVCMOS input	Four configurable clock inputs; IN3 serves as FB_IN in zero-delay mode
OUT0–OUT9	Programmable output driver	10 independent outputs supporting LVDS/LVPECL/LVCMOS/CML/HCSL with amplitude and common-mode control
XA/XB	Crytal oscillator terminals	Connects 25–54 MHz fundamental-mode crystal; internal load caps eliminate external components
IN_SEL[1:0]	Manual input select control	2-pin binary interface for selecting IN0–IN3 without I²C/SPI overhead
RSTb	Active-low hardware reset	Initiates hard reset: reloads NVM config and restores all circuits to power-on state
INTRb	Interrupt output	Open-drain flag for LOS/OOF/LOL events; enables real-time fault monitoring without polling

Key Features

Feature	Design Value
Any-frequency synthesis	Generates arbitrary output frequencies from any input via fractional P/N/R dividers - eliminates need for multiple fixed-ratio PLLs
Hitless input switching	Prevents phase transients when switching between fractionally related clocks - critical for hitless protection switching in OTN
Programmable holdover	Uses up to 120 s of stored frequency history to compute stable holdover reference - minimizes wander during input loss in SyncE
Glitchless DCO mode	Enables 0.001 ppb fine frequency tuning via FINC/FDEC pins or register - supports precise timing calibration in test equipment
Zero-delay mode	Configures IN3 as feedback path to align output phase with input - satisfies deterministic latency requirements in packet-processing ASICs

Applications

OTN Muxponder	SyncE Line Card
Use Scenario: Aggregating 10G/100G client signals into OTU4 transport frames with strict jitter accumulation limits. IC Role / Device Role / Timing Role: Jitter attenuator and multi-rate clock generator synchronizing muxponder PHYs, FEC, and framing logic to a single low-jitter reference. Use Value: 90 fs rms jitter ensures compliance with ITU-T G.709 OPUk/ODUk jitter masks and prevents BER degradation across cascaded nodes.	Use Scenario: Providing traceable, phase-aligned clocks to multiple Ethernet MAC/PHY instances on a carrier-grade switch line card. IC Role / Device Role / Timing Role: G.8262-compliant clock multiplier distributing synchronized 125 MHz, 156.25 MHz, and 312.5 MHz clocks with EEC Option 1/2 performance. Use Value: Programmable jitter attenuation bandwidth allows optimization for both short-term jitter filtering and long-term wander suppression per SyncE layer requirements.
Broadcast Video Router	Test & Measurement Instrument
Use Scenario: Genlock-capable routing of SMPTE ST 2110-10/20/30 IP video streams across 10G/25G interfaces with sub-sample timing precision. IC Role / Device Role / Timing Role: Multi-output jitter cleaner generating genlock-reference (27 MHz), pixel-clock (74.25 MHz), and audio-clock (48 kHz) from a common GPSDO or atomic reference. Use Value: Independent output supply pins (1.8/2.5/3.3 V) enable direct interface to diverse video ASICs and FPGAs without level-shifting.	Use Scenario: High-resolution signal source requiring micro-hertz frequency resolution and sub-picosecond phase stability over temperature. IC Role / Device Role / Timing Role: Digitally controlled oscillator (DCO) core providing 0.001 ppb step size and fastlock acquisition (<100 ms) for agile frequency sweeps. Use Value: On-chip NVM stores calibrated DCO coefficients, enabling repeatable, factory-trimmed performance without host processor intervention.

OTN Muxponder

SyncE Line Card

Use Scenario: Aggregating 10G/100G client signals into OTU4 transport frames with strict jitter accumulation limits.

IC Role / Device Role / Timing Role: Jitter attenuator and multi-rate clock generator synchronizing muxponder PHYs, FEC, and framing logic to a single low-jitter reference.

Use Value: 90 fs rms jitter ensures compliance with ITU-T G.709 OPUk/ODUk jitter masks and prevents BER degradation across cascaded nodes.

Use Scenario: Providing traceable, phase-aligned clocks to multiple Ethernet MAC/PHY instances on a carrier-grade switch line card.

IC Role / Device Role / Timing Role: G.8262-compliant clock multiplier distributing synchronized 125 MHz, 156.25 MHz, and 312.5 MHz clocks with EEC Option 1/2 performance.

Use Value: Programmable jitter attenuation bandwidth allows optimization for both short-term jitter filtering and long-term wander suppression per SyncE layer requirements.

Broadcast Video Router

Test & Measurement Instrument

Use Scenario: Genlock-capable routing of SMPTE ST 2110-10/20/30 IP video streams across 10G/25G interfaces with sub-sample timing precision.

IC Role / Device Role / Timing Role: Multi-output jitter cleaner generating genlock-reference (27 MHz), pixel-clock (74.25 MHz), and audio-clock (48 kHz) from a common GPSDO or atomic reference.

Use Value: Independent output supply pins (1.8/2.5/3.3 V) enable direct interface to diverse video ASICs and FPGAs without level-shifting.

Use Scenario: High-resolution signal source requiring micro-hertz frequency resolution and sub-picosecond phase stability over temperature.

IC Role / Device Role / Timing Role: Digitally controlled oscillator (DCO) core providing 0.001 ppb step size and fastlock acquisition (<100 ms) for agile frequency sweeps.

Use Value: On-chip NVM stores calibrated DCO coefficients, enabling repeatable, factory-trimmed performance without host processor intervention.

Equivalent & Alternatives

The following parts are listed as comparable options for similar jitter attenuator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5345B-D-GM	Same 64-QFN package and pinout; limited to 0.001–350 MHz output range; integer-only synthesis mode	Suitable for lower-frequency SyncE or SDH applications where >350 MHz outputs are unnecessary	Select when full 1028 MHz range and fractional synthesis are not required - reduces configuration complexity and cost
LMK5B33414	TI device with 4 inputs/14 outputs; 110 fs rms jitter; supports JESD204B subclass 1; no integrated crystal oscillator	Targeted at JESD204B-compliant data converters and radar systems requiring deterministic latency	Choose when JESD204B synchronization, higher output count, or dual-loop architecture are primary requirements

Compared with SI5345A-B05744-GM, Si5345B-D-GM trades maximum frequency flexibility for simpler integer-only configuration, while LMK5B33414 emphasizes JESD204B timing integrity over broad telecom compatibility - making SI5345A-B05744-GM optimal for multi-protocol, high-jitter-margin OTN and SyncE deployments.

Availability

SI5345A-B05744-GM is available at Aetrix Electronics and suitable for OTN muxponders, carrier Ethernet switches, and broadcast video infrastructure requiring stable component supply, long-lifecycle assurance, and G.8262-compliant timing performance.

Supply support for SI5345A-B05744-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5345 family is designed specifically for high-performance jitter attenuation and any-frequency clock generation in telecom infrastructure, where ultra-low phase noise, multi-input redundancy, and G.8262 compliance are mandatory.

FAQ

What is the primary function of the SI5345A-B05744-GM in telecom timing systems?

The SI5345A-B05744-GM serves as a jitter attenuator and clock multiplier that cleans and regenerates timing signals in OTN, SyncE, and SONET/SDH systems. It reduces input jitter to 90 fs rms while generating up to 10 independent, programmable output frequencies - ensuring compliance with ITU-T G.8262 EEC Option 1/2 and enabling robust holdover during input failure. Its DSPLL architecture and integrated loop filter make SI5345A-B05744-GM ideal for carrier-grade infrastructure where timing integrity directly impacts service availability.

Does the SI5345A-B05744-GM support gapped clock inputs, and why is this important?

Yes, the SI5345A-B05744-GM supports locking to gapped clock inputs - periodic signals with intentionally missing cycles used in modulation schemes like pulse-position modulation. Its high-jitter-tolerance DSPLL and low-loop-bandwidth capability allow it to recover a clean, non-gapped output clock with accurate average frequency. This capability is essential in broadcast video and certain test equipment where gapped references are employed for timing control, and SI5345A-B05744-GM maintains phase continuity despite input discontinuities.

How does the holdover functionality of the SI5345A-B05744-GM ensure timing continuity during input loss?

The SI5345A-B05744-GM stores up to 120 seconds of historical input frequency data while locked and computes a programmable averaged holdover frequency upon input failure. This minimizes phase disturbance during holdover entry/exit. The holdover window size and delay are user-configurable to exclude corrupted data near failure time. Because SI5345A-B05744-GM relies on its internal crystal reference during holdover, its drift is bounded by crystal stability - making SI5345A-B05744-GM suitable for SyncE applications requiring ≤4.6 ppm wander over 24 hours.

Can the SI5345A-B05744-GM be configured without an external microcontroller?

Yes. The SI5345A-B05744-GM features in-circuit programmable non-volatile memory (NVM) that retains configuration across power cycles. It powers up with a known frequency plan without host intervention. Configuration can be performed once using ClockBuilder Pro™ software and written to NVM via I²C or SPI. After programming, SI5345A-B05744-GM operates autonomously - simplifying system design and eliminating boot-time dependencies on external processors.

What output signaling standards does the SI5345A-B05744-GM support, and how is signal integrity maintained?

The SI5345A-B05744-GM supports LVDS, LVPECL, LVCMOS, CML, and HCSL outputs with programmable amplitude and common-mode voltage. Each output has independent supply pins (1.8 V, 2.5 V, or 3.3 V), enabling direct interface to mixed-voltage ASICs and FPGAs without external level shifters. Differential outputs use on-die termination and AC coupling guidance; LVCMOS outputs offer impedance and polarity control. These features ensure SI5345A-B05744-GM delivers clean, matched-edge signals across diverse load conditions while minimizing crosstalk and reflections.

SI5345A-B05744-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: *

Package/Case:: -

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

Type:: -

PLL:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Divider/Multiplier:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: -

Grade:: -

Qualification:: -

Supplier Device Package:: -

SI5345A-B05744-GM FAQ

1.How can I place an order for SI5345A-B05744-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5345A-B05744-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5345A-B05744-GM reliable?

The price and inventory of SI5345A-B05744-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5345A-B05744-GM is usually 5 days.

3.What payment methods are accepted for SI5345A-B05744-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5345A-B05744-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5345A-B05744-GM?

SI5345A-B05744-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5345A-B05744-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5345A-B05744-GM?

For technical support, including SI5345A-B05744-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5345A-B05744-GM requirements.

6.How does Aetrix verify that SI5345A-B05744-GM is sourced from the original manufacturer or authorized distributors?

All SI5345A-B05744-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5345A-B05744-GM meets industry standards.

7.What is the process for return or replacement of SI5345A-B05744-GM?

All SI5345A-B05744-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5345A-B05744-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5345A-B05744-GM part is unused and in its original packaging.

Return procedure for SI5345A-B05744-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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