Skyworks Solutions Inc. SI5345A-B05745-GM

Overview

SI5345A-B05745-GM from Skyworks is a 10-channel, any-frequency jitter attenuator/clock multiplier featuring fourth-generation DSPLL™ and MultiSynth™ architectures. It delivers ultra-low 90 fs rms jitter, supports 4 differential or LVCMOS inputs and 10 programmable outputs (LVDS/LVPECL/LVCMOS/CML/HCSL), and operates across –40 to +85 °C for SyncE-compliant telecom line cards.

For engineers reviewing the SI5345A-B05745-GM datasheet, SI5345A-B05745-GM pinout, SI5345A-B05745-GM application, or SI5345A-B05745-GM equivalent, key selection considerations include G.8262 EEC Option 1/2 compliance, digitally programmable jitter attenuation bandwidth (0.1 Hz–4 kHz), hitless/ramped/glitchless input switching, integrated loop filter, and factory preprogrammed NVM configuration.

Technical Context

The SI5345A-B05745-GM implements a fourth-generation DSPLL with fractional input dividers (P) enabling hitless switching between fractionally related input clocks, and high-performance MultiSynth dividers (N) supporting integer/fractional output synthesis up to 1028 MHz. Its crosspoint switch routes any MultiSynth-generated frequency to any of 10 outputs.

It integrates fully on-chip loop filtering, eliminates external passive components, and provides three operational modes-freerun (crystal-referenced), locked (input-synchronized), and holdover (averaged historical frequency)-with programmable holdover window (up to 120 s history) and ramped exit (0.2–40,000 ppm/s).

Key Specifications

Pinout & Package

The SI5345A-B05745-GM is housed in a 64-pin QFN package (9 × 9 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are validated per Skyworks Si5345 Rev D datasheet Section 9 (Pin Descriptions) and Figure 10.1 (Package Diagram).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar jitter attenuator/clock multiplier applications.

Compared with SI5345A-B05745-GM, Si5345B-D-GM trades frequency range and synthesis flexibility for lower cost, while LMK5B33414 adds JESD204B features but lacks Skyworks' hitless switching and programmable holdover depth-making SI5345A-B05745-GM optimal for telecom infrastructure requiring robust failover and ultra-low wander.

Availability

SI5345A-B05745-GM is available at Aetrix Electronics and suitable for OTN muxponders, SyncE line cards, and broadcast video equipment requiring stable component supply, long-term lifecycle assurance, and factory preprogrammed configuration.

Supply support for SI5345A-B05745-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a U.S.-based semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and precision analog technologies.

The SI5345 family is designed for high-reliability telecom and datacenter timing applications demanding ultra-low jitter, seamless clock redundancy, and G.8262 compliance-targeting OTN, SyncE, and broadcast infrastructure.

FAQ

What is the primary function of the SI5345A-B05745-GM in a telecom timing system?

The SI5345A-B05745-GM serves as a jitter attenuator and clock multiplier, synchronizing to noisy or unstable input references (e.g., from packet networks) and generating ultra-low-jitter (<90 fs rms), phase-aligned outputs for SERDES, PHYs, and framer ICs. In the SI5345A-B05745-GM, this is achieved via its fourth-generation DSPLL and MultiSynth architecture, enabling G.8262 EEC Option 1/2 compliance critical for carrier-grade SyncE deployment.

Does the SI5345A-B05745-GM support automatic failover between input clocks?

Yes, the SI5345A-B05745-GM supports both automatic and manual input clock switching. Its internal state machine evaluates LOS/OOF status on IN0–IN3, applies user-defined priority and revertive/non-revertive policies, and executes hitless, ramped, or glitchless transitions. The SI5345A-B05745-GM also enters holdover mode with programmable averaging if all inputs fail-ensuring uninterrupted timing in mission-critical telecom systems.

Can the SI5345A-B05745-GM operate without an external crystal?

No-the SI5345A-B05745-GM requires an external 25–54 MHz crystal connected to XA/XB pins to provide the reference for freerun and holdover modes. While it accepts an external REFCLK instead of a crystal, doing so disables internal loading capacitors and may degrade jitter performance. For optimal 90 fs rms jitter and G.8262 compliance, the SI5345A-B05745-GM is specified and validated with a fundamental-mode crystal.

How is the SI5345A-B05745-GM configured and programmed?

The SI5345A-B05745-GM is configured via I²C or SPI interface using Skyworks' ClockBuilder Pro™ software, which auto-generates register maps and validates frequency plans. Configuration is stored in on-chip one-time-programmable (OTP) NVM, allowing the SI5345A-B05745-GM to power up with known settings. Factory preprogrammed variants like SI5345A-B05745-GM ship with custom configurations assigned by Skyworks.

What package type and thermal characteristics does the SI5345A-B05745-GM use?

The SI5345A-B05745-GM uses a 64-pin QFN package (9 × 9 mm, 0.5 mm pitch) with exposed thermal pad for enhanced heat dissipation. It operates across –40 to +85 °C ambient, with junction-to-case thermal resistance (θ_JC) of 5.5 °C/W per Skyworks datasheet. This package enables high-density routing in telecom line cards while maintaining reliability under sustained 1.8 V/3.3 V bias and full 10-output operation.