Skyworks Solutions Inc. SI5345A-B05763-GM

Overview

SI5345A-B05763-GM from Skyworks is a 10-channel, any-frequency jitter attenuator and clock multiplier featuring fourth-generation DSPLL™ and MultiSynth™ technologies. It delivers ultra-low 90 fs rms jitter, supports differential inputs up to 750 MHz and outputs up to 1028 MHz, and operates in free-run, locked, or holdover modes - enabling precise timing in SyncE-compliant 100 GbE line cards.

For engineers reviewing the SI5345A-B05763-GM datasheet, SI5345A-B05763-GM pinout, SI5345A-B05763-GM application, or SI5345A-B05763-GM equivalent, key selection considerations include its programmable jitter attenuation bandwidth (0.1 Hz–4 kHz), G.8262 EEC Option 1/2 compliance, I²C/SPI configurability with on-chip NVM, and support for LVDS/LVPECL/LVCMOS/CML/HCSL output formats.

Technical Context

The SI5345A-B05763-GM implements a digitally controlled DSPLL architecture with fractional input dividers (P), integer/fractional MultiSynth output dividers (N), and programmable R-division for final output synthesis. Its loop filter is fully integrated, eliminating external components and noise coupling risks.

It supports hitless switching between fractionally related inputs, glitchless frequency transitions up to ±500 ppm, and ramped holdover exit with user-selectable rates (0.2–40,000 ppm/s). The device uses an internal oscillator with 25–54 MHz crystal reference to maintain stability in free-run and holdover modes.

Key Specifications

Pinout & Package

The SI5345A-B05763-GM is housed in a 64-QFN package (9×9 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are validated per Skyworks Si5345 Rev D datasheet Section 9 (Pin Descriptions).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar jitter attenuator applications.

Compared with Si5345B-D-GM, the SI5345A-B05763-GM provides full 1028 MHz bandwidth and broader synthesis flexibility; versus LMK04832, it offers integrated crystal reference, on-chip holdover history, and smaller footprint - making it optimal for compact, telecom-qualified SyncE line cards.

Availability

SI5345A-B05763-GM is available at Aetrix Electronics and suitable for 100 GbE networking line cards, OTN transponders, and broadcast video infrastructure requiring stable component supply and long-term lifecycle assurance.

Supply support for SI5345A-B05763-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for communications, automotive, and industrial markets.

The Si5345 family is designed specifically for high-performance timing in telecom infrastructure, delivering jitter attenuation, multi-rate clock synthesis, and G.8262-compliant holdover - targeting OTN, SyncE, and broadcast video systems.

FAQ

What is the primary function of the SI5345A-B05763-GM in a telecom timing architecture?

The SI5345A-B05763-GM serves as a jitter attenuating clock multiplier that cleans and regenerates timing signals from noisy or unstable sources while generating multiple synchronized output frequencies. In telecom systems, it enables compliance with ITU-T G.8262 by providing ultra-low 90 fs rms jitter, programmable loop bandwidth, and robust holdover - all critical for 100 GbE Synchronous Ethernet and OTN applications. Its DSPLL architecture ensures phase coherence across all 10 outputs.

Does the SI5345A-B05763-GM require an external crystal, and what are the specifications?

Yes, the SI5345A-B05763-GM requires an external crystal connected to XA/XB pins. It supports fundamental-mode crystals from 25 MHz to 54 MHz, with 48–54 MHz recommended for optimal jitter performance. The device integrates internal load capacitors (CL), eliminating the need for external capacitors and reducing PCB noise coupling. Crystal drive level must be ≤1 mW, and ESR should be ≤40 Ω per Skyworks Si5345 Rev D datasheet Table 5.12.

How does the SI5345A-B05763-GM handle input clock failures in mission-critical systems?

Upon input clock failure, the SI5345A-B05763-GM automatically enters holdover mode using up to 120 seconds of stored frequency history. It calculates an averaged holdover frequency from a programmable window within that history to minimize phase disturbance. The device then pulls its output to that frequency using the crystal reference, maintaining stability until a valid input returns. Status flags (LOL, OOF) and INTRb pin provide real-time fault indication.

Can the SI5345A-B05763-GM generate different output formats simultaneously, and how is this configured?

Yes, the SI5345A-B05763-GM supports simultaneous LVDS, LVPECL, LVCMOS, CML, and HCSL outputs across its 10 channels. Each output is independently configurable for format, signal amplitude, common-mode voltage (for differential), and impedance (for LVCMOS). Configuration is performed via I²C or SPI interface using Skyworks' ClockBuilder Pro software, which generates register maps and validates frequency plans before programming the on-chip NVM.

Is the SI5345A-B05763-GM pin-compatible with other devices in the Si5345 family?

Yes, all Si5345 variants - including SI5345A-B05763-GM, Si5345A-D-GM, and Si5345B-D-GM - share identical 64-QFN 9×9 mm packaging and pinout. Differences lie in factory-programmed frequency range limits (e.g., SI5345A-B05763-GM supports full 1028 MHz output, while Si5345B-D-GM is capped at 350 MHz) and preloaded configuration. Hardware design remains unchanged across these variants, enabling flexible BOM management.