Skyworks Solutions Inc. SI5345A-B05807-GM

Overview

SI5345A-B05807-GM from Skyworks is a 10-channel, any-frequency jitter attenuator and clock multiplier featuring fourth-generation DSPLL™ and MultiSynth™ architectures. It delivers ultra-low 90 fs rms jitter, supports differential inputs up to 750 MHz and outputs up to 1028 MHz, and operates in free-run, locked, or holdover modes - enabling precise timing for SyncE-compliant 100 GbE line cards.

For engineers reviewing the SI5345A-B05807-GM datasheet, SI5345A-B05807-GM pinout, SI5345A-B05807-GM application, or SI5345A-B05807-GM equivalent, key selection considerations include its programmable jitter attenuation bandwidth (0.1 Hz–4 kHz), G.8262 EEC Option 1/2 compliance, I²C/SPI configurability with on-chip NVM, and support for LVDS/LVPECL/LVCMOS/CML/HCSL output formats with independent supply pins.

Technical Context

The SI5345A-B05807-GM implements a digitally controlled DSPLL with fractional input dividers (P) and MultiSynth output dividers (N/R) to enable hitless switching between fractionally related inputs and glitchless on-the-fly frequency changes. Its loop filter is fully integrated, eliminating external components and noise coupling risks.

It features programmable holdover using 120-second historical frequency averaging, DCO mode with 0.001 ppb step resolution, and status monitoring (LOS/OOF/LOL) with interrupt pin (INTRb). Input qualification supports gapped clocks, and zero-delay mode reassigns IN3 as FB_IN.

Key Specifications

Pinout & Package

The SI5345A-B05807-GM is housed in a 64-pin QFN package (9 mm × 9 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks Si5345 Rev D datasheet Section 9 (Pin Descriptions).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar jitter attenuator applications.

Compared with SI5345A-B05807-GM, Si5345B-D-GM reduces maximum output frequency to lower cost without altering pin compatibility or firmware, while LTC6957-3 trades programmability and telecom features for superior analog noise performance in non-SyncE signal chain roles.

Availability

SI5345A-B05807-GM is available at Aetrix Electronics and suitable for OTN muxponders, SyncE line cards, broadcast video infrastructure, and test equipment requiring stable component supply with guaranteed long-term lifecycle support.

Supply support for SI5345A-B05807-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, and industrial markets.

The Si5345 family is engineered for high-performance timing in telecom infrastructure, delivering jitter attenuation, multi-output synthesis, and protocol-compliant holdover for SyncE, OTN, and broadcast applications.

FAQ

What is the primary function of the SI5345A-B05807-GM in a timing architecture?

The SI5345A-B05807-GM functions as a 10-channel jitter attenuator and clock multiplier, using DSPLL™ and MultiSynth™ technology to clean noisy input clocks and generate multiple low-jitter output frequencies. It supports free-run, locked, and holdover modes - making it central to timing integrity in SyncE-compliant systems. The SI5345A-B05807-GM achieves 90 fs rms jitter and meets ITU-T G.8262 EEC Option 1/2 specifications.

Does the SI5345A-B05807-GM support factory preprogramming, and how is configuration stored?

Yes, the SI5345A-B05807-GM supports in-circuit programming with on-chip non-volatile memory (NVM), allowing it to power up with a known frequency configuration. Factory preprogrammed variants use custom part numbers (e.g., Si5345A-Dxxxxx-GM), and configuration is managed via Skyworks' ClockBuilder Pro™ software. The SI5345A-B05807-GM retains settings across power cycles without external EEPROM.

What input and output signal formats does the SI5345A-B05807-GM support?

The SI5345A-B05807-GM accepts differential (LVDS/LVPECL/CML) and single-ended LVCMOS inputs from 8 kHz to 750 MHz. Its 10 outputs support LVDS, LVPECL, LVCMOS, CML, and HCSL formats, each with independent programmable amplitude, common-mode voltage, and termination. The SI5345A-B05807-GM enables mixed-format clock trees without level-shifting components.

How does the SI5345A-B05807-GM handle clock failures or loss of input reference?

Upon input failure, the SI5345A-B05807-GM automatically enters holdover mode, using up to 120 seconds of stored frequency history to compute a stable averaged holdover frequency. This minimizes phase disturbance at outputs. The SI5345A-B05807-GM exits holdover glitchlessly when a valid clock returns, optionally ramping frequency to avoid transients - critical for SyncE and OTN applications.

Is the SI5345A-B05807-GM pin-compatible with other members of the Si5345 family?

Yes, all Si5345 variants - including SI5345A-B05807-GM - share the same 64-QFN 9×9 mm package and pinout. Differences lie in factory-programmed frequency limits (e.g., Si5345B-D-GM capped at 350 MHz) and synthesis mode support (integer-only vs. integer+fractional), not physical layout. This allows design reuse and simplified BOM management across performance tiers.