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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Clock Generators, PLLs, Frequency Synthesizers

Skyworks Solutions Inc. SI5345A-B05905-GM

Name: SI5345A-B05905-GM
Brand: Skyworks Solutions Inc.
SKU: SI5345A-B05905-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5345A-B05905-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Clock Generators, PLLs, Frequency Synthesizers

Package:: -

Datasheet:: SI5345A-B05905-GM.pdf

Description:: IC CLK MULTIPLIER ATTENUATOR

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Product details

Overview

SI5345A-B05905-GM from Skyworks is a 10-channel, any-frequency jitter attenuator/clock multiplier featuring fourth-generation DSPLL™ and MultiSynth™ technologies. It delivers ultra-low 90 fs rms jitter, supports differential inputs up to 750 MHz and outputs up to 1028 MHz, and operates in free-run, locked, or holdover modes - enabling precise timing in SyncE-compliant 100 GbE line cards.

For engineers reviewing the SI5345A-B05905-GM datasheet, SI5345A-B05905-GM pinout, SI5345A-B05905-GM application, or SI5345A-B05905-GM equivalent, key selection considerations include its programmable jitter attenuation bandwidth (0.1 Hz–4 kHz), G.8262 EEC Option 1/2 compliance, I²C/SPI configurability with on-chip NVM, and support for LVDS/LVPECL/LVCMOS/CML/HCSL output formats with independent supply pins.

Technical Context

The SI5345A-B05905-GM implements a digitally controlled DSPLL architecture with fractional input dividers (P), high-resolution MultiSynth™ frequency synthesis (Nn/Nd), and integer output division (R), enabling hitless switching between fractionally related inputs and glitchless on-the-fly output frequency changes. Its loop filter is fully integrated, eliminating external components and noise coupling risks.

It supports three operational modes - freerun (crystal-referenced), locked (phase- and frequency-locked to input), and holdover (averaged historical frequency retention up to 120 s) - with programmable holdover window size and delay. Fastlock mode enables accelerated lock acquisition using temporary higher loop bandwidth (100 Hz–4 kHz) before reverting to configured bandwidth.

Key Specifications

Parameter	Value and Actual Design Meaning
Jitter (rms)	90 fs - meets stringent ITU-T G.8262 EEC Option 1/2 requirements for SyncE applications
Input range (diff)	8 kHz–750 MHz - accepts common telecom and datacom reference clocks without external conditioning
Output range (diff)	100 Hz–1028 MHz - covers SONET/SDH, Ethernet, and broadcast video frequencies
Jitter BW control	0.1 Hz–4 kHz digital setting - enables application-level optimization of jitter filtering vs. transient response
Supply voltages	VDD = 1.8 V ±5%; VDDA = 3.3 V ±5%; independent output supplies (1.8/2.5/3.3 V) - supports mixed-signal board integration
Crystal range	25–54 MHz - internal loading capacitors eliminate need for external XTAL caps, reducing BOM and layout sensitivity
Temp range	–40 °C to +85 °C - qualified for industrial and telecom infrastructure environments

Pinout & Package

The SI5345A-B05905-GM is housed in a 64-pin QFN package measuring 9×9 mm with 0.5 mm pitch and exposed thermal pad. Pin functions are validated per Skyworks Si5345 64-QFN package diagram (Rev D, p.51) and Pin Descriptions section (p.45).

Pin/Terminal	Circuit Role	Design Meaning
IN0–IN3	Differential/single-ended clock inputs	Support automatic/manual switching; IN3 serves as FB_IN in zero-delay mode
OUT0–OUT9	Programmable clock outputs	Configurable for LVDS/LVPECL/LVCMOS/CML/HCSL; each with independent voltage supply and amplitude control
XA/XB	Crytal oscillator terminals	Accept 25–54 MHz fundamental-mode crystals; internal load caps eliminate external components
SCL/SDA	I²C serial interface	Two-wire configuration and status monitoring; compatible with standard I²C masters
INTRb	Interrupt output	Asserts on LOS/OOF/LOL events; enables real-time fault detection without polling
RSTb	Hardware reset	Hard reset restores NVM configuration; initiates full initialization sequence

Key Features

Feature	Design Value
Hitless input switching	Eliminates phase transients when switching between fractionally related clocks (e.g., 156.25 MHz ↔ 312.5 MHz), preserving system timing integrity
Programmable holdover	Uses 120-second frequency history with user-defined averaging window to minimize phase disturbance during input failure
DCO mode	Enables fine frequency tuning down to 0.001 ppb step size via FINC/FDEC pins or register control - critical for packet network synchronization
Zero-delay mode	Configures IN3 as feedback input to align output phase with selected input - essential for deterministic latency in framer applications
Status monitoring	Integrated LOS/OOF/LOL detection with interrupt flag and register flags - reduces firmware overhead for clock health management

Applications

OTN Muxponder Timing	100 GbE Synchronous Ethernet
Use Scenario: Provides low-jitter clock synthesis and jitter cleanup for OTN muxponders aggregating multiple client signals into a single DWDM wavelength. IC Role / Device Role / Timing Role: Jitter attenuator and multi-output clock generator synchronizing OTU4 framers, FEC engines, and SerDes interfaces. Use Value: Meets ITU-T G.709 jitter accumulation limits by delivering <90 fs rms jitter at 156.25 MHz and 311.04 MHz outputs.	Use Scenario: Generates compliant SyncE clocks for IEEE 802.3ba/802.3bm 100 GbE line cards requiring G.8262 EEC Option 1/2 performance. IC Role / Device Role / Timing Role: Primary timing IC providing phase-locked 100 MHz, 125 MHz, and 156.25 MHz clocks to MAC, PHY, and packet processor subsystems. Use Value: Programmable jitter attenuation bandwidth (0.1 Hz) enables optimal wander suppression while maintaining fast lock to recovered Ethernet clocks.
Broadcast Video Sync	Test & Measurement Reference
Use Scenario: Supplies synchronized, low-phase-noise clocks to SDI serializers, video processors, and genlock circuits in 4K/8K production switchers. IC Role / Device Role / Timing Role: Any-frequency clock multiplier generating SMPTE ST 2059-2–compliant 27 MHz, 74.25 MHz, and 148.5 MHz outputs from a single GPSDO or atomic reference. Use Value: Ultra-low 90 fs rms jitter ensures sub-pixel timing accuracy and eliminates visible artifacts in high-frame-rate video pipelines.	Use Scenario: Serves as programmable clock source in high-precision oscilloscopes, bit error ratio testers (BERTs), and signal analyzers requiring stable, multi-frequency references. IC Role / Device Role / Timing Role: Jitter-attenuated master oscillator providing calibrated, low-drift outputs across DC–1 GHz range for instrument sampling and triggering. Use Value: On-chip NVM retains factory-trimmed configurations; Fastlock mode reduces setup time between test sequences by >50%.

OTN Muxponder Timing

100 GbE Synchronous Ethernet

Use Scenario: Provides low-jitter clock synthesis and jitter cleanup for OTN muxponders aggregating multiple client signals into a single DWDM wavelength.

IC Role / Device Role / Timing Role: Jitter attenuator and multi-output clock generator synchronizing OTU4 framers, FEC engines, and SerDes interfaces.

Use Value: Meets ITU-T G.709 jitter accumulation limits by delivering <90 fs rms jitter at 156.25 MHz and 311.04 MHz outputs.

Use Scenario: Generates compliant SyncE clocks for IEEE 802.3ba/802.3bm 100 GbE line cards requiring G.8262 EEC Option 1/2 performance.

IC Role / Device Role / Timing Role: Primary timing IC providing phase-locked 100 MHz, 125 MHz, and 156.25 MHz clocks to MAC, PHY, and packet processor subsystems.

Use Value: Programmable jitter attenuation bandwidth (0.1 Hz) enables optimal wander suppression while maintaining fast lock to recovered Ethernet clocks.

Broadcast Video Sync

Test & Measurement Reference

Use Scenario: Supplies synchronized, low-phase-noise clocks to SDI serializers, video processors, and genlock circuits in 4K/8K production switchers.

IC Role / Device Role / Timing Role: Any-frequency clock multiplier generating SMPTE ST 2059-2–compliant 27 MHz, 74.25 MHz, and 148.5 MHz outputs from a single GPSDO or atomic reference.

Use Value: Ultra-low 90 fs rms jitter ensures sub-pixel timing accuracy and eliminates visible artifacts in high-frame-rate video pipelines.

Use Scenario: Serves as programmable clock source in high-precision oscilloscopes, bit error ratio testers (BERTs), and signal analyzers requiring stable, multi-frequency references.

IC Role / Device Role / Timing Role: Jitter-attenuated master oscillator providing calibrated, low-drift outputs across DC–1 GHz range for instrument sampling and triggering.

Use Value: On-chip NVM retains factory-trimmed configurations; Fastlock mode reduces setup time between test sequences by >50%.

Equivalent & Alternatives

The following parts are listed as comparable options for similar jitter attenuator/clock multiplier applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5345B-D-GM	Same 64-QFN package and DSPLL core, but limited to 350 MHz max output frequency and no fractional synthesis support	Suitable for lower-speed SyncE or legacy SONET where >350 MHz outputs are unnecessary	Select only if application requires ≤350 MHz outputs and cost-sensitive integer-only synthesis suffices
LTC6955IUKG-1#PBF	Linear Tech 5-output jitter cleaner; 226 fs rms jitter; fixed 1.8 V core; no on-chip NVM or holdover mode	Targeted at analog-heavy systems needing ultra-low additive jitter, not telecom-grade holdover or multi-gigabit outputs	Prefer when additive jitter floor dominates system budget and holdover/flexibility are secondary

Compared with SI5345A-B05905-GM, Si5345B-D-GM sacrifices frequency range and synthesis flexibility for lower cost, while LTC6955 prioritizes analog jitter performance over programmability and telecom resilience - making SI5345A-B05905-GM the only choice for full-featured, field-upgradable SyncE timing in 100G+ infrastructure.

Availability

SI5345A-B05905-GM is available at Aetrix Electronics and suitable for OTN muxponders, 100 GbE line cards, and broadcast video equipment requiring stable component supply, long-term lifecycle assurance, and guaranteed traceable sourcing.

Supply support for SI5345A-B05905-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The SI5345A-B05905-GM belongs to Skyworks' Si5345 family of jitter-attenuating clock multipliers, designed specifically for high-reliability telecom and datacom infrastructure demanding G.8262 compliance, multi-channel flexibility, and field-programmable timing resilience.

FAQ

What is the primary function of the SI5345A-B05905-GM in a telecom timing system?

The SI5345A-B05905-GM serves as a jitter-attenuating clock multiplier that cleans and regenerates timing signals in telecom infrastructure. It locks to noisy or wander-prone input clocks (e.g., recovered Ethernet or SONET signals), suppresses jitter via its digitally programmable DSPLL, and generates up to ten ultra-low-jitter (90 fs rms) output clocks. In systems like 100 GbE line cards, the SI5345A-B05905-GM ensures G.8262 EEC Option 1/2 compliance while supporting hitless switchover between redundant inputs - directly enabling carrier-grade timing resilience.

Does the SI5345A-B05905-GM support both I²C and SPI interfaces for configuration?

Yes, the SI5345A-B05905-GM supports both I²C and SPI serial interfaces for device configuration and status monitoring. The interface mode is selected at power-up via hardware pin strapping (MODE[1:0]) or can be set dynamically via register. I²C uses SCL/SDA pins with standard addressing; SPI uses SCLK/MOSI/MISO/SS. Both interfaces allow full access to all registers, including NVM programming, and support readback of status flags (LOS, OOF, LOL). ClockBuilder Pro software abstracts this complexity, but direct register-level control remains available for custom firmware integration.

How does the holdover capability of the SI5345A-B05905-GM improve system reliability during input clock failure?

The SI5345A-B05905-GM implements intelligent holdover by storing up to 120 seconds of historical input frequency data while locked. Upon input failure, it calculates an averaged holdover frequency from a programmable window within that history - minimizing phase jump at switchover. This ensures continuous, low-wander clock output during outages, meeting ITU-T G.8262 holdover stability requirements. Unlike basic crystal-referenced oscillators, the SI5345A-B05905-GM's holdover is adaptive and history-based, significantly improving MTBF in dual-input telecom systems.

Can the SI5345A-B05905-GM generate different output formats simultaneously (e.g., LVDS and LVCMOS)?

Yes, the SI5345A-B05905-GM supports simultaneous mixed-format outputs. Each of its ten outputs (OUT0–OUT9) is independently configurable for LVDS, LVPECL, LVCMOS, CML, or HCSL signaling, with programmable amplitude, common-mode voltage (for differential), and slew rate. Output supply pins (VDDOx) are separated, allowing 1.8 V, 2.5 V, or 3.3 V per output group. This enables direct interfacing with diverse downstream ICs - e.g., LVDS to SerDes, LVCMOS to FPGAs, and HCSL to PCIe retimers - without level-shifting components.

Is the SI5345A-B05905-GM preprogrammed, or does it require configuration after soldering?

The SI5345A-B05905-GM ships with factory-programmed non-volatile memory (NVM) containing a default configuration, but it is fully in-circuit programmable via I²C or SPI. Skyworks' ClockBuilder Pro software generates custom configuration files (.cbp) that can be written to NVM during production or in the field. The "B05905" suffix indicates a specific preprogrammed configuration optimized for multi-rate SyncE applications; however, users retain full reprogramming capability for design iterations or field updates - ensuring long-term BOM flexibility and avoiding one-time-programming constraints.

SI5345A-B05905-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: *

Package/Case:: -

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

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Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Divider/Multiplier:: -

Voltage - Supply:: -

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SI5345A-B05905-GM FAQ

1.How can I place an order for SI5345A-B05905-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5345A-B05905-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5345A-B05905-GM reliable?

The price and inventory of SI5345A-B05905-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5345A-B05905-GM is usually 5 days.

3.What payment methods are accepted for SI5345A-B05905-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5345A-B05905-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5345A-B05905-GM?

SI5345A-B05905-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5345A-B05905-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5345A-B05905-GM?

For technical support, including SI5345A-B05905-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5345A-B05905-GM requirements.

6.How does Aetrix verify that SI5345A-B05905-GM is sourced from the original manufacturer or authorized distributors?

All SI5345A-B05905-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5345A-B05905-GM meets industry standards.

7.What is the process for return or replacement of SI5345A-B05905-GM?

All SI5345A-B05905-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5345A-B05905-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5345A-B05905-GM part is unused and in its original packaging.

Return procedure for SI5345A-B05905-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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