Skyworks Solutions Inc. SI5345A-B05985-GM
- Part No.:
- SI5345A-B05985-GM
- Manufacturer:
- Skyworks Solutions Inc.
- Package:
- -
- Datasheet:
-
SI5345A-B05985-GM.pdf
- Description:
- IC CLK MULTIPLIER ATTENUATOR
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Product details
Overview
SI5345A-B05985-GM from Skyworks is a 10-channel, any-frequency jitter attenuator/clock multiplier featuring fourth-generation DSPLL™ and MultiSynth™ architectures. It delivers ultra-low 90 fs rms jitter, supports differential inputs up to 750 MHz and outputs up to 1028 MHz, and operates in free-run, locked, or holdover modes - deployed in OTN transponders and SyncE-compliant carrier Ethernet switches.
For engineers reviewing the SI5345A-B05985-GM datasheet, SI5345A-B05985-GM pinout, SI5345A-B05985-GM application, or SI5345A-B05985-GM equivalent, key selection considerations include its G.8262 EEC Option 1/2 compliance, programmable jitter attenuation bandwidth (0.1 Hz–4 kHz), 64-QFN 9×9 mm package, I²C/SPI configurability, and factory preprogrammed NVM configuration for known-power-up frequency behavior.
Technical Context
The SI5345A-B05985-GM implements a digitally controlled DSPLL with fractional input dividers (P) enabling hitless switching between fractionally related input clocks, and high-resolution MultiSynth output dividers (N) supporting integer/fractional synthesis. Its loop filter is fully integrated on-chip, eliminating external passive components and associated noise coupling risks.
It features programmable jitter attenuation bandwidth (0.1 Hz–4 kHz), Fastlock mode for accelerated lock acquisition, DCO mode with 0.001 ppb step size, and synchronized ramped holdover exit using user-defined ramp rates (0.2–40,000 ppm/s). Status monitoring includes LOS, OOF, and LOL flags with interrupt pin (INTRb) support.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Jitter (RMS) | 90 fs rms - enables meeting stringent ITU-T G.8262 EEC Option 1/2 phase noise requirements in SyncE systems. |
| Input Range (Diff) | 8 kHz–750 MHz - supports legacy SONET/SDH, modern 100G line cards, and gapped clock synchronization. |
| Output Range (Diff) | 100 Hz–1028 MHz - covers Ethernet (10M–100G), CPRI, and broadcast video timing needs across all outputs. |
| Jitter BW Control | 0.1 Hz–4 kHz digital programming - allows application-level optimization of jitter filtering vs. transient response trade-off. |
| Supply Voltages | VDD = 1.8 V ±5%; VDDA = 3.3 V ±5% - ensures low-power operation while maintaining analog PLL stability. |
| Package | 64-QFN, 9×9 mm - provides thermal performance and routing density suitable for high-speed PCBs in telecom line cards. |
| Temp Range | –40 °C to +85 °C - qualified for industrial and telecom infrastructure environments without derating. |
Pinout & Package
The SI5345A-B05985-GM is housed in a 64-pin QFN package (9×9 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks Si5345 Rev D datasheet Section 9 (Pin Descriptions).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN0–IN3 | Differential/single-ended clock inputs | Support automatic/manual switching; IN3 serves as FB_IN in zero-delay mode. |
| OUT0–OUT9 | Configurable clock outputs | Each independently assignable to any MultiSynth; support LVDS/LVPECL/LVCMOS/CML/HCSL with programmable amplitude. |
| XA/XB | Crytal oscillator terminals | Accept 25–54 MHz fundamental-mode crystal; internal load caps eliminate external capacitors. |
| SCL/SDA | I²C serial interface | Two-wire control for register access and NVM programming; compatible with standard I²C masters. |
| INTRb | Interrupt output | Active-low open-drain flag indicating LOS/OOF/LOL events; enables real-time fault monitoring. |
| RSTb | Hardware reset input | Asynchronous active-low signal triggering full initialization and NVM reload. |
Key Features
| Feature | Design Value |
|---|---|
| Hitless input switching | Eliminates phase transients when switching between fractionally related clocks - critical for hitless protection switching in telecom networks. |
| Programmable holdover history | Stores up to 120 s of locked-frequency data; uses configurable window/delay to compute stable holdover frequency after input failure. |
| Glitchless on-the-fly output changes | Enables dynamic reconfiguration of output frequencies without disrupting downstream logic - supports adaptive timing in test equipment. |
| Zero-delay mode | Configures IN3 as feedback input to align output phase with selected input - required for deterministic latency in packet-processing systems. |
| DCO mode resolution | 0.001 ppb frequency step size via FINC/FDEC pins or SPI - enables fine-grained wander correction in SyncE applications. |
Applications
| OTN Muxponders | SyncE Carrier Switches |
|---|---|
Use Scenario: Aggregating multiple client-side protocols (e.g., Fibre Channel, CPRI) into a single OTN frame for long-haul transport. IC Role / Device Role / Timing Role: Jitter attenuator and multi-rate clock generator providing clean, synchronized clocks to SERDES, FEC, and framing logic. Use Value: Meets ITU-T G.709 jitter transfer and generation masks while supporting independent 10G/40G/100G lane timing. | Use Scenario: Providing traceable, stratum-3E-compliant timing across distributed switch fabrics in mobile backhaul networks. IC Role / Device Role / Timing Role: Primary clock source implementing EEC Option 1/2 with holdover stability derived from TCXO-referenced XA/XB. Use Value: Maintains <±0.01 ppm frequency accuracy during holdover, satisfying ITU-T G.8262 wander limits over 24-hour periods. |
| Broadcast Video Systems | Test & Measurement Equipment |
Use Scenario: Synchronizing genlock, frame sync, and pixel clock domains across SDI routers, converters, and IP media gateways. IC Role / Device Role / Timing Role: Multi-output jitter cleaner generating SMPTE ST 2059–2–compliant PTP grandmaster clocks and parallel video clocks. Use Value: Delivers sub-100 fs jitter on 74.25 MHz/148.5 MHz video clocks, preventing visible artifacts in 4K/8K real-time processing. | Use Scenario: Serving as programmable reference clock engine in high-resolution oscilloscopes, bit-error-rate testers, and protocol analyzers. IC Role / Device Role / Timing Role: Configurable jitter attenuator enabling precise stimulus/response timing with adjustable loop bandwidth and DCO tuning. Use Value: Supports glitchless frequency sweeps and microsecond-scale timing adjustments via SPI-controlled MultiSynth updates. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar jitter attenuator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si5345B-D-GM | Same 4-input/10-output architecture but limited to 350 MHz max output frequency; no fractional synthesis in base configuration. | Suitable for sub-10G Ethernet and legacy SDH where >350 MHz outputs are unnecessary. | Select when cost sensitivity outweighs need for 100G+ frequency coverage or fractional synthesis flexibility. |
| LTC6955IUF#PBF | Analog Devices' 5-output jitter cleaner with 225 fs rms jitter; fixed 1.8 V core supply; no integrated crystal oscillator or holdover capability. | Targeted at RF/data converter clocking where ultra-low additive jitter dominates over telecom holdover requirements. | Choose for mixed-signal test systems needing minimal additive jitter, not for SyncE or OTN infrastructure with strict holdover specs. |
Compared with SI5345A-B05985-GM, Si5345B-D-GM trades output frequency range and synthesis flexibility for lower unit cost, while LTC6955IUF#PBF offers superior raw jitter performance but lacks telecom-grade holdover, programmable bandwidth, and multi-output configurability - making SI5345A-B05985-GM uniquely suited for field-deployable SyncE and OTN timing systems.
Availability
SI5345A-B05985-GM is available at Aetrix Electronics and suitable for OTN transponders, SyncE carrier switches, broadcast video infrastructure, and test equipment requiring stable component supply, guaranteed long-term lifecycle support, and factory-programmed configuration consistency.
Supply support for SI5345A-B05985-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for communications, automotive, and industrial markets.
The SI5345A-B05985-GM belongs to Skyworks' Si5345 family of jitter-attenuating clock multipliers, designed specifically for high-reliability telecom infrastructure demanding G.8262 compliance, seamless holdover, and multi-protocol timing flexibility.
FAQ
What is the primary function of the SI5345A-B05985-GM in a telecom timing system?
The SI5345A-B05985-GM serves as a jitter-attenuating clock multiplier that cleans and regenerates timing signals from noisy or unstable sources while generating multiple synchronized, low-jitter output clocks. In telecom systems, it enables compliance with ITU-T G.8262 EEC Option 1/2 by reducing input jitter to <90 fs rms and maintaining stable holdover timing during input failures - a core requirement in OTN and SyncE deployments where SI5345A-B05985-GM is commonly used.
Does the SI5345A-B05985-GM require an external crystal, and what frequency range is supported?
Yes, the SI5345A-B05985-GM requires an external crystal connected to the XA/XB pins for stable free-run and holdover operation. It supports crystals from 25 MHz to 54 MHz, with Skyworks recommending 48–54 MHz for optimal jitter performance. The device integrates internal load capacitors, eliminating the need for external CL components - a design feature confirmed in the Si5345 Rev D datasheet Section 3.5 and Table 5.12, ensuring SI5345A-B05985-GM achieves its specified 90 fs rms jitter.
How does the SI5345A-B05985-GM handle input clock failures in a redundant timing architecture?
Upon input clock failure, the SI5345A-B05985-GM automatically enters holdover mode using up to 120 seconds of stored historical frequency data to compute a stable averaged holdover frequency. This value is derived from a programmable time window and delay to exclude corrupted pre-failure samples. The DSPLL then pulls output frequency to this holdover value with glitchless ramping - a behavior documented in Section 3.4.5 of the Si5345 Rev D datasheet and essential for maintaining SI5345A-B05985-GM reliability in carrier-grade SyncE systems.
Can the SI5345A-B05985-GM generate different output frequencies simultaneously, and how is this configured?
Yes, the SI5345A-B05985-GM can generate up to 10 independent output frequencies simultaneously, each programmable via its own MultiSynth divider chain. Configuration is performed using Skyworks' ClockBuilder Pro™ software, which calculates exact P/N/R divider values for any input-to-output frequency mapping - including integer and fractional synthesis. These settings are stored in on-chip NVM, ensuring SI5345A-B05985-GM powers up with the intended frequency plan without host intervention.
Is the SI5345A-B05985-GM pin-compatible with other devices in the Si5345 family, such as the Si5345B-D-GM?
No, the SI5345A-B05985-GM is not pin-compatible with Si5345B-D-GM. While both share the same 64-QFN 9×9 mm package footprint and pinout definition per Skyworks' Si5345 Rev D datasheet Section 10.1, SI5345A-B05985-GM is a factory preprogrammed variant with a unique configuration encoded in its part number suffix (B05985), whereas Si5345B-D-GM is a blank, unprogrammed version requiring post-manufacture configuration. Their functional compatibility depends on programmed settings, not mechanical interchangeability.
SI5345A-B05985-GM Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- *
- Package/Case:
- -
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- -
- PLL:
- -
- Input:
- -
- Output:
- -
- Number of Circuits:
- -
- Ratio - Input:Output:
- -
- Differential - Input:Output:
- -
- Frequency - Max:
- -
- Divider/Multiplier:
- -
- Voltage - Supply:
- -
- Operating Temperature:
- -
- Mounting Type:
- -
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- -
SI5345A-B05985-GM FAQ
1.How can I place an order for SI5345A-B05985-GM through Aetrix?
Please submit a Request for Quotation (RFQ) for SI5345A-B05985-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI5345A-B05985-GM reliable?
The price and inventory of SI5345A-B05985-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5345A-B05985-GM is usually 5 days.
3.What payment methods are accepted for SI5345A-B05985-GM?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5345A-B05985-GM transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI5345A-B05985-GM?
SI5345A-B05985-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI5345A-B05985-GM order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI5345A-B05985-GM?
For technical support, including SI5345A-B05985-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5345A-B05985-GM requirements.
6.How does Aetrix verify that SI5345A-B05985-GM is sourced from the original manufacturer or authorized distributors?
All SI5345A-B05985-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5345A-B05985-GM meets industry standards.
7.What is the process for return or replacement of SI5345A-B05985-GM?
All SI5345A-B05985-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5345A-B05985-GM, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI5345A-B05985-GM part is unused and in its original packaging.
Return procedure for SI5345A-B05985-GM:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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