Skyworks Solutions Inc. SI5345A-B05985-GMR

Overview

SI5345A-B05985-GMR from Skyworks is a 10-channel, any-frequency jitter attenuator/clock multiplier featuring fourth-generation DSPLL™ and MultiSynth™ architectures. It delivers 90 fs rms jitter, supports differential inputs up to 750 MHz and outputs up to 1028 MHz, and operates in free-run, locked, or holdover modes - deployed in OTN transponders and SyncE-compliant carrier Ethernet switches.

For engineers reviewing the SI5345A-B05985-GMR datasheet, SI5345A-B05985-GMR pinout, SI5345A-B05985-GMR application, or SI5345A-B05985-GMR equivalent, key selection considerations include programmable jitter attenuation bandwidth (0.1 Hz–4 kHz), G.8262 EEC Option 1/2 compliance, hitless input switching, DCO mode with 0.001 ppb step size, and support for LVDS/LVPECL/LVCMOS/CML/HCSL output formats.

Technical Context

The SI5345A-B05985-GMR implements a digitally controlled DSPLL with fully integrated loop filter and programmable loop bandwidth (0.1 Hz–4 kHz), enabling precise jitter filtering without external components. Its MultiSynth architecture uses fractional-N synthesis (Mn/Md) and integer/fractional output dividers (Nn/Nd, Rn) to generate any output frequency from any input frequency.

It features four configurable clock inputs (IN0–IN3), automatic/manual switching with hitless and ramped transition modes, status monitoring (LOS/OOF/LOL), and in-circuit programmable OTP NVM for power-up configuration. The device supports zero-delay mode and glitchless on-the-fly frequency changes via serial interface (I²C/SPI).

Key Specifications

Pinout & Package

SI5345A-B05985-GMR is housed in a 64-pin QFN package (9×9 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks Si5345 Rev D datasheet Section 9 (Pin Descriptions). All pins support 1.8/2.5/3.3 V I/O levels depending on configuration.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar jitter attenuator applications.

Compared with SI5345A-B05985-GMR, Si5345B-D-GM1 reduces frequency range but maintains full feature parity and drop-in compatibility, while LTC6957-3 trades jitter performance, integration, and holdover capability for smaller footprint and lower BOM count in non-telecom applications.

Availability

SI5345A-B05985-GMR is available at Aetrix Electronics and suitable for OTN muxponders, SyncE carrier switches, broadcast video infrastructure, and test equipment requiring stable component supply, long-term lifecycle support, and guaranteed traceability.

Supply support for SI5345A-B05985-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5345 family is designed specifically for high-performance timing in telecom infrastructure, delivering ultra-low jitter, flexible frequency synthesis, and robust synchronization for OTN, SyncE, and broadcast systems.

FAQ

What is the primary function of the SI5345A-B05985-GMR in a telecom timing system?

The SI5345A-B05985-GMR serves as a jitter attenuator and clock multiplier that cleans and regenerates timing signals in telecom infrastructure. It locks to noisy or wandering input references (e.g., from packet networks), suppresses jitter using its digitally programmable DSPLL, and generates multiple low-jitter output clocks compliant with ITU-T G.8262. In SI5345A-B05985-GMR implementations, this enables reliable synchronization across OTN line cards and SyncE switches without external loop filters or discrete PLL components.

Does the SI5345A-B05985-GMR support automatic failover between input clocks?

Yes, the SI5345A-B05985-GMR supports both manual and automatic input clock selection with priority-based switching. Its internal state machine monitors all four inputs (IN0–IN3) for loss-of-signal (LOS), out-of-frequency (OOF), and loss-of-lock (LOL), and automatically selects the highest-priority valid input. When the active input fails, it transitions seamlessly to holdover mode or switches to another qualified input - all without glitches, thanks to hitless or ramped switching modes. This behavior is fully configurable in SI5345A-B05985-GMR via ClockBuilder Pro or direct register writes.

Can the SI5345A-B05985-GMR operate without an external crystal?

No - the SI5345A-B05985-GMR requires an external crystal (25–54 MHz) connected to XA/XB pins to provide the stable reference for free-run and holdover modes. While it can accept an external REFCLK instead of a crystal, doing so disables internal loading capacitors and may degrade jitter performance. For optimal 90 fs rms jitter and robust holdover stability - especially in SyncE pizza-box applications - Skyworks recommends a 48–54 MHz fundamental-mode crystal. The SI5345A-B05985-GMR's oscillator circuit relies on this reference to maintain frequency accuracy during lock loss.

How is the SI5345A-B05985-GMR configured and programmed?

The SI5345A-B05985-GMR is configured via I²C or SPI interface using Skyworks' ClockBuilder Pro™ software, which auto-generates register maps and validates frequency plans. Configuration data is stored in on-chip OTP NVM, ensuring known-state power-up without host intervention. Factory preprogrammed variants (e.g., custom OPNs ending in -GM) are also available. All runtime adjustments - including DCO tuning, holdover window settings, and output format changes - are supported through the serial interface. SI5345A-B05985-GMR retains full in-circuit programmability even after deployment.

Is the SI5345A-B05985-GMR pin-compatible with other devices in the Si5345 family?

Yes - all Si5345 variants (including SI5345A-B05985-GMR, Si5345B-D-GM1, and Si5345C-D-GM1) share identical 64-QFN 9×9 mm packaging and pinout. Differences lie solely in factory-programmed frequency limits and synthesis modes (integer-only vs. fractional), not hardware layout or electrical interface. This allows design reuse across performance tiers: SI5345A-B05985-GMR supports full 1028 MHz fractional synthesis, while lower-cost variants restrict output range or disable fractional-N capability - all without PCB changes.