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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Clock Generators, PLLs, Frequency Synthesizers

Skyworks Solutions Inc. SI5345A-B06103-GM

Name: SI5345A-B06103-GM
Brand: Skyworks Solutions Inc.
SKU: SI5345A-B06103-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5345A-B06103-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Clock Generators, PLLs, Frequency Synthesizers

Package:: -

Datasheet:: SI5345A-B06103-GM.pdf

Description:: IC CLK MULTIPLIER ATTENUATOR

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Product details

Overview

SI5345A-B06103-GM from Skyworks is a 10-channel, any-frequency jitter attenuator and clock multiplier IC featuring fourth-generation DSPLL™ and MultiSynth™ architectures. It delivers ultra-low 90 fs rms jitter, supports 4 differential or LVCMOS inputs and 10 programmable outputs (LVDS/LVPECL/LVCMOS/CML/HCSL), and operates across –40 to +85 °C for SyncE-compliant telecom line cards.

For engineers reviewing the SI5345A-B06103-GM datasheet, SI5345A-B06103-GM pinout, SI5345A-B06103-GM application, or SI5345A-B06103-GM equivalent, this device enables precise jitter-critical timing in OTN transponders, 100 GbE Synchronous Ethernet, and broadcast video systems requiring G.8262 EEC Option 1/2 compliance, hitless input switching, and factory-programmed NVM configuration.

Technical Context

The SI5345A-B06103-GM implements a digitally controlled DSPLL with fully integrated loop filter and programmable jitter attenuation bandwidth (0.1 Hz–4 kHz), enabling optimized phase noise filtering per application. Its MultiSynth architecture uses fractional-N synthesis (Mn/Md) and integer/fractional output dividers (Nn/Nd, Rn) to generate any output frequency from any input.

It supports three operational modes-free-run (crystal-referenced), locked (input-synchronized), and holdover (averaged historical frequency)-with glitchless on-the-fly output changes, DCO mode (0.001 ppb step), and ramped holdover exit. Input qualification includes LOS/OOF/LOL monitoring, gapped clock locking, and automatic/manual hitless switching between fractionally related inputs.

Key Specifications

Parameter	Value and Actual Design Meaning
Jitter (rms)	90 fs - meets stringent ITU-T G.8262 EEC Option 1/2 requirements for SyncE line cards
Input range	Differential: 8 kHz–750 MHz; LVCMOS: 8 kHz–250 MHz - supports legacy and high-speed network clocks
Output range	Differential: 100 Hz–1028 MHz; LVCMOS: 100 Hz–250 MHz - covers SONET/SDH, Ethernet, and video timing
DSPLL BW	0.1 Hz–4 kHz programmable - enables jitter/wander trade-off tuning for specific link budgets
Crystal support	25–54 MHz external XTAL - integrated loading capacitors eliminate external C_L, reducing noise coupling
Supply voltages	VDD = 1.8 V ±5%; VDDA = 3.3 V ±5%; independent output supply pins (1.8/2.5/3.3 V) - enables mixed-signal board integration
Interface	I²C or SPI with in-circuit programmable OTP NVM - ensures known power-up state without external configuration

Pinout & Package

SI5345A-B06103-GM is housed in a 64-pin QFN package (9 × 9 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks Si5345 Rev D datasheet Section 9 (Pin Descriptions).

Pin/Terminal	Circuit Role	Design Meaning
IN0–IN3	Differential or LVCMOS clock inputs	Support automatic/manual selection, hitless switching, and gapped clock locking; IN3 serves as FB_IN in zero-delay mode
OUT0–OUT9	Programmable differential/LVCMOS outputs	Each independently configurable for format (LVDS/LVPECL/etc.), amplitude, common-mode voltage, and enable/disable
XA/XB	Crystal oscillator terminals	Accept 25–54 MHz fundamental-mode crystal; internal load caps eliminate external components
SDA/SCL or MOSI/MISO/SCLK/CS	I²C or SPI serial interface	Configures all registers and stores settings in OTP NVM; supports in-system programming
RSTb	Active-low hardware reset	Triggers full initialization and reloads NVM defaults - required for deterministic startup after power cycle
INTRb	Interrupt output	Asserts on status events (LOS, OOF, LOL); enables real-time fault monitoring without polling

Key Features

Feature	Design Value
Any-frequency synthesis	Generates arbitrary output frequencies from any input via fractional-N DSPLL + MultiSynth dividers - eliminates need for multiple discrete oscillators
Hitless input switching	Prevents phase transients when switching between fractionally related inputs (e.g., 155.52 MHz ↔ 622.08 MHz) - critical for carrier-grade hitless protection switching
Programmable holdover	Uses 120-second stored frequency history with user-defined averaging window to minimize phase jump during input failure - meets GR-1244-CORE wander specs
Digital control oscillator (DCO)	Enables 0.001 ppb frequency fine-tuning via FINC/FDEC pins or register writes - supports IEEE 1588 PTP slave clock alignment
Zero-delay mode	Configures IN3 as feedback input to lock output phase to input with minimal latency - used in clock distribution buffers with tight skew budgets

Applications

OTN Transponders	100 GbE Synchronous Ethernet
Use Scenario: Timing recovery and jitter cleanup in 100G/400G OTN muxponders handling multiple client interfaces (e.g., 10GE, 100GE, CPRI). IC Role / Device Role / Timing Role: Jitter attenuator and multi-rate clock generator synchronizing OTU4 framing, FEC processing, and SerDes lanes to a clean, low-jitter reference. Use Value: Reduces accumulated jitter below 1 UI at 112 Gbps PAM4, ensuring BER < 1e−12 per ITU-T G.709.	Use Scenario: Providing G.8262-compliant clocking for 100GbE line cards in metro/core routers with dual-homed upstream links. IC Role / Device Role / Timing Role: Primary clock multiplier and jitter cleaner delivering EEC Option 1/2-compliant outputs to PHYs, MACs, and packet processors. Use Value: Enables seamless automatic input switching between primary and backup SyncE sources with <1 ns phase transient - meeting ITU-T G.8262 Annex A requirements.
Broadcast Video Infrastructure	Test & Measurement Equipment
Use Scenario: Genlock and frame synchronization across SDI, HDMI, and IP-based video transport (e.g., SMPTE ST 2110). IC Role / Device Role / Timing Role: Multi-output clock synthesizer generating 27 MHz, 74.25 MHz, and 148.5 MHz from a single GPSDO or atomic reference. Use Value: Maintains sub-20 ps peak-to-peak jitter across all outputs, preserving color fidelity and lip-sync accuracy in 4K/8K production switchers.	Use Scenario: Ultra-low-jitter clock source in high-resolution oscilloscopes, bit-error-rate testers, and signal analyzers requiring stable sampling clocks. IC Role / Device Role / Timing Role: Jitter-attenuated master oscillator providing clean 10 MHz, 100 MHz, and programmable RF synthesis clocks. Use Value: Achieves 90 fs rms jitter floor - directly improving instrument dynamic range and SFDR by >3 dB compared to standard XO-based solutions.

OTN Transponders

100 GbE Synchronous Ethernet

Use Scenario: Timing recovery and jitter cleanup in 100G/400G OTN muxponders handling multiple client interfaces (e.g., 10GE, 100GE, CPRI).

IC Role / Device Role / Timing Role: Jitter attenuator and multi-rate clock generator synchronizing OTU4 framing, FEC processing, and SerDes lanes to a clean, low-jitter reference.

Use Value: Reduces accumulated jitter below 1 UI at 112 Gbps PAM4, ensuring BER < 1e−12 per ITU-T G.709.

Use Scenario: Providing G.8262-compliant clocking for 100GbE line cards in metro/core routers with dual-homed upstream links.

IC Role / Device Role / Timing Role: Primary clock multiplier and jitter cleaner delivering EEC Option 1/2-compliant outputs to PHYs, MACs, and packet processors.

Use Value: Enables seamless automatic input switching between primary and backup SyncE sources with <1 ns phase transient - meeting ITU-T G.8262 Annex A requirements.

Broadcast Video Infrastructure

Test & Measurement Equipment

Use Scenario: Genlock and frame synchronization across SDI, HDMI, and IP-based video transport (e.g., SMPTE ST 2110).

IC Role / Device Role / Timing Role: Multi-output clock synthesizer generating 27 MHz, 74.25 MHz, and 148.5 MHz from a single GPSDO or atomic reference.

Use Value: Maintains sub-20 ps peak-to-peak jitter across all outputs, preserving color fidelity and lip-sync accuracy in 4K/8K production switchers.

Use Scenario: Ultra-low-jitter clock source in high-resolution oscilloscopes, bit-error-rate testers, and signal analyzers requiring stable sampling clocks.

IC Role / Device Role / Timing Role: Jitter-attenuated master oscillator providing clean 10 MHz, 100 MHz, and programmable RF synthesis clocks.

Use Value: Achieves 90 fs rms jitter floor - directly improving instrument dynamic range and SFDR by >3 dB compared to standard XO-based solutions.

Equivalent & Alternatives

The following parts are listed as comparable options for similar jitter attenuator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5345B-D-GM	Same 64-QFN package and pinout; limited to 350 MHz max output frequency (vs. 1028 MHz)	Suitable for lower-speed applications (e.g., 10G/25G Ethernet, CPRI), not 100G+ or high-frequency RF synthesis	Select if output frequencies stay ≤350 MHz and cost optimization is prioritized over full-bandwidth flexibility
LMK5B33414	TI device with 4 inputs/14 outputs; 80 fs rms jitter; supports JESD204B subclass 1; no integrated crystal oscillator	Targets JESD204B-compliant data converters and radar systems; requires external 100 MHz OCXO for lowest jitter	Choose when JESD204B deterministic latency or higher output count is required, and external precision reference is acceptable

Compared with SI5345A-B06103-GM, Si5345B-D-GM trades maximum output frequency for lower cost in sub-350 MHz designs, while LMK5B33414 offers more outputs and JESD204B support but requires external OCXO and lacks integrated crystal termination - making SI5345A-B06103-GM optimal for compact, self-contained SyncE and OTN timing where 1028 MHz bandwidth and crystal integration are essential.

Availability

SI5345A-B06103-GM is available at Aetrix Electronics and suitable for OTN transponders, 100 GbE Synchronous Ethernet line cards, and broadcast video infrastructure requiring stable component supply, long-term lifecycle assurance, and G.8262-compliant timing performance.

Supply support for SI5345A-B06103-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The SI5345 family is designed specifically for high-performance timing in telecom infrastructure, delivering jitter-attenuated, multi-output clock generation with integrated DSPLL and factory-programmable NVM for carrier-grade reliability.

FAQ

What is the primary function of the SI5345A-B06103-GM in a telecom timing system?

The SI5345A-B06103-GM serves as a jitter-attenuating clock multiplier that cleans and regenerates timing signals in OTN and SyncE systems. It accepts noisy or variable-frequency inputs (e.g., from packet networks), locks its DSPLL to them, and produces up to 10 ultra-low-jitter (90 fs rms) outputs compliant with ITU-T G.8262 EEC Option 1/2 - ensuring stable SerDes operation and frame synchronization. The SI5345A-B06103-GM achieves this using integrated loop filtering and programmable bandwidth without external components.

Does the SI5345A-B06103-GM require an external crystal, and what are the specifications?

Yes, the SI5345A-B06103-GM requires an external fundamental-mode crystal connected to XA/XB pins. Per the Skyworks datasheet, it supports crystals from 25 MHz to 54 MHz, with 48–54 MHz recommended for optimal jitter performance. The device integrates programmable load capacitance (CL), eliminating external capacitors and reducing noise coupling. The SI5345A-B06103-GM also supports external REFCLK (up to 54 MHz) via PREF divider, but crystal operation is preferred for lowest phase noise in free-run and holdover modes.

How does the SI5345A-B06103-GM handle input clock failures in carrier-grade systems?

The SI5345A-B06103-GM enters holdover mode upon input failure, using up to 120 seconds of stored frequency history to compute an averaged holdover frequency. This minimizes phase disturbance at outputs - critical for maintaining GR-1244-CORE-compliant wander. Holdover duration and stability depend on the external crystal's aging and temperature drift; for extended holdover, a TCXO on XA/XB is recommended. The SI5345A-B06103-GM asserts INTRb and status flags (LOL, OOF) to signal faults, enabling system-level failover coordination.

Can the SI5345A-B06103-GM generate different output formats simultaneously?

Yes, the SI5345A-B06103-GM supports concurrent LVDS, LVPECL, LVCMOS, CML, and HCSL outputs across its 10 channels. Each output is independently configurable for signal format, amplitude, common-mode voltage (for differential), and drive strength. This allows a single SI5345A-B06103-GM to drive diverse downstream devices - e.g., LVPECL for high-speed SerDes, LVCMOS for FPGAs, and HCSL for PCIe retimers - without level-shifting components or multiple timing ICs.

Is factory programming supported for the SI5345A-B06103-GM, and how is it configured?

Yes, the SI5345A-B06103-GM includes in-circuit programmable OTP NVM that retains configuration across power cycles. It is preprogrammed at the factory using Skyworks' ClockBuilder Pro™ software, which generates a unique configuration file mapped to the part number suffix (e.g., "B06103"). Configuration includes input/output frequencies, loop bandwidth, holdover parameters, and pin strapping options. The SI5345A-B06103-GM can also be reprogrammed in-system via I²C or SPI, enabling field updates and design iteration without hardware changes.

SI5345A-B06103-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: *

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Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

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Differential - Input:Output:: -

Frequency - Max:: -

Divider/Multiplier:: -

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SI5345A-B06103-GM FAQ

1.How can I place an order for SI5345A-B06103-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5345A-B06103-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5345A-B06103-GM reliable?

The price and inventory of SI5345A-B06103-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5345A-B06103-GM is usually 5 days.

3.What payment methods are accepted for SI5345A-B06103-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5345A-B06103-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5345A-B06103-GM?

SI5345A-B06103-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5345A-B06103-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5345A-B06103-GM?

For technical support, including SI5345A-B06103-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5345A-B06103-GM requirements.

6.How does Aetrix verify that SI5345A-B06103-GM is sourced from the original manufacturer or authorized distributors?

All SI5345A-B06103-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5345A-B06103-GM meets industry standards.

7.What is the process for return or replacement of SI5345A-B06103-GM?

All SI5345A-B06103-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5345A-B06103-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5345A-B06103-GM part is unused and in its original packaging.

Return procedure for SI5345A-B06103-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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