Skyworks Solutions Inc. SI5345A-B06318-GM

Overview

SI5345A-B06318-GM from Skyworks is a 10-channel, any-frequency jitter attenuator/clock multiplier featuring fourth-generation DSPLL™ and MultiSynth™ architectures. It delivers ultra-low 90 fs rms jitter, supports differential inputs up to 750 MHz and outputs up to 1028 MHz, and operates in free-run, locked, or holdover modes - deployed in OTN transponders and SyncE-compliant carrier Ethernet switches.

For engineers reviewing the SI5345A-B06318-GM datasheet, SI5345A-B06318-GM pinout, SI5345A-B06318-GM application, or SI5345A-B06318-GM equivalent, key selection considerations include its 64-QFN 9×9 mm package, programmable jitter attenuation bandwidth (0.1 Hz–4 kHz), G.8262 EEC Option 1/2 compliance, I²C/SPI configurability, and factory-programmed NVM configuration for guaranteed power-up frequency stability.

Technical Context

The SI5345A-B06318-GM implements a digitally controlled DSPLL with fully integrated loop filter and programmable loop bandwidth (0.1 Hz–4 kHz), enabling precise jitter filtering without external components. Its MultiSynth architecture supports fractional-N synthesis across all 10 outputs, allowing independent integer/fractional division (Nn/Nd) and output R-division for arbitrary frequency generation from any input.

It features hitless input switching between fractionally related clocks, glitchless on-the-fly output frequency changes, and DCO mode with 0.001 ppb step resolution. The device uses an internal oscillator with 25–54 MHz crystal reference (XA/XB), supports four differential/LVCMOS inputs (IN0–IN3), and provides status monitoring (LOS/OOF/LOL) via dedicated flags and INTRb pin.

Key Specifications

Pinout & Package

The SI5345A-B06318-GM is housed in a 64-pin QFN package measuring 9×9 mm with 0.5 mm pitch and exposed thermal pad. Pin functions are validated per Skyworks Si5345 64-QFN package diagram (Rev D, p.51) and Pin Descriptions section (p.45).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar jitter attenuator applications.

Compared with SI5345A-B06318-GM, Si5345B-D-GM trades output bandwidth and synthesis flexibility for cost reduction in lower-frequency systems, while LMK04832RHAT offers greater output count at the expense of jitter performance and board-level complexity from discrete loop filters.

Availability

SI5345A-B06318-GM is available at Aetrix Electronics and suitable for OTN transponders, SyncE carrier switches, broadcast video routers, and test & measurement analyzers requiring stable component supply across long-lifecycle deployments.

Supply support for SI5345A-B06318-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for infrastructure, automotive, and mobile markets.

The Si5345 family is engineered for high-performance timing in telecom and datacenter applications, delivering jitter-attenuated, multi-output clock synthesis with factory-programmable NVM and full G.8262 compliance.

FAQ

What is the primary function of the SI5345A-B06318-GM in a telecom timing system?

The SI5345A-B06318-GM serves as a jitter-attenuating clock multiplier that cleans and regenerates high-frequency reference clocks for OTN, SyncE, and 100G Ethernet line cards. Its DSPLL architecture reduces input jitter to 90 fs rms while generating up to 10 independent, phase-aligned outputs - ensuring signal integrity across SerDes, FEC, and packet processing blocks in the SI5345A-B06318-GM-based timing subsystem.

Does the SI5345A-B06318-GM require external loop filter components?

No, the SI5345A-B06318-GM integrates the entire DSPLL loop filter on-die, eliminating discrete capacitors and resistors. This removes layout sensitivity, reduces PCB area, and prevents noise coupling from external components - a key differentiator from competing jitter cleaners like the LMK04832RHAT, which mandates external loop filter design for SI5345A-B06318-GM-equivalent performance.

How does the SI5345A-B06318-GM handle loss of input clock in a carrier-grade switch?

Upon input failure, the SI5345A-B06318-GM automatically enters holdover mode using up to 120 seconds of stored frequency history. It calculates an averaged holdover frequency from a programmable time window to minimize phase disturbance - meeting ITU-T G.8262 wander specifications. Status flags (LOL, OOF) and INTRb pin alert the host controller, enabling seamless failover in SI5345A-B06318-GM-deployed SyncE systems.

Can the SI5345A-B06318-GM generate both 156.25 MHz and 312.5 MHz simultaneously from a single 25 MHz crystal?

Yes. Using its MultiSynth architecture and internal 25–54 MHz crystal reference, the SI5345A-B06318-GM can synthesize 156.25 MHz (×6.25) and 312.5 MHz (×12.5) on separate outputs with independent fractional-N division. Both outputs maintain 90 fs rms jitter and phase coherence - a capability confirmed in Skyworks' ClockBuilder Pro configuration for SI5345A-B06318-GM reference designs.

Is the SI5345A-B06318-GM pin-compatible with other Si5345 variants like Si5345B-D-GM?

Yes, all Si5345 variants including SI5345A-B06318-GM and Si5345B-D-GM share identical 64-QFN 9×9 mm packaging and pinout per Skyworks' package outline (Rev D, p.51). However, functional differences exist: SI5345A-B06318-GM supports full 1028 MHz output range and fractional synthesis, whereas Si5345B-D-GM is limited to 350 MHz and integer-only mode - requiring firmware and configuration validation when substituting SI5345A-B06318-GM.