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Skyworks Solutions Inc. SI5345B-B03475-GMR
- Part No.:
- SI5345B-B03475-GMR
- Manufacturer:
- Skyworks Solutions Inc.
- Package:
- -
- Datasheet:
-
SI5345B-B03475-GMR.pdf
- Description:
- IC CLK MULTIPLIER ATTENUATOR
- Quantity:
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Product details
Overview
SI5345B-B03475-GMR from Skyworks is a 10-channel, any-frequency jitter attenuator/clock multiplier featuring fourth-generation DSPLL™ and MultiSynth™ technologies. It delivers ultra-low 90 fs rms jitter, supports differential input frequencies up to 750 MHz and differential outputs up to 1028 MHz, and operates in free-run, synchronous, or holdover modes - deployed in OTN transponders and SyncE-compliant carrier Ethernet switches.
For engineers reviewing the SI5345B-B03475-GMR datasheet, SI5345B-B03475-GMR pinout, SI5345B-B03475-GMR application, or SI5345B-B03475-GMR equivalent, key selection considerations include its G.8262 EEC Option 1/2 compliance, programmable jitter attenuation bandwidth (0.1 Hz–4 kHz), 64-QFN 9×9 mm package, I²C/SPI programmability with on-chip NVM, and support for LVDS/LVPECL/LVCMOS/CML/HCSL output formats.
Technical Context
The SI5345B-B03475-GMR implements a digitally controlled DSPLL architecture with fractional input dividers (P), fractional MultiSynth output dividers (N), and integer R-dividers to generate any output frequency from any input. Its loop filter is fully integrated, eliminating external components and noise coupling risks.
It supports hitless, glitchless, and ramped input switching across four differential or LVCMOS inputs, with status monitoring (LOS/OOF/LOL), DCO mode (0.001 ppb step size), and zero-delay mode. The device uses an internal oscillator driven by a 25–54 MHz crystal for freerun/holdover stability and meets ITU-T G.8262 EEC Option 1 and 2 for Synchronous Ethernet.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Jitter (rms) | 90 fs - enables compliance with stringent SyncE EEC Option 1/2 and 100G line card timing budgets |
| Input range (diff) | 8 kHz–750 MHz - accepts OC-192/STM-64, PCIe Gen5, and Ethernet reference clocks without external conditioning |
| Output range (diff) | 100 Hz–1028 MHz - covers SONET/SDH, 10/40/100GbE, and broadcast video pixel clocks |
| Jitter BW | 0.1 Hz–4 kHz - digitally programmable to optimize attenuation vs. wander trade-off per application |
| Supply voltages | VDD = 1.8 V ±5%, VDDA = 3.3 V ±5% - separates digital core and analog PLL domains for noise isolation |
| Output formats | LVDS, LVPECL, LVCMOS, CML, HCSL - configurable per channel with programmable amplitude and common-mode voltage |
| Temp range | –40 °C to +85 °C - qualified for industrial and telecom infrastructure environments |
Pinout & Package
The SI5345B-B03475-GMR is housed in a 64-pin QFN package measuring 9 mm × 9 mm with exposed thermal pad, RoHS-compliant and Pb-free.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN0–IN3 | Differential/LVCMOS clock inputs | Four independent inputs supporting automatic/manual switching, gapped clock lock, and hitless transition between fractionally related sources |
| OUT0–OUT9 | Configurable clock outputs | 10 individually programmable outputs with crosspoint routing to any MultiSynth; support LVDS/LVPECL/LVCMOS/CML/HCSL with per-output voltage and termination control |
| XA/XB | Crytal/resonator interface | Connects to 25–54 MHz fundamental-mode crystal; internal load caps eliminate external capacitors and reduce noise sensitivity |
| SCL/SDA | I²C serial interface | Two-wire bus for configuration, status readback, and NVM programming; compatible with standard I²C masters |
| SCLK/MOSI/MISO/CSB | SPI serial interface | 4-wire SPI option with chip select; supports faster register access and bulk NVM writes vs. I²C |
| RSTb | Hardware reset input | Active-low asynchronous reset that reloads NVM configuration and reinitializes all internal circuits |
| INTRb | Interrupt output | Open-drain flag indicating LOS/OOF/LOL events; enables real-time fault monitoring without polling |
| VDD/VDDA/GND | Power supply pins | Dual-domain power: VDD (1.8 V) for digital logic, VDDA (3.3 V) for analog PLL and outputs; dedicated ground planes required for jitter performance |
Key Features
| Feature | Design Value |
|---|---|
| Any-frequency synthesis | Generates arbitrary output frequencies from any input via fractional P/N/R dividers - eliminates need for multiple fixed-ratio clock ICs |
| Integrated loop filter | On-chip analog filter removes external RC components, reducing BOM count and PCB area while preventing noise coupling into PLL |
| Holdover with history averaging | Stores 120 s of locked frequency data; calculates final holdover frequency from programmable window - minimizes phase jump during input failure |
| Glitchless DCO mode | Enables 0.001 ppb frequency tuning steps via FINC/FDEC pins or register writes - supports precise frequency calibration in test equipment |
| Zero-delay mode | Uses IN3 as feedback (FB_IN) to align output phase with input - critical for deterministic latency in packet-processing line cards |
Applications
| OTN Transponders | SyncE Carrier Switches |
|---|---|
Use Scenario: Aggregating 10G/100G client signals into OTU4/OTU3 payloads with strict jitter accumulation limits. IC Role / Device Role / Timing Role: Jitter attenuator and multi-rate clock multiplier providing clean, synchronized clocks to SerDes, FEC, and framing logic. Use Value: 90 fs rms jitter ensures compliance with ITU-T G.709 and GR-253-CORE mask requirements at 112 Gbaud. | Use Scenario: Providing traceable, phase-aligned clocks across distributed switch fabric and line interface modules. IC Role / Device Role / Timing Role: Primary timing engine meeting ITU-T G.8262 EEC Option 1/2 for Synchronous Ethernet distribution. Use Value: Programmable jitter attenuation bandwidth (0.1 Hz) enables optimal wander suppression in pizza-box deployments. |
| Broadcast Video Systems | Test & Measurement Equipment |
Use Scenario: Generating SMPTE ST 2082 (12G-SDI), ST 2081 (6G-SDI), and ST 424 (3G-SDI) pixel clocks from a single reference. IC Role / Device Role / Timing Role: Multi-format clock synthesizer delivering low-jitter, phase-coherent outputs for encoder/decoder ASICs and reclockers. Use Value: Independent output supply pins (1.8/2.5/3.3 V) allow direct interfacing with mixed-voltage video SoCs without level shifters. | Use Scenario: Serving as programmable clock source in high-resolution signal analyzers and arbitrary waveform generators. IC Role / Device Role / Timing Role: Digitally controlled oscillator (DCO) with sub-ppb resolution for calibration and stimulus generation. Use Value: DCO mode with 0.001 ppb step size enables traceable frequency sweeps and ultra-stable local oscillators. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar jitter attenuator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si5345A-D-GM1 | Same 10-output, 64-QFN package; supports full 0.001–1028 MHz output range with integer+fractional synthesis | Required where >350 MHz outputs (e.g., 1028 MHz SerDes references) are needed | Select SI5345B-B03475-GMR when output frequencies ≤350 MHz suffice and cost optimization is prioritized |
| LMK5B33414 | 4-output, 48-QFN; uses dual-loop architecture with integrated 2.5 GHz VCO; 95 fs rms jitter; supports JESD204B/C | Targeted at JESD204B/C-based data converters and radar systems, not SyncE or OTN | Choose LMK5B33414 only for applications requiring JESD204B/C deterministic latency and multi-device synchronization |
Compared with Si5345A-D-GM1, SI5345B-B03475-GMR trades maximum output frequency (350 MHz vs. 1028 MHz) for lower cost and reduced complexity in mid-band SyncE and OTN applications; versus LMK5B33414, it offers higher channel count and G.8262 compliance but lacks JESD204B/C features.
Availability
SI5345B-B03475-GMR is available at Aetrix Electronics and suitable for OTN transponders, Synchronous Ethernet switches, and broadcast video systems requiring stable component supply, long-term lifecycle support, and guaranteed traceability.
Supply support for SI5345B-B03475-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for communications, automotive, and industrial markets.
The Si5345 family is designed as high-performance jitter attenuators and clock multipliers for telecom infrastructure, data center networking, and precision timing applications demanding sub-100 fs jitter and G.8262 compliance.
FAQ
What is the maximum differential input frequency supported by the SI5345B-B03475-GMR?
The SI5345B-B03475-GMR supports differential input frequencies up to 750 MHz. This enables direct interface with high-speed references such as OC-192/STM-64, 10GBASE-R, and PCIe Gen5 clocks without external frequency division or conditioning circuitry. The specification is confirmed in the Si5345/44/42 Rev D Data Sheet Section 1 and Table 5.3.
Does the SI5345B-B03475-GMR meet ITU-T G.8262 Synchronous Ethernet requirements?
Yes, the SI5345B-B03475-GMR meets ITU-T G.8262 EEC Option 1 and Option 2 specifications for Synchronous Ethernet. Its ultra-low 90 fs rms jitter and programmable jitter attenuation bandwidth (0.1 Hz–4 kHz) enable compliance in both short-term jitter and long-term wander performance. This is explicitly stated in the Features List and Functional Description sections of the official Skyworks datasheet.
What package type and dimensions does the SI5345B-B03475-GMR use?
The SI5345B-B03475-GMR uses a 64-pin QFN package measuring 9 mm × 9 mm with an exposed thermal pad. It is RoHS-6 compliant and Pb-free. This package is shared across the Si5345A/B/C/D variants and is documented in Section 10.1 ("Si5345 9x9 mm 64-QFN Package Diagram") of the Rev D datasheet.
Can the SI5345B-B03475-GMR operate without an external crystal?
No - the SI5345B-B03475-GMR requires an external crystal (25–54 MHz) connected to XA/XB pins to provide the reference for freerun and holdover modes. While it can accept an external REFCLK instead of a crystal, the datasheet recommends a crystal for optimal jitter performance and specifies internal loading capacitors to simplify design. Crystal omission would disable freerun/holdover functionality.
How many clock outputs does the SI5345B-B03475-GMR provide, and what formats are supported?
The SI5345B-B03475-GMR provides 10 independently configurable clock outputs (OUT0–OUT9). Each supports LVDS, LVPECL, LVCMOS, CML, or HCSL signaling with programmable amplitude, common-mode voltage, and output supply (1.8 V, 2.5 V, or 3.3 V). This is confirmed in the Ordering Guide and Features List of the Si5345/44/42 Rev D Data Sheet.
SI5345B-B03475-GMR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- *
- Package/Case:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Type:
- -
- PLL:
- -
- Input:
- -
- Output:
- -
- Number of Circuits:
- -
- Ratio - Input:Output:
- -
- Differential - Input:Output:
- -
- Frequency - Max:
- -
- Divider/Multiplier:
- -
- Voltage - Supply:
- -
- Operating Temperature:
- -
- Mounting Type:
- -
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- -
SI5345B-B03475-GMR FAQ
1.How can I place an order for SI5345B-B03475-GMR through Aetrix?
Please submit a Request for Quotation (RFQ) for SI5345B-B03475-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI5345B-B03475-GMR reliable?
The price and inventory of SI5345B-B03475-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5345B-B03475-GMR is usually 5 days.
3.What payment methods are accepted for SI5345B-B03475-GMR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5345B-B03475-GMR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI5345B-B03475-GMR?
SI5345B-B03475-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI5345B-B03475-GMR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI5345B-B03475-GMR?
For technical support, including SI5345B-B03475-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5345B-B03475-GMR requirements.
6.How does Aetrix verify that SI5345B-B03475-GMR is sourced from the original manufacturer or authorized distributors?
All SI5345B-B03475-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5345B-B03475-GMR meets industry standards.
7.What is the process for return or replacement of SI5345B-B03475-GMR?
All SI5345B-B03475-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5345B-B03475-GMR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI5345B-B03475-GMR part is unused and in its original packaging.
Return procedure for SI5345B-B03475-GMR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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