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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Clock Generators, PLLs, Frequency Synthesizers

Skyworks Solutions Inc. SI5345B-B03779-GMR

Name: SI5345B-B03779-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5345B-B03779-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5345B-B03779-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Clock Generators, PLLs, Frequency Synthesizers

Package:: -

Datasheet:: SI5345B-B03779-GMR.pdf

Description:: IC CLK MULTIPLIER ATTENUATOR

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Product details

Overview

SI5345B-B03779-GMR from Skyworks is a 10-channel, any-frequency jitter attenuator/clock multiplier featuring fourth-generation DSPLL™ and MultiSynth™ architectures. It delivers ultra-low 90 fs rms jitter, supports differential inputs up to 750 MHz and outputs up to 1028 MHz, and operates in free-run, locked, or holdover modes - enabling precise clock synthesis for SyncE-compliant 100 GbE line cards.

For engineers reviewing the SI5345B-B03779-GMR datasheet, SI5345B-B03779-GMR pinout, SI5345B-B03779-GMR application, or SI5345B-B03779-GMR equivalent, key selection considerations include its 0.1–4 kHz digitally programmable jitter attenuation bandwidth, G.8262 EEC Option 1/2 compliance, I²C/SPI configurability with on-chip NVM, and support for LVDS/LVPECL/LVCMOS/CML/HCSL output formats with programmable amplitude.

Technical Context

The SI5345B-B03779-GMR implements a fourth-generation DSPLL with fully integrated loop filter and digitally programmable loop bandwidth (0.1 Hz–4 kHz), enabling application-tuned jitter filtering without external components. Its MultiSynth architecture provides independent fractional-N synthesis per output channel, supporting hitless switching between fractionally related inputs and glitchless on-the-fly frequency changes.

It features four configurable clock inputs (IN0–IN3), ten programmable outputs (OUT0–OUT9), and dual reference paths: external crystal (25–54 MHz) on XA/XB pins for freerun/holdover stability, plus optional REFCLK input. The device supports automatic/manual input selection, ramped holdover exit, DCO mode (0.001 ppb step size), and zero-delay mode with FB_IN on IN3.

Key Specifications

Parameter	Value and Actual Design Meaning
Jitter (rms)	90 fs - meets stringent ITU-T G.8262 EEC Option 1/2 requirements for SyncE applications
Input range (diff)	8 kHz–750 MHz - accepts common telecom and datacom reference clocks including SONET/SDH and Ethernet rates
Output range (diff)	100 Hz–1028 MHz - covers OC-192, 10/40/100 GbE, and broadcast video timing needs
Jitter BW control	0.1 Hz–4 kHz digital setting - enables optimization for wander suppression (low BW) or burst-jitter cleanup (higher BW)
Supply voltages	VDD = 1.8 V ±5%, VDDA = 3.3 V ±5% - supports low-power core logic and high-swing analog clock generation
Output formats	LVDS, LVPECL, LVCMOS, CML, HCSL - single device replaces multiple discrete clock buffers in mixed-signal systems
Temp range	–40 °C to +85 °C - qualified for industrial and telecom infrastructure environments

Pinout & Package

SI5345B-B03779-GMR is housed in a 64-pin QFN package (9 mm × 9 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks Si5345 64-QFN pinout specification (Rev D datasheet, Section 9).

Pin/Terminal	Circuit Role	Design Meaning
IN0–IN3	Primary clock inputs	Differential or LVCMOS-capable inputs; IN3 serves as FB_IN in zero-delay mode
OUT0–OUT9	Programmable clock outputs	Each independently configurable for format, amplitude, common-mode voltage, and divider ratio
XA/XB	Crystal oscillator interface	Accepts 25–54 MHz fundamental-mode crystal; internal load caps eliminate external components
SCL/SDA	I²C serial interface	Two-wire bus for configuration and status monitoring; supports hot-plug programming
CSB/SCLK/SDIO	SPI serial interface	Alternative 4-wire interface with faster register access and bulk NVM writes
INTRb	Interrupt output	Active-low open-drain flag indicating LOS, OOF, LOL, or other fault conditions
RSTb	Hardware reset	Asynchronous active-low pin triggering full initialization and NVM reload

Key Features

Feature	Design Value
Any-frequency synthesis	Generates arbitrary output frequencies from any input via fractional-N DSPLL + MultiSynth dividers - eliminates need for multiple fixed-ratio PLLs
Hitless input switching	Preserves phase continuity when switching between fractionally related inputs (e.g., 155.52 MHz ↔ 622.08 MHz) - critical for hitless protection switching in OTN
Programmable holdover	Uses 120-second frequency history window with user-defined averaging delay to minimize phase jump during input failure - ensures stable SyncE operation during network outages
DCO mode	Enables fine-grained frequency tuning (0.001 ppb steps) via FINC/FDEC pins or SPI - supports IEEE 1588 PTP slave clock alignment
Status monitoring	Real-time detection of Loss of Signal (LOS), Out of Frequency (OOF), and Loss of Lock (LOL) with interrupt assertion - enables autonomous system fault recovery

Applications

OTN Muxponder Timing	100 GbE Synchronous Ethernet
Use Scenario: Timing recovery and jitter cleaning for OTN client-side interfaces in metro/core transport nodes. IC Role / Device Role / Timing Role: Jitter attenuator and multi-rate clock multiplier generating synchronous 155.52 MHz, 622.08 MHz, and 2.488 GHz clocks from a degraded line reference. Use Value: Meets ITU-T G.783 and G.8251 jitter transfer/tolerance masks while enabling seamless interworking between legacy SDH and packet-optical layers.	Use Scenario: Clock distribution and synchronization for 100GBASE-R and OTU4 line cards requiring G.8262 EEC compliance. IC Role / Device Role / Timing Role: Primary jitter cleaner and frequency translator delivering low-wander 100 MHz/156.25 MHz clocks to SERDES and PHYs. Use Value: Achieves <90 fs rms jitter at 12 kHz–20 MHz offset, satisfying SyncE EEC Option 2 mask for carrier-grade Ethernet timing.
Broadcast Video Master Clock	Test & Measurement Reference
Use Scenario: Generation of SMPTE ST 2059-2–compliant timing signals (e.g., 27 MHz, 74.25 MHz, 148.5 MHz) for IP-based video production switchers and routers. IC Role / Device Role / Timing Role: Multi-output clock synthesizer with sub-100 fs jitter and programmable phase alignment across outputs. Use Value: Enables deterministic frame synchronization across distributed video processing units without external delay calibration.	Use Scenario: Ultra-low-jitter reference source for high-speed oscilloscopes, bit-error-rate testers, and signal analyzers. IC Role / Device Role / Timing Role: Jitter-attenuated master oscillator providing clean 10 MHz, 100 MHz, and custom frequencies to instrument backplanes. Use Value: Reduces measurement uncertainty by suppressing phase noise floor below –160 dBc/Hz at 100 kHz offset, critical for >50 GS/s sampling fidelity.

OTN Muxponder Timing

100 GbE Synchronous Ethernet

Use Scenario: Timing recovery and jitter cleaning for OTN client-side interfaces in metro/core transport nodes.

IC Role / Device Role / Timing Role: Jitter attenuator and multi-rate clock multiplier generating synchronous 155.52 MHz, 622.08 MHz, and 2.488 GHz clocks from a degraded line reference.

Use Value: Meets ITU-T G.783 and G.8251 jitter transfer/tolerance masks while enabling seamless interworking between legacy SDH and packet-optical layers.

Use Scenario: Clock distribution and synchronization for 100GBASE-R and OTU4 line cards requiring G.8262 EEC compliance.

IC Role / Device Role / Timing Role: Primary jitter cleaner and frequency translator delivering low-wander 100 MHz/156.25 MHz clocks to SERDES and PHYs.

Use Value: Achieves <90 fs rms jitter at 12 kHz–20 MHz offset, satisfying SyncE EEC Option 2 mask for carrier-grade Ethernet timing.

Broadcast Video Master Clock

Test & Measurement Reference

Use Scenario: Generation of SMPTE ST 2059-2–compliant timing signals (e.g., 27 MHz, 74.25 MHz, 148.5 MHz) for IP-based video production switchers and routers.

IC Role / Device Role / Timing Role: Multi-output clock synthesizer with sub-100 fs jitter and programmable phase alignment across outputs.

Use Value: Enables deterministic frame synchronization across distributed video processing units without external delay calibration.

Use Scenario: Ultra-low-jitter reference source for high-speed oscilloscopes, bit-error-rate testers, and signal analyzers.

IC Role / Device Role / Timing Role: Jitter-attenuated master oscillator providing clean 10 MHz, 100 MHz, and custom frequencies to instrument backplanes.

Use Value: Reduces measurement uncertainty by suppressing phase noise floor below –160 dBc/Hz at 100 kHz offset, critical for >50 GS/s sampling fidelity.

Equivalent & Alternatives

The following parts are listed as comparable options for similar jitter attenuator/clock multiplier applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5345A-D-GM1	Same 10-output 64-QFN package; supports full 0.001–1028 MHz output range with integer+fractional synthesis	Broader frequency coverage enables direct replacement in 10G/40G/100G designs requiring >350 MHz outputs	Select Si5345A-D-GM1 when needing full-bandwidth synthesis beyond the SI5345B-B03779-GMR's 350 MHz limit
LTC6957-3	4-output jitter cleaner (not multiplier); 22 fs rms jitter; fixed 1.2 GHz max output; no NVM or DSPLL architecture	Limited to low-channel-count, ultra-low-jitter fanout - lacks multi-input switching, holdover, or SyncE compliance	Choose LTC6957-3 only for simple jitter cleaning where programmability, redundancy, and telecom standards are not required

Compared with SI5345B-B03779-GMR, Si5345A-D-GM1 offers wider output frequency capability but identical pinout and feature set, whereas LTC6957-3 provides lower jitter at the cost of architectural flexibility, channel count, and standards compliance - making it unsuitable for SyncE or OTN deployments.

Availability

SI5345B-B03779-GMR is available at Aetrix Electronics and suitable for 100 GbE line cards, OTN transponders, and broadcast video infrastructure requiring stable component supply, long-term lifecycle assurance, and G.8262-compliant timing performance.

Supply support for SI5345B-B03779-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5345 family is engineered for high-performance timing in telecom infrastructure, delivering jitter-attenuated, multi-frequency clock synthesis with integrated DSPLL and non-volatile configuration storage - targeting SyncE, OTN, and broadcast video applications.

FAQ

What is the maximum differential input frequency supported by SI5345B-B03779-GMR?

The SI5345B-B03779-GMR supports differential input frequencies from 8 kHz up to 750 MHz. This range accommodates common telecom references such as 155.52 MHz (STM-1), 622.08 MHz (STM-4), and 2.488 GHz (STM-16), as well as high-speed Ethernet rates. Input signal integrity must meet Skyworks' specified slew rate and amplitude requirements per Table 5.3 of the Rev D datasheet.

Does SI5345B-B03779-GMR support ITU-T G.8262 Synchronous Ethernet compliance?

Yes, SI5345B-B03779-GMR meets ITU-T G.8262 EEC Option 1 and Option 2 specifications for Synchronous Ethernet equipment clocks. Its ultra-low 90 fs rms jitter, programmable 0.1–4 kHz attenuation bandwidth, and holdover stability with crystal-referenced freerun mode enable full compliance in carrier-grade 100 GbE line cards and muxponders.

How many output channels does SI5345B-B03779-GMR provide, and what formats are supported?

SI5345B-B03779-GMR provides ten fully independent output channels (OUT0–OUT9). Each output supports LVDS, LVPECL, LVCMOS, CML, and HCSL signaling with programmable amplitude, common-mode voltage, and polarity. Output drivers are powered by independent supply pins (VDDOx), allowing mixed-voltage operation (1.8 V, 2.5 V, or 3.3 V) across channels.

Can SI5345B-B03779-GMR operate without an external crystal?

No - SI5345B-B03779-GMR requires an external crystal (25–54 MHz) connected to XA/XB pins for freerun and holdover mode stability. While it accepts an external REFCLK instead of a crystal, doing so disables internal load capacitors and degrades jitter performance. For optimal 90 fs rms jitter and G.8262 compliance, a 48–54 MHz fundamental-mode crystal is recommended per Skyworks Application Note AN937.

What serial interfaces are supported for configuring SI5345B-B03779-GMR?

SI5345B-B03779-GMR supports both I²C (SCL/SDA) and SPI (CSB/SCLK/SDIO) serial interfaces for register configuration and status monitoring. Configuration can be stored in on-chip one-time-programmable (OTP) NVM, enabling power-up with known frequency settings. Skyworks' ClockBuilder Pro software generates complete configuration files compatible with both interfaces.

SI5345B-B03779-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: *

Package/Case:: -

Packaging:: Tape & Reel (TR)

Product Status:: Obsolete

Programmable:: Not Verified

Type:: -

PLL:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Divider/Multiplier:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: -

Grade:: -

Qualification:: -

Supplier Device Package:: -

SI5345B-B03779-GMR FAQ

1.How can I place an order for SI5345B-B03779-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5345B-B03779-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5345B-B03779-GMR reliable?

The price and inventory of SI5345B-B03779-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5345B-B03779-GMR is usually 5 days.

3.What payment methods are accepted for SI5345B-B03779-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5345B-B03779-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5345B-B03779-GMR?

SI5345B-B03779-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5345B-B03779-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5345B-B03779-GMR?

For technical support, including SI5345B-B03779-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5345B-B03779-GMR requirements.

6.How does Aetrix verify that SI5345B-B03779-GMR is sourced from the original manufacturer or authorized distributors?

All SI5345B-B03779-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5345B-B03779-GMR meets industry standards.

7.What is the process for return or replacement of SI5345B-B03779-GMR?

All SI5345B-B03779-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5345B-B03779-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5345B-B03779-GMR part is unused and in its original packaging.

Return procedure for SI5345B-B03779-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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