Skyworks Solutions Inc. SI5345B-B04202-GMR

Overview

SI5345B-B04202-GMR from Skyworks is a 10-channel, any-frequency jitter attenuator/clock multiplier with fourth-generation DSPLL™ and MultiSynth™ architecture. It delivers ultra-low 90 fs rms jitter, supports differential inputs up to 750 MHz and outputs up to 1028 MHz, and operates in free-run, locked, or holdover modes - enabling precise timing in SyncE-compliant 100 GbE line cards.

For engineers reviewing the SI5345B-B04202-GMR datasheet, SI5345B-B04202-GMR pinout, SI5345B-B04202-GMR application, or SI5345B-B04202-GMR equivalent, key selection considerations include its 0.1–4 kHz digitally programmable jitter attenuation bandwidth, G.8262 EEC Option 1/2 compliance, hitless input switching capability, and factory-programmable NVM configuration for deterministic power-up behavior.

Technical Context

The SI5345B-B04202-GMR implements a fourth-generation DSPLL with integrated loop filter and digitally programmable loop bandwidth (0.1 Hz–4 kHz), enabling application-level jitter optimization. Its MultiSynth™ dividers support both integer and fractional synthesis across all 10 outputs, with independent R-divider synchronization and crosspoint routing between any MultiSynth and any output.

It features four configurable clock inputs (IN0–IN3), status monitoring (LOS/OOF/LOL), automatic/manual hitless or ramped input switching, and DCO mode with 0.001 ppb step resolution. The device uses an external 25–54 MHz crystal on XA/XB for freerun/holdover stability and supports LVDS, LVPECL, LVCMOS, CML, and HCSL output formats with programmable amplitude and common-mode voltage.

Key Specifications

Pinout & Package

The SI5345B-B04202-GMR is housed in a 64-pin QFN package (9 × 9 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks Si5345 64-QFN package outline (Rev D).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar jitter attenuator applications.

Compared with Si5345A-B04202-GMR, the SI5345B-B04202-GMR trades maximum output frequency (350 MHz vs. 1028 MHz) for tighter specification control and lower cost in SyncE-optimized deployments; versus LMK04832RHAR, it provides fully integrated jitter attenuation with no external loop components but lacks dual-loop redundancy for mission-critical RF systems.

Availability

SI5345B-B04202-GMR is available at Aetrix Electronics and suitable for OTN muxponders, 100 GbE Synchronous Ethernet switches, and broadcast video infrastructure requiring stable component supply, long-term lifecycle assurance, and factory-programmed configuration traceability.

Supply support for SI5345B-B04202-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The SI5345B-B04202-GMR belongs to Skyworks' Si5345 family of jitter-attenuating clock multipliers, designed specifically for high-reliability telecom infrastructure where deterministic jitter performance, holdover stability, and multi-protocol timing flexibility are mandatory.

FAQ

What is the maximum output frequency supported by the SI5345B-B04202-GMR?

The SI5345B-B04202-GMR supports a maximum differential output frequency of 350 MHz, as specified in Skyworks' Si5345 Ordering Guide for "B"-grade devices. This is distinct from the "A" variant (e.g., SI5345A-B04202-GMR), which supports up to 1028 MHz. The 350 MHz limit applies to all 10 outputs and is verified in the Rev D datasheet's Ordering Guide table under Si5345B-D-GM1,2 part numbers.

Does the SI5345B-B04202-GMR require an external loop filter?

No, the SI5345B-B04202-GMR integrates the entire DSPLL loop filter on-die, eliminating discrete components and associated noise coupling risks. This is confirmed in the Rev D datasheet's Functional Description section, which states: "The loop filter is fully integrated on-chip, eliminating the risk of noise coupling associated with discrete solutions." The device achieves stable operation across its full 0.1–4 kHz programmable bandwidth without external passive elements.

How is the SI5345B-B04202-GMR configured for factory-programmed operation?

The SI5345B-B04202-GMR uses in-circuit programmable non-volatile memory (NVM) to store configuration data. Factory programming is performed using Skyworks' ClockBuilder Pro™ software, which generates a unique preprogrammed part number (e.g., SI5345B-Dxxxxx-GM). Configuration includes input/output frequencies, signal formats, loop bandwidth, and operational modes - ensuring the SI5345B-B04202-GMR powers up with known, validated timing behavior every time.

What input clock types does the SI5345B-B04202-GMR support?

The SI5345B-B04202-GMR accepts four input clocks (IN0–IN3) configurable as either differential (LVDS/LVPECL/CML) or single-ended LVCMOS. Differential input range is 8 kHz–750 MHz; LVCMOS input range is 8 kHz–250 MHz. The device also locks to gapped clocks and supports automatic/manual hitless switching between inputs - all documented in Sections 3.7 and 3.7.7 of the Rev D datasheet.

Is the SI5345B-B04202-GMR compliant with ITU-T G.8262 for Synchronous Ethernet?

Yes, the SI5345B-B04202-GMR meets ITU-T G.8262 EEC Option 1 and Option 2 specifications, as explicitly stated in the Rev D datasheet's Features List and Applications sections. Its 90 fs rms jitter, programmable sub-1 Hz loop bandwidth, and robust holdover performance ensure compliance in carrier-grade Ethernet timing applications such as 100GbE line cards and aggregation switches.