Skyworks Solutions Inc. SI5345B-B04311-GMR

Overview

SI5345B-B04311-GMR from Skyworks is a 10-channel, any-frequency jitter attenuator/clock multiplier with fourth-generation DSPLL™ and MultiSynth™ architecture. It delivers ultra-low 90 fs rms jitter, supports differential inputs up to 750 MHz and outputs up to 1028 MHz, and operates in free-run, locked, or holdover modes - enabling precise timing in SyncE-compliant carrier Ethernet switches and OTN transponders.

For engineers reviewing the SI5345B-B04311-GMR datasheet, SI5345B-B04311-GMR pinout, SI5345B-B04311-GMR application, or SI5345B-B04311-GMR equivalent, key selection considerations include its 0.1–4 kHz digitally programmable jitter attenuation bandwidth, G.8262 EEC Option 1/2 compliance, I²C/SPI programmability with on-chip NVM, and support for LVDS/LVPECL/LVCMOS/CML/HCSL output formats with independent supply pins.

Technical Context

The SI5345B-B04311-GMR implements a fourth-generation DSPLL with fully integrated loop filter and digitally configurable loop bandwidth (0.1 Hz–4 kHz), enabling application-level jitter optimization. Its MultiSynth architecture uses fractional-N synthesis (Mn/Md) and integer-R division to generate any output frequency from any input frequency across 10 independent outputs.

It features hitless and glitchless input switching between up to four differential or LVCMOS inputs, programmable holdover averaging over up to 120 s of historical lock data, and DCO mode with 0.001 ppb step resolution - all controlled via I²C or SPI with factory-programmable NVM configuration.

Key Specifications

Pinout & Package

The SI5345B-B04311-GMR is housed in a 64-pin QFN package (9×9 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks Si5345 Rev D datasheet Section 9 (Pin Descriptions).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar jitter attenuator applications.

Compared with SI5345A-B04311-GMR, the SI5345B-B04311-GMR trades maximum output frequency (≤350 MHz vs. ≤1028 MHz) for tighter specification control and lower unit cost - while retaining identical jitter performance, DSPLL architecture, and SyncE compliance. Against LTC6957IUF-3#PBF, it adds holdover, NVM, DCO, and 10-output flexibility at the expense of higher BOM count and design complexity.

Availability

SI5345B-B04311-GMR is available at Aetrix Electronics and suitable for carrier Ethernet switches, OTN transponders, broadcast video infrastructure, and test equipment requiring stable component supply with guaranteed long-term lifecycle support.

Supply support for SI5345B-B04311-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for communications, automotive, and industrial markets.

The SI5345B-B04311-GMR belongs to Skyworks' Si5345 family of jitter attenuators - engineered specifically for telecom infrastructure demanding G.8262-compliant timing, robust holdover, and multi-gigabit serial interface clocking.

FAQ

What is the maximum output frequency supported by the SI5345B-B04311-GMR?

The SI5345B-B04311-GMR supports differential output frequencies up to 350 MHz and LVCMOS outputs up to 250 MHz. This is defined by its "B" variant designation in the Skyworks ordering guide (Si5345B-D-GM1/2), distinguishing it from the "A" variant which supports up to 1028 MHz. The limitation is silicon-configured and cannot be overridden via programming.

Does the SI5345B-B04311-GMR meet ITU-T G.8262 Synchronous Ethernet requirements?

Yes, the SI5345B-B04311-GMR meets ITU-T G.8262 EEC Option 1 and Option 2 specifications for synchronous Ethernet equipment clocks. Its 90 fs rms jitter performance, programmable jitter attenuation bandwidth (0.1–4 kHz), and holdover stability with averaged frequency history directly satisfy the phase noise, wander, and holdover criteria defined in G.8262.

How is the SI5345B-B04311-GMR configured - does it require external programming hardware?

The SI5345B-B04311-GMR is configured via I²C or SPI interface and stores settings in on-chip one-time-programmable (OTP) NVM. No external programming hardware is required after initial configuration: it powers up with the last-written frequency plan. Skyworks ClockBuilder Pro software generates register maps and configuration files; factory preprogrammed units (e.g., SI5345B-B04311-GMR) ship with validated configurations ready for deployment.

What crystal frequency should be used with the SI5345B-B04311-GMR for optimal jitter performance?

For optimal jitter performance, Skyworks recommends a 48–54 MHz fundamental-mode crystal connected to XA/XB. The SI5345B-B04311-GMR's internal oscillator circuit and integrated load capacitors are optimized for this range; crystals outside 25–54 MHz may degrade jitter or prevent lock. A 50 MHz crystal is commonly used to balance availability, cost, and phase noise.

Can the SI5345B-B04311-GMR operate without an external crystal?

No - the SI5345B-B04311-GMR requires either an external crystal (25–54 MHz) on XA/XB or an external reference clock (REFCLK) applied to those pins. The internal oscillator (OSC) depends on this reference for free-run and holdover operation. Omitting the crystal or REFCLK will prevent stable output generation in freerun or holdover modes, though locked-mode operation may persist temporarily if valid input clocks are present.