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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Clock Generators, PLLs, Frequency Synthesizers

Skyworks Solutions Inc. SI5345B-B04674-GMR

Name: SI5345B-B04674-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5345B-B04674-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5345B-B04674-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Clock Generators, PLLs, Frequency Synthesizers

Package:: -

Datasheet:: SI5345B-B04674-GMR.pdf

Description:: IC CLK MULTIPLIER ATTENUATOR

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Product details

Overview

SI5345B-B04674-GMR from Skyworks is a 10-channel, any-frequency jitter attenuator/clock multiplier with fourth-generation DSPLL™ and MultiSynth™ architecture. It delivers ultra-low 90 fs rms jitter, supports differential inputs up to 750 MHz and outputs up to 1028 MHz, and operates in free-run, locked, or holdover modes - enabling precise clock synthesis for SyncE-compliant 100 GbE line cards.

For engineers reviewing the SI5345B-B04674-GMR datasheet, SI5345B-B04674-GMR pinout, SI5345B-B04674-GMR application, or SI5345B-B04674-GMR equivalent, key selection considerations include its 0.1–4 kHz digitally programmable jitter attenuation bandwidth, G.8262 EEC Option 1/2 compliance, I²C/SPI configurability with on-chip NVM, and support for LVDS/LVPECL/LVCMOS/CML/HCSL output formats with programmable amplitude.

Technical Context

The SI5345B-B04674-GMR implements a fourth-generation DSPLL with fully integrated loop filter and fractional input dividers (P) enabling hitless switching between fractionally related input clocks. Its MultiSynth output dividers (N) support both integer and fractional synthesis, while independent R-dividers allow final frequency tuning per output channel.

It features programmable holdover with 120-second frequency history averaging, DCO mode with 0.001 ppb step size, fastlock acquisition using temporary higher loop bandwidth (100 Hz–4 kHz), and glitchless on-the-fly output frequency changes - all controlled via I²C or SPI interface with factory-programmable OTP memory.

Key Specifications

Parameter	Value and Actual Design Meaning
Jitter (rms)	90 fs - meets stringent ITU-T G.8262 EEC Option 1/2 requirements for Synchronous Ethernet timing recovery
Input range (diff)	8 kHz–750 MHz - supports OC-192, SONET, and high-speed serial protocols without external conditioning
Output range (diff)	100 Hz–1028 MHz - covers Ethernet, CPRI, OTN, and broadcast video clocking needs across all channels
Jitter BW control	0.1 Hz–4 kHz digital programming - enables application-specific optimization of jitter filtering vs. wander rejection
Supply voltages	VDD = 1.8 V ±5%, VDDA = 3.3 V ±5% - ensures low-power operation with independent output supply pins (1.8/2.5/3.3 V)
Temp range	–40 °C to +85 °C - qualified for industrial and telecom infrastructure environments including line cards and muxponders
Package	64-QFN 9×9 mm - surface-mount compatible with standard reflow profiles and thermal management for high-density PCBs

Pinout & Package

SI5345B-B04674-GMR uses a 64-pin QFN package (9 mm × 9 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks Si5345 64-QFN pinout specification (Rev D datasheet, Section 9).

Pin/Terminal	Circuit Role	Design Meaning
IN0–IN3	Differential/single-ended clock inputs	Four configurable inputs supporting automatic/manual switching; IN3 serves as FB_IN in zero-delay mode
OUT0–OUT9	Programmable clock outputs	10 independently configurable outputs with format (LVDS/LVPECL/etc.), amplitude, and common-mode voltage control
XA/XB	Crytal oscillator terminals	Connects 25–54 MHz fundamental-mode crystal; internal load caps eliminate external components
SCL/SDA	I²C serial interface	Two-wire bus for configuration and status monitoring; supports hot-plug and in-system programming
INTRb	Interrupt output	Active-low open-drain flag indicating LOS/OOF/LOL events for system-level fault handling
RSTb	Hardware reset	Asynchronous active-low pin initiating full initialization and NVM reload

Key Features

Feature	Design Value
Any-frequency synthesis	Generates arbitrary output frequencies from any input frequency using fractional P/N/R dividers - eliminates need for multiple fixed-ratio PLLs
Hitless input switching	Prevents phase transients when switching between fractionally related inputs - critical for seamless failover in carrier-grade systems
Programmable holdover	Uses 120 s of stored frequency history with user-defined averaging window to minimize phase disturbance during input loss
DCO mode	Enables fine frequency adjustment (0.001 ppb steps) via FINC/FDEC pins or register writes - supports dynamic timing calibration
Status monitoring	Integrated LOS (loss of signal), OOF (out of frequency), LOL (loss of lock) detection with interrupt reporting - reduces external monitoring circuitry

Applications

OTN Muxponders	100 GbE Line Cards
Use Scenario: Aggregating multiple client-side rates (e.g., 10G, 25G) into a single 100G OTU4 line-side interface with strict jitter compliance. IC Role / Device Role / Timing Role: Jitter attenuator and multi-rate clock multiplier providing clean, synchronized clocks to SerDes and FEC blocks. Use Value: Meets ITU-T G.709 and G.8262 EEC Option 2 mask requirements at 100G line rate with <90 fs rms jitter.	Use Scenario: Clock distribution across multiple MAC/PHY layers in a modular 100GbE switch fabric requiring phase-aligned, low-jitter references. IC Role / Device Role / Timing Role: Centralized clock synthesizer generating independent, programmable frequencies for host CPU, packet processor, and optical modules. Use Value: Eliminates discrete clock trees; supports simultaneous LVDS (SerDes), LVCMOS (control logic), and HCSL (PCIe) outputs from one device.
Broadcast Video Timing	Test & Measurement Equipment
Use Scenario: Genlock and frame synchronization across SDI, HDMI, and IP-based video processing pipelines with sub-sample jitter tolerance. IC Role / Device Role / Timing Role: Precision jitter cleaner and format converter delivering SMPTE ST 2059-2–compliant PTP grandmaster clocks. Use Value: Achieves <1 ns peak-to-peak jitter on 27 MHz/74.25 MHz video clocks - preserves color fidelity and lip-sync accuracy.	Use Scenario: Reference clock generation in high-resolution oscilloscopes and bit-error-rate testers where measurement repeatability depends on clock stability. IC Role / Device Role / Timing Role: Ultra-low-jitter source for ADC sampling clocks and pattern generator timing engines. Use Value: 90 fs rms jitter directly translates to <0.001 LSB noise floor degradation in 16-bit+ data converters.

OTN Muxponders

100 GbE Line Cards

Use Scenario: Aggregating multiple client-side rates (e.g., 10G, 25G) into a single 100G OTU4 line-side interface with strict jitter compliance.

IC Role / Device Role / Timing Role: Jitter attenuator and multi-rate clock multiplier providing clean, synchronized clocks to SerDes and FEC blocks.

Use Value: Meets ITU-T G.709 and G.8262 EEC Option 2 mask requirements at 100G line rate with <90 fs rms jitter.

Use Scenario: Clock distribution across multiple MAC/PHY layers in a modular 100GbE switch fabric requiring phase-aligned, low-jitter references.

IC Role / Device Role / Timing Role: Centralized clock synthesizer generating independent, programmable frequencies for host CPU, packet processor, and optical modules.

Use Value: Eliminates discrete clock trees; supports simultaneous LVDS (SerDes), LVCMOS (control logic), and HCSL (PCIe) outputs from one device.

Broadcast Video Timing

Test & Measurement Equipment

Use Scenario: Genlock and frame synchronization across SDI, HDMI, and IP-based video processing pipelines with sub-sample jitter tolerance.

IC Role / Device Role / Timing Role: Precision jitter cleaner and format converter delivering SMPTE ST 2059-2–compliant PTP grandmaster clocks.

Use Value: Achieves <1 ns peak-to-peak jitter on 27 MHz/74.25 MHz video clocks - preserves color fidelity and lip-sync accuracy.

Use Scenario: Reference clock generation in high-resolution oscilloscopes and bit-error-rate testers where measurement repeatability depends on clock stability.

IC Role / Device Role / Timing Role: Ultra-low-jitter source for ADC sampling clocks and pattern generator timing engines.

Use Value: 90 fs rms jitter directly translates to <0.001 LSB noise floor degradation in 16-bit+ data converters.

Equivalent & Alternatives

The following parts are listed as comparable options for similar jitter attenuator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5345A-D-GM1	Supports full 0.001–1028 MHz output range with integer+fractional synthesis; SI5345B-B04674-GMR limited to ≤350 MHz outputs	Required for >350 MHz applications (e.g., 100G KR4, CPRI Option 3); not needed for SyncE line cards operating ≤156.25 MHz	Select Si5345A-D-GM1 only if output frequencies exceed 350 MHz or fractional synthesis is mandatory for specific ratios
LTC6957-3	Lower channel count (4 outputs), no on-chip NVM, 115 fs rms jitter, supports only integer synthesis	Suitable for cost-sensitive, lower-channel-count applications where holdover and hitless switching are not required	Choose LTC6957-3 for simpler designs needing basic jitter cleaning without programmable holdover or multi-synthesis flexibility

Compared with Si5345A-D-GM1, SI5345B-B04674-GMR trades maximum output frequency for optimized cost and power in sub-350 MHz SyncE deployments; versus LTC6957-3, it adds critical telecom features - integrated NVM, hitless switching, and programmable holdover - at higher channel density and lower jitter.

Availability

SI5345B-B04674-GMR is available at Aetrix Electronics and suitable for OTN muxponders, 100 GbE line cards, and broadcast video equipment requiring stable component supply, long-term lifecycle support, and G.8262-compliant timing performance.

Supply support for SI5345B-B04674-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, and infrastructure markets.

The Si5345 family is designed specifically for high-performance timing in telecom and datacenter applications - delivering jitter-attenuated, multi-output clock synthesis with carrier-grade reliability and SyncE compliance.

FAQ

What is the maximum output frequency supported by SI5345B-B04674-GMR?

The SI5345B-B04674-GMR supports differential output frequencies up to 350 MHz, as specified in Skyworks' Ordering Guide for Si5345B variants. This is lower than the full Si5345A range (up to 1028 MHz) but sufficient for Synchronous Ethernet (SyncE) applications such as 156.25 MHz, 312.5 MHz, and 625 MHz line rates. The 350 MHz limit applies regardless of output format (LVDS, LVPECL, etc.) and is enforced by internal synthesis constraints.

Does SI5345B-B04674-GMR support G.8262 EEC compliance?

Yes, SI5345B-B04674-GMR meets ITU-T G.8262 EEC Option 1 and Option 2 specifications for Synchronous Ethernet equipment clocks. Its 90 fs rms jitter performance, programmable jitter attenuation bandwidth (0.1–4 kHz), and holdover stability with 120-second frequency history averaging ensure compliance under both locked and holdover conditions - validated per Skyworks Rev D datasheet Section 5 Electrical Specifications.

How is SI5345B-B04674-GMR configured and programmed?

SI5345B-B04674-GMR is configured via I²C or SPI serial interface and stores settings in on-chip non-volatile OTP memory. Configuration is typically performed using Skyworks' ClockBuilder Pro™ software, which generates register maps and validates frequency plans. Factory preprogrammed units (like SI5345B-B04674-GMR) ship with a fixed configuration; field reprogramming is supported without requiring external hardware programmers.

What package type and footprint does SI5345B-B04674-GMR use?

SI5345B-B04674-GMR uses a 64-pin QFN package measuring 9 mm × 9 mm with 0.5 mm pitch and an exposed thermal pad. It follows the standard Si5345 64-QFN land pattern (Skyworks Document No. 200994, Package Outline Drawing), compatible with IPC-7351B Class B standards and standard reflow soldering profiles for RoHS-compliant assembly.

Can SI5345B-B04674-GMR operate without an external crystal?

No - SI5345B-B04674-GMR requires an external 25–54 MHz fundamental-mode crystal connected to XA/XB pins for stable free-run and holdover operation. While it accepts external REFCLK on XA/XB, the datasheet specifies that optimal jitter performance (including the rated 90 fs rms) is achieved only with a crystal; TCXO is recommended for SyncE pizza-box applications requiring ultra-low wander. Internal oscillator circuitry mandates this reference.

SI5345B-B04674-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: *

Package/Case:: -

Packaging:: Tape & Reel (TR)

Product Status:: Obsolete

Programmable:: Not Verified

Type:: -

PLL:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Divider/Multiplier:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: -

Grade:: -

Qualification:: -

Supplier Device Package:: -

SI5345B-B04674-GMR FAQ

1.How can I place an order for SI5345B-B04674-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5345B-B04674-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5345B-B04674-GMR reliable?

The price and inventory of SI5345B-B04674-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5345B-B04674-GMR is usually 5 days.

3.What payment methods are accepted for SI5345B-B04674-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5345B-B04674-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5345B-B04674-GMR?

SI5345B-B04674-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5345B-B04674-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5345B-B04674-GMR?

For technical support, including SI5345B-B04674-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5345B-B04674-GMR requirements.

6.How does Aetrix verify that SI5345B-B04674-GMR is sourced from the original manufacturer or authorized distributors?

All SI5345B-B04674-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5345B-B04674-GMR meets industry standards.

7.What is the process for return or replacement of SI5345B-B04674-GMR?

All SI5345B-B04674-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5345B-B04674-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5345B-B04674-GMR part is unused and in its original packaging.

Return procedure for SI5345B-B04674-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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