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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Clock Generators, PLLs, Frequency Synthesizers

Skyworks Solutions Inc. SI5345B-B04753-GMR

Name: SI5345B-B04753-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5345B-B04753-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5345B-B04753-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Clock Generators, PLLs, Frequency Synthesizers

Package:: -

Datasheet:: SI5345B-B04753-GMR.pdf

Description:: IC CLK MULTIPLIER ATTENUATOR

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Product details

Overview

SI5345B-B04753-GMR from Skyworks is a 10-channel, any-frequency jitter attenuator/clock multiplier with fourth-generation DSPLL™ and MultiSynth™ architecture. It delivers ultra-low 90 fs rms jitter, supports differential inputs up to 750 MHz and outputs up to 1028 MHz, and operates in free-run, locked, or holdover modes - enabling precise clock synthesis for SyncE-compliant 100 GbE line cards.

For engineers reviewing the SI5345B-B04753-GMR datasheet, SI5345B-B04753-GMR pinout, SI5345B-B04753-GMR application, or SI5345B-B04753-GMR equivalent, key selection considerations include its 0.1–4 kHz digitally programmable jitter attenuation bandwidth, G.8262 EEC Option 1/2 compliance, hitless input switching capability, and factory-programmed configuration stored in on-chip NVM.

Technical Context

The SI5345B-B04753-GMR implements a fourth-generation DSPLL with fully integrated loop filter and digitally programmable loop bandwidth (0.1 Hz to 4 kHz), enabling application-level jitter optimization. Its MultiSynth™ fractional-N dividers support both integer and fractional output synthesis across all 10 outputs.

It features four selectable differential or LVCMOS inputs (IN0–IN3), automatic/manual input switching with hitless and ramped transition modes, and status monitoring (LOS/OOF/LOL). The device uses an external 25–54 MHz crystal on XA/XB pins for freerun/holdover reference stability and supports DCO mode with 0.001 ppb step size.

Key Specifications

Parameter	Value and Actual Design Meaning
Jitter (rms)	90 fs - meets stringent SyncE EEC Option 1/2 phase noise requirements for 100G transport systems
Input range (diff)	8 kHz–750 MHz - accepts SONET/SDH, OTN, and Ethernet reference clocks without external conditioning
Output range (diff)	100 Hz–1028 MHz - covers all common SerDes rates including 10.3125 Gbps, 25.78125 Gbps, and 53.125 Gbps
Jitter BW	0.1–4 kHz - digitally configurable to optimize attenuation vs. wander trade-off per application
Supply voltages	VDD = 1.8 V ±5%, VDDA = 3.3 V ±5% - enables low-power operation with independent output supply pins (1.8/2.5/3.3 V)
Temp range	–40 to +85 °C - qualified for industrial and telecom infrastructure environments
Compliance	ITU-T G.8262 EEC Option 1 & 2 - certified for Synchronous Ethernet line-card deployment

Pinout & Package

The SI5345B-B04753-GMR is housed in a 64-pin QFN package (9 × 9 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks Si5345 64-QFN pinout specification.

Pin/Terminal	Circuit Role	Design Meaning
IN0–IN3	Differential/LVCMOS input	Four selectable clock inputs supporting automatic priority-based switching and gapped clock lock
OUT0–OUT9	Programmable output	10 independently configurable outputs supporting LVDS/LVPECL/LVCMOS/CML/HCSL with amplitude control
XA/XB	Crystal oscillator interface	Connects to 25–54 MHz fundamental-mode crystal; internal load caps eliminate external components
SCL/SDA	I²C serial interface	Two-wire bus for configuration, status readback, and NVM programming in-system
INTRb	Interrupt output	Active-low open-drain flag indicating LOS/OOF/LOL events for system fault monitoring

Key Features

Feature	Design Value
Any-frequency synthesis	Generates arbitrary output frequencies from any input frequency using fractional P/N/R dividers
Hitless input switching	Eliminates phase transients when switching between fractionally related inputs (e.g., 156.25 MHz ↔ 312.5 MHz)
Holdover with history averaging	Stores 120 s of locked frequency data; calculates final holdover value from programmable window to minimize phase jump
Fastlock acquisition	Temporarily increases loop bandwidth (100 Hz–4 kHz) during lock acquisition to reduce settling time
DCO mode	Enables fine frequency tuning (0.001 ppb steps) via FINC/FDEC pins or register control for timing calibration

Applications

OTN Muxponder	100GbE Synchronous Ethernet
Use Scenario: Aggregating multiple client-side OTN signals into a single line-side wavelength with strict jitter accumulation limits. IC Role / Device Role / Timing Role: Jitter attenuator and multi-rate clock multiplier providing clean, synchronized clocks to OTN framers and FEC engines. Use Value: 90 fs rms jitter ensures compliance with ITU-T G.709 OPUk/ODUk jitter masks and prevents BER degradation across cascaded nodes.	Use Scenario: Line card in carrier-grade switch supporting IEEE 1588v2 PTP and ITU-T G.8262 SyncE distribution. IC Role / Device Role / Timing Role: Primary clock synthesizer generating 156.25 MHz, 312.5 MHz, and 625 MHz clocks for SerDes, MAC, and PHY layers. Use Value: G.8262 EEC Option 1/2 compliance guarantees traceable timing hierarchy and eliminates packet delay variation in metro networks.
Broadcast Video Master Clock	Test & Measurement Reference
Use Scenario: Generating genlock-capable reference clocks for SMPTE ST 2059-2 compliant video routers and IP media gateways. IC Role / Device Role / Timing Role: Low-jitter master oscillator distributing 27 MHz, 74.25 MHz, and 148.5 MHz clocks across baseband processing stages. Use Value: Sub-100 fs jitter preserves color fidelity and frame sync integrity in 4K/8K UHD workflows with minimal timing-induced artifacts.	Use Scenario: Precision clock source in high-end oscilloscopes and bit-error-rate testers requiring ultra-stable sampling clocks. IC Role / Device Role / Timing Role: Programmable jitter cleaner and frequency translator synchronizing ADC/DAC sampling to external references. Use Value: Digitally adjustable jitter attenuation bandwidth allows optimization for specific measurement bandwidths (e.g., 100 Hz for phase noise analysis).

OTN Muxponder

100GbE Synchronous Ethernet

Use Scenario: Aggregating multiple client-side OTN signals into a single line-side wavelength with strict jitter accumulation limits.

IC Role / Device Role / Timing Role: Jitter attenuator and multi-rate clock multiplier providing clean, synchronized clocks to OTN framers and FEC engines.

Use Value: 90 fs rms jitter ensures compliance with ITU-T G.709 OPUk/ODUk jitter masks and prevents BER degradation across cascaded nodes.

Use Scenario: Line card in carrier-grade switch supporting IEEE 1588v2 PTP and ITU-T G.8262 SyncE distribution.

IC Role / Device Role / Timing Role: Primary clock synthesizer generating 156.25 MHz, 312.5 MHz, and 625 MHz clocks for SerDes, MAC, and PHY layers.

Use Value: G.8262 EEC Option 1/2 compliance guarantees traceable timing hierarchy and eliminates packet delay variation in metro networks.

Broadcast Video Master Clock

Test & Measurement Reference

Use Scenario: Generating genlock-capable reference clocks for SMPTE ST 2059-2 compliant video routers and IP media gateways.

IC Role / Device Role / Timing Role: Low-jitter master oscillator distributing 27 MHz, 74.25 MHz, and 148.5 MHz clocks across baseband processing stages.

Use Value: Sub-100 fs jitter preserves color fidelity and frame sync integrity in 4K/8K UHD workflows with minimal timing-induced artifacts.

Use Scenario: Precision clock source in high-end oscilloscopes and bit-error-rate testers requiring ultra-stable sampling clocks.

IC Role / Device Role / Timing Role: Programmable jitter cleaner and frequency translator synchronizing ADC/DAC sampling to external references.

Use Value: Digitally adjustable jitter attenuation bandwidth allows optimization for specific measurement bandwidths (e.g., 100 Hz for phase noise analysis).

Equivalent & Alternatives

The following parts are listed as comparable options for similar jitter attenuator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5345A-B04752-GMR	Same 10-output architecture but supports full 0.001–1028 MHz output range with integer+fractional synthesis; SI5345B-B04753-GMR limited to ≤350 MHz outputs	Required for >350 MHz SerDes rates (e.g., 53.125 Gbps PAM4); SI5345B-B04753-GMR sufficient for 10/25/40 GbE	Select SI5345A-B04752-GMR only if outputs above 350 MHz are needed; otherwise SI5345B-B04753-GMR offers cost-optimized performance for sub-350 MHz applications
LMK04832RHAR	TI dual-loop jitter cleaner with 14 outputs; higher power consumption (1.2 W vs. 0.75 W); no on-chip NVM; requires external EEPROM	Preferred in mixed-signal test systems needing >10 outputs and deterministic latency; lacks factory-programmable NVM boot configuration	Choose LMK04832RHAR when >10 outputs or deterministic latency is critical; SI5345B-B04753-GMR preferred for compact, self-booting SyncE line cards

Compared with SI5345A-B04752-GMR, SI5345B-B04753-GMR trades maximum output frequency (≤350 MHz) for optimized cost and power in sub-350 MHz applications, while retaining identical pinout, NVM boot, and G.8262 compliance. Against LMK04832RHAR, it provides lower power, smaller footprint, and guaranteed boot configuration - at the expense of output count and deterministic latency control.

Availability

SI5345B-B04753-GMR is available at Aetrix Electronics and suitable for OTN muxponders, 100GbE Synchronous Ethernet line cards, and broadcast video infrastructure requiring stable component supply and long-term lifecycle support.

Supply support for SI5345B-B04753-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for communications, automotive, and industrial markets.

The Si5345 family is designed specifically for high-performance timing in telecom infrastructure, delivering jitter-attenuated, multi-frequency clock synthesis with zero-delay and holdover capabilities for mission-critical network equipment.

FAQ

What is the maximum output frequency supported by SI5345B-B04753-GMR?

The SI5345B-B04753-GMR supports differential output frequencies up to 350 MHz, as specified in Skyworks' Ordering Guide for Si5345B variants. This limit applies regardless of input frequency or synthesis mode and is distinct from the Si5345A variant's 1028 MHz capability. Applications requiring >350 MHz outputs (e.g., 53.125 Gbps PAM4 SerDes) must use SI5345A-B04752-GMR or equivalent.

Does SI5345B-B04753-GMR include non-volatile memory for configuration storage?

Yes, SI5345B-B04753-GMR integrates on-chip one-time-programmable (OTP) non-volatile memory. This allows factory preprogramming of frequency plans, enabling the device to power up with a known, validated configuration without external initialization. The NVM retains settings across power cycles and supports in-circuit reprogramming via I²C or SPI interface.

Is SI5345B-B04753-GMR compliant with ITU-T G.8262 for Synchronous Ethernet?

Yes, SI5345B-B04753-GMR meets ITU-T G.8262 EEC Option 1 and Option 2 specifications for Synchronous Ethernet equipment clocks. This compliance is verified through Skyworks' characterization of jitter transfer, jitter tolerance, and holdover performance under defined test conditions, making it suitable for deployment in carrier-class SyncE line cards and switches.

What input clock types does SI5345B-B04753-GMR accept?

SI5345B-B04753-GMR accepts four differential (LVDS/LVPECL/CML/HCSL) or single-ended LVCMOS inputs (IN0–IN3), each configurable independently. Differential inputs support 8 kHz–750 MHz; LVCMOS inputs support 8 kHz–250 MHz. Input termination is programmable, and the device supports gapped clock locking and hitless switching between fractionally related sources.

How is jitter attenuation bandwidth configured on SI5345B-B04753-GMR?

Jitter attenuation bandwidth on SI5345B-B04753-GMR is digitally programmable from 0.1 Hz to 4 kHz via register settings accessible through I²C or SPI. This bandwidth directly controls the DSPLL's jitter filtering profile: lower values improve wander suppression (critical for SyncE holdover), while higher values enhance jitter attenuation for short-term phase noise. Configuration is performed using ClockBuilder Pro™ software or direct register writes.

SI5345B-B04753-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: *

Package/Case:: -

Packaging:: Tape & Reel (TR)

Product Status:: Obsolete

Programmable:: Not Verified

Type:: -

PLL:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Divider/Multiplier:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: -

Grade:: -

Qualification:: -

Supplier Device Package:: -

SI5345B-B04753-GMR FAQ

1.How can I place an order for SI5345B-B04753-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5345B-B04753-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5345B-B04753-GMR reliable?

The price and inventory of SI5345B-B04753-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5345B-B04753-GMR is usually 5 days.

3.What payment methods are accepted for SI5345B-B04753-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5345B-B04753-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5345B-B04753-GMR?

SI5345B-B04753-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5345B-B04753-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5345B-B04753-GMR?

For technical support, including SI5345B-B04753-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5345B-B04753-GMR requirements.

6.How does Aetrix verify that SI5345B-B04753-GMR is sourced from the original manufacturer or authorized distributors?

All SI5345B-B04753-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5345B-B04753-GMR meets industry standards.

7.What is the process for return or replacement of SI5345B-B04753-GMR?

All SI5345B-B04753-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5345B-B04753-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5345B-B04753-GMR part is unused and in its original packaging.

Return procedure for SI5345B-B04753-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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