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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Clock Generators, PLLs, Frequency Synthesizers

Skyworks Solutions Inc. SI5345B-B04881-GMR

Name: SI5345B-B04881-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5345B-B04881-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5345B-B04881-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Clock Generators, PLLs, Frequency Synthesizers

Package:: -

Datasheet:: SI5345B-B04881-GMR.pdf

Description:: IC CLK MULTIPLIER ATTENUATOR

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Product details

Overview

SI5345B-B04881-GMR from Skyworks is a 10-channel, any-frequency jitter attenuator/clock multiplier featuring fourth-generation DSPLL™ and MultiSynth™ architectures. It delivers ultra-low 90 fs rms jitter, supports differential inputs up to 750 MHz and outputs up to 1028 MHz, and operates in free-run, synchronous, or holdover modes - deployed in ITU-T G.8262-compliant SyncE line cards and OTN transponders.

For engineers reviewing the SI5345B-B04881-GMR datasheet, SI5345B-B04881-GMR pinout, SI5345B-B04881-GMR application, or SI5345B-B04881-GMR equivalent, key selection criteria include programmable jitter attenuation bandwidth (0.1 Hz–4 kHz), G.8262 EEC Option 1/2 compliance, hitless input switching, DCO mode with 0.001 ppb step size, and support for LVDS/LVPECL/LVCMOS/CML/HCSL output formats.

Technical Context

The SI5345B-B04881-GMR implements a digitally controlled DSPLL with fully integrated loop filter and programmable loop bandwidth (0.1 Hz–4 kHz), enabling precise jitter filtering without external components. Its MultiSynth architecture uses fractional-N synthesis (Mn/Md) and integer/fractional output dividers (Nn/Nd, Rn) to generate any output frequency from any input - supporting both integer-only and fractional synthesis modes per configuration.

It features four configurable clock inputs (IN0–IN3), ten independent outputs (OUT0–OUT9), automatic/manual input switching with hitless/ramped/glitchless transition modes, and status monitoring (LOS/OOF/LOL). The device integrates non-volatile OTP memory for power-up configuration and supports I²C/SPI control with ClockBuilder Pro™ software.

Key Specifications

Parameter	Value and Actual Design Meaning
Jitter (RMS)	90 fs rms - meets stringent SyncE EEC Option 1/2 phase noise requirements for carrier-grade timing.
Input Range (Diff)	8 kHz–750 MHz - accepts SONET/SDH, Ethernet, and OTN reference clocks without external conditioning.
Output Range (Diff)	100 Hz–1028 MHz - covers 10G/100G Ethernet, CPRI, and broadcast video clocking needs.
Jitter BW Control	0.1 Hz–4 kHz digital programming - enables application-specific optimization of jitter attenuation vs. wander rejection.
Supply Voltages	VDD = 1.8 V ±5%; VDDA = 3.3 V ±5% - separates core logic and analog PLL domains for noise isolation.
Temp Range	–40 °C to +85 °C - qualified for industrial and telecom infrastructure environments.
Package	64-QFN, 9×9 mm - standard footprint compatible with high-density line card layouts.

Pinout & Package

SI5345B-B04881-GMR is housed in a 64-pin QFN package (9×9 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks Si5345 Rev D datasheet Section 9 (Pin Descriptions), including dedicated IN0–IN3, OUT0–OUT9, XA/XB crystal interface, I²C/SPI control, power, ground, and status pins.

Pin/Terminal	Circuit Role	Design Meaning
IN0–IN3	Differential or LVCMOS clock inputs	Four selectable reference sources; support gapped clock locking and hitless switching between fractionally related inputs.
OUT0–OUT9	Programmable clock outputs	Each independently configurable for LVDS/LVPECL/LVCMOS/CML/HCSL; amplitude and common-mode voltage programmable.
XA/XB	Crystal oscillator terminals	Accepts 25–54 MHz fundamental-mode crystals; internal load caps eliminate external components and reduce noise coupling.
SCL/SDA	I²C serial interface	Two-wire bus for configuration and monitoring; supports in-circuit programming of OTP NVM.
VDD / VDDA	Core and analog power supplies	1.8 V digital core and 3.3 V analog PLL supply - require separate decoupling to maintain jitter performance.

Key Features

Feature	Design Value
Any-frequency synthesis	Generates arbitrary output frequencies from any input via fractional-N DSPLL + MultiSynth dividers - eliminates need for multiple fixed-ratio clock ICs.
Hitless input switching	Prevents phase transients when switching between fractionally related inputs (e.g., 155.52 MHz ↔ 622.08 MHz) - critical for hitless protection switching in telecom systems.
Holdover with history averaging	Stores 120 s of locked frequency data; calculates final holdover frequency from programmable window - minimizes phase jump during reference loss.
DCO mode	0.001 ppb frequency step resolution via FINC/FDEC pins or register control - enables precise frequency trimming for SyncE wander compensation.
Zero delay mode	Uses IN3 as feedback (FB_IN) to align output phase with input - supports deterministic latency applications like packet timing and TSN.

Applications

OTN Transponders	SyncE Line Cards
Use Scenario: Timing recovery and distribution in 100G/400G OTN muxponders where multiple client interfaces (e.g., 10GE, OTU2/3/4) require low-jitter, phase-aligned clocks. IC Role / Device Role / Timing Role: Jitter attenuator and multi-output clock multiplier - cleans incoming line-timing references and generates synchronized clocks for SerDes, FEC, and framing logic. Use Value: 90 fs rms jitter ensures BER <1e-12 in coherent optical receivers; 10 independent outputs eliminate discrete clock fanout ICs.	Use Scenario: Carrier Ethernet aggregation switches requiring ITU-T G.8262 EEC Option 1/2 compliance for phase and wander performance across 10G/100G ports. IC Role / Device Role / Timing Role: Primary timing IC - locks to primary/secondary SyncE references, maintains holdover during reference loss, and distributes traceable clocks to PHYs and MACs. Use Value: Programmable jitter attenuation bandwidth (0.1 Hz) meets EEC Option 1 wander limits; status flags (LOS/OOF/LOL) enable real-time timing health monitoring.
Broadcast Video Systems	Test & Measurement Equipment
Use Scenario: Genlock and frame synchronization in 4K/8K video routers and IP media gateways where SMPTE ST 2059-2 PTP timing demands sub-100 fs jitter. IC Role / Device Role / Timing Role: Jitter-cleaned master clock generator - derives stable video reference clocks (e.g., 27 MHz, 74.25 MHz) from GPSDO or PTP grandmaster inputs. Use Value: Ultra-low 90 fs rms jitter prevents pixel errors and lip-sync drift; LVDS/LVPECL outputs drive long backplane traces without additional buffering.	Use Scenario: High-precision signal generators and analyzers requiring ultra-stable, multi-frequency local oscillators with fast reconfiguration. IC Role / Device Role / Timing Role: Reconfigurable clock source - synthesizes arbitrary test frequencies (e.g., 1.2 GHz, 2.4 GHz) from a single OCXO reference with minimal phase noise degradation. Use Value: Fractional-N synthesis enables exact frequency generation without spurs; DCO mode allows fine-tuning for calibration loops and offset correction.

OTN Transponders

SyncE Line Cards

Use Scenario: Timing recovery and distribution in 100G/400G OTN muxponders where multiple client interfaces (e.g., 10GE, OTU2/3/4) require low-jitter, phase-aligned clocks.

IC Role / Device Role / Timing Role: Jitter attenuator and multi-output clock multiplier - cleans incoming line-timing references and generates synchronized clocks for SerDes, FEC, and framing logic.

Use Value: 90 fs rms jitter ensures BER <1e-12 in coherent optical receivers; 10 independent outputs eliminate discrete clock fanout ICs.

Use Scenario: Carrier Ethernet aggregation switches requiring ITU-T G.8262 EEC Option 1/2 compliance for phase and wander performance across 10G/100G ports.

IC Role / Device Role / Timing Role: Primary timing IC - locks to primary/secondary SyncE references, maintains holdover during reference loss, and distributes traceable clocks to PHYs and MACs.

Use Value: Programmable jitter attenuation bandwidth (0.1 Hz) meets EEC Option 1 wander limits; status flags (LOS/OOF/LOL) enable real-time timing health monitoring.

Broadcast Video Systems

Test & Measurement Equipment

Use Scenario: Genlock and frame synchronization in 4K/8K video routers and IP media gateways where SMPTE ST 2059-2 PTP timing demands sub-100 fs jitter.

IC Role / Device Role / Timing Role: Jitter-cleaned master clock generator - derives stable video reference clocks (e.g., 27 MHz, 74.25 MHz) from GPSDO or PTP grandmaster inputs.

Use Value: Ultra-low 90 fs rms jitter prevents pixel errors and lip-sync drift; LVDS/LVPECL outputs drive long backplane traces without additional buffering.

Use Scenario: High-precision signal generators and analyzers requiring ultra-stable, multi-frequency local oscillators with fast reconfiguration.

IC Role / Device Role / Timing Role: Reconfigurable clock source - synthesizes arbitrary test frequencies (e.g., 1.2 GHz, 2.4 GHz) from a single OCXO reference with minimal phase noise degradation.

Use Value: Fractional-N synthesis enables exact frequency generation without spurs; DCO mode allows fine-tuning for calibration loops and offset correction.

Equivalent & Alternatives

The following parts are listed as comparable options for similar jitter attenuator/clock multiplier applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5345A-D-GM1	Supports full 0.001–1028 MHz output range with integer+fractional synthesis; SI5345B-B04881-GMR limited to ≤350 MHz outputs.	Required for >350 MHz applications (e.g., 100G KR4, CPRI 2.4576 GHz ×1/2); not needed for SyncE (≤125 MHz) or OTN (≤156.25 MHz).	Select Si5345A-D-GM1 only if outputs above 350 MHz are required; SI5345B-B04881-GMR optimizes cost and power for sub-350 MHz SyncE/OTN use cases.
LMK5B33414	TI device with dual-loop architecture; 115 fs rms jitter; supports JESD204B subclass 1; no integrated crystal oscillator.	Preferred for JESD204B-compliant data converters; requires external TCXO/OCXO; lacks zero-delay mode and gapped-clock support.	Choose LMK5B33414 for JESD204B deterministic latency; SI5345B-B04881-GMR better suits telecom SyncE/OTN with built-in crystal interface and holdover intelligence.

Compared with Si5345A-D-GM1, SI5345B-B04881-GMR trades maximum output frequency for lower power and optimized cost in sub-350 MHz applications; versus LMK5B33414, it provides superior holdover stability, gapped-clock tolerance, and integrated crystal interface - making it preferred for carrier-grade timing where reference resilience is critical.

Availability

SI5345B-B04881-GMR is available at Aetrix Electronics and suitable for OTN transponders, SyncE line cards, and broadcast video systems requiring stable component supply, long-term lifecycle assurance, and G.8262-compliant timing performance.

Supply support for SI5345B-B04881-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for communications, automotive, and industrial markets.

The Si5345 family is designed specifically for high-performance timing in telecom infrastructure - delivering jitter attenuation, holdover resilience, and multi-protocol clock generation for OTN, SyncE, SONET/SDH, and broadcast video applications.

FAQ

What is the maximum output frequency supported by SI5345B-B04881-GMR?

The SI5345B-B04881-GMR supports differential output frequencies up to 350 MHz, as specified in Skyworks' Si5345 Ordering Guide for "B"-grade devices. This is lower than the full 1028 MHz capability of the "A" variant but sufficient for SyncE (≤125 MHz), OTN (≤156.25 MHz), and many broadcast video clocks. The limit is enforced by internal synthesis mode configuration and cannot be extended via software.

Does SI5345B-B04881-GMR support ITU-T G.8262 compliance?

Yes, SI5345B-B04881-GMR meets ITU-T G.8262 EEC Option 1 and Option 2 specifications for Synchronous Ethernet equipment clocks. Its 90 fs rms jitter, programmable jitter attenuation bandwidth (0.1 Hz–4 kHz), and holdover performance with 120-second frequency history averaging satisfy both phase noise and wander requirements defined in the standard.

Can SI5345B-B04881-GMR operate without an external crystal?

No - SI5345B-B04881-GMR requires an external crystal (25–54 MHz) connected to XA/XB pins for stable free-run and holdover operation. While it can accept an external REFCLK instead, the datasheet recommends a crystal for optimal jitter performance and BOM simplicity. The internal oscillator circuit relies on this reference to maintain accuracy during holdover.

How many clock inputs and outputs does SI5345B-B04881-GMR have?

SI5345B-B04881-GMR has four clock inputs (IN0–IN3) and ten clock outputs (OUT0–OUT9), consistent with the Si5345 product family. All inputs accept differential or LVCMOS signals; all outputs are independently configurable for LVDS, LVPECL, LVCMOS, CML, or HCSL formats with programmable amplitude and common-mode voltage.

Is SI5345B-B04881-GMR pin-compatible with other Si5345 variants?

Yes - SI5345B-B04881-GMR uses the same 64-QFN 9×9 mm package and identical pinout as all Si5345 variants (e.g., Si5345A-D-GM1, Si5345C-D-GM1). Electrical pin functions, power sequencing, and PCB land pattern are fully compatible; only configuration settings (e.g., output frequency range, synthesis mode) differ per ordering part number.

SI5345B-B04881-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: *

Package/Case:: -

Packaging:: Tape & Reel (TR)

Product Status:: Obsolete

Programmable:: Not Verified

Type:: -

PLL:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Divider/Multiplier:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: -

Grade:: -

Qualification:: -

Supplier Device Package:: -

SI5345B-B04881-GMR FAQ

1.How can I place an order for SI5345B-B04881-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5345B-B04881-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5345B-B04881-GMR reliable?

The price and inventory of SI5345B-B04881-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5345B-B04881-GMR is usually 5 days.

3.What payment methods are accepted for SI5345B-B04881-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5345B-B04881-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5345B-B04881-GMR?

SI5345B-B04881-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5345B-B04881-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5345B-B04881-GMR?

For technical support, including SI5345B-B04881-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5345B-B04881-GMR requirements.

6.How does Aetrix verify that SI5345B-B04881-GMR is sourced from the original manufacturer or authorized distributors?

All SI5345B-B04881-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5345B-B04881-GMR meets industry standards.

7.What is the process for return or replacement of SI5345B-B04881-GMR?

All SI5345B-B04881-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5345B-B04881-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5345B-B04881-GMR part is unused and in its original packaging.

Return procedure for SI5345B-B04881-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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