Skyworks Solutions Inc. SI5345B-B04985-GMR

Overview

SI5345B-B04985-GMR from Skyworks is a 10-channel, any-frequency jitter attenuator/clock multiplier featuring fourth-generation DSPLL™ and MultiSynth™ architectures. It delivers ultra-low 90 fs rms jitter, supports differential inputs up to 750 MHz and outputs up to 1028 MHz, and operates in free-run, locked, or holdover modes - enabling precise clock synthesis for Synchronous Ethernet line cards.

For engineers reviewing the SI5345B-B04985-GMR datasheet, SI5345B-B04985-GMR pinout, SI5345B-B04985-GMR application, or SI5345B-B04985-GMR equivalent, key selection considerations include its G.8262 EEC Option 1/2 compliance, programmable jitter attenuation bandwidth (0.1 Hz–4 kHz), 64-QFN 9×9 mm package, and factory preprogrammed configuration for 0.001–350 MHz output range with integer-only synthesis.

Technical Context

The SI5345B-B04985-GMR implements a digitally controlled DSPLL loop with fully integrated loop filter and programmable bandwidth (0.1 Hz–4 kHz), enabling application-specific jitter filtering. Its MultiSynth architecture uses fractional-N synthesis for output generation and supports hitless, glitchless, and ramped input switching across four differential/LVCMOS inputs.

It integrates on-chip oscillator circuitry for freerun/holdover stability, supports DCO mode with 0.001 ppb step size, and features independent output supply pins (1.8 V/2.5 V/3.3 V) with configurable LVDS/LVPECL/LVCMOS/CML/HCSL signal formats and programmable amplitude.

Key Specifications

Pinout & Package

SI5345B-B04985-GMR is housed in a 64-pin QFN package measuring 9×9 mm with 0.5 mm pitch and exposed thermal pad. The package supports reflow soldering and provides low-inductance ground paths for high-frequency clock integrity.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar jitter attenuator applications.

Compared with Si5345A-B04984-GMR, SI5345B-B04985-GMR trades fractional synthesis flexibility for lower phase noise in integer-only operation - ideal for fixed-frequency SyncE deployments. Versus LMK5B33414RGZT, it offers triple the outputs and superior jitter attenuation bandwidth control but lacks JESD204B features.

Availability

SI5345B-B04985-GMR is available at Aetrix Electronics and suitable for OTN muxponders, Synchronous Ethernet line cards, and broadcast video infrastructure requiring stable component supply, long-term lifecycle assurance, and factory-trimmed timing performance.

Supply support for SI5345B-B04985-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, timing, and precision analog solutions for communications, automotive, and industrial markets.

The Si5345 family is engineered for carrier-grade timing applications demanding ultra-low jitter, robust holdover, and G.8262 compliance - targeting next-generation optical transport, SyncE, and broadcast infrastructure.

FAQ

What is the primary function of the SI5345B-B04985-GMR in a telecom timing system?

The SI5345B-B04985-GMR serves as a jitter attenuator and clock multiplier that cleans and regenerates timing signals from noisy or unstable references. In telecom systems, it locks to an incoming SyncE or SONET/SDH reference, suppresses jitter using its digitally programmable DSPLL loop, and distributes low-jitter clocks to multiple downstream SerDes, framers, or PHYs - ensuring compliance with ITU-T G.8262 EEC standards. Its factory preprogrammed configuration in SI5345B-B04985-GMR guarantees immediate deployment without field configuration.

Does the SI5345B-B04985-GMR support both differential and single-ended input clocks?

Yes, the SI5345B-B04985-GMR supports four input channels (IN0–IN3) configurable for either differential (LVDS/LVPECL/CML) or single-ended LVCMOS signaling. Differential inputs accept frequencies from 8 kHz to 750 MHz; LVCMOS inputs operate from 8 kHz to 250 MHz. Input termination is programmable per channel, and unused inputs can be disabled. This flexibility allows SI5345B-B04985-GMR to interface directly with diverse upstream timing sources including OC-192 framers, PTP grandmasters, and GPS-disciplined oscillators.

How does the holdover capability of the SI5345B-B04985-GMR ensure timing continuity during reference loss?

The SI5345B-B04985-GMR stores up to 120 seconds of historical input frequency data while locked and calculates a final holdover frequency using a programmable averaging window. Upon reference failure, it seamlessly transitions to holdover mode and maintains output stability referenced to its internal 25–54 MHz crystal. The averaged frequency minimizes phase disturbance, and the drift rate depends solely on crystal accuracy - typically ±100 ppm for standard crystals or ±0.1 ppm for TCXOs. This behavior is factory-validated in SI5345B-B04985-GMR for telecom-grade holdover performance.

What output signal formats does the SI5345B-B04985-GMR support, and how are they configured?

The SI5345B-B04985-GMR supports LVDS, LVPECL, LVCMOS, CML, and HCSL output formats across all 10 outputs, with per-output programmable amplitude, common-mode voltage (for differential), and slew rate. Configuration is performed via I²C or SPI interface and stored in on-chip NVM. Each output has independent supply pins (1.8 V/2.5 V/3.3 V), allowing mixed-voltage system interfacing - for example, driving 1.8 V FPGA I/Os and 3.3 V legacy SerDes simultaneously. These settings are固化 in SI5345B-B04985-GMR's factory-programmed configuration.

Is the SI5345B-B04985-GMR pin-compatible with other devices in the Si5345 family?

No, the SI5345B-B04985-GMR is not pin-compatible with Si5344 or Si5342 variants due to differing pin counts (64-QFN vs. 44-QFN) and internal routing. However, it shares identical pinout and footprint with other Si5345 variants (e.g., Si5345A-D-GM1), including all power, ground, I/O, and control signals. This allows direct PCB reuse across Si5345 configurations - only firmware/NVM content differs. The SI5345B-B04985-GMR leverages this compatibility for drop-in replacement within the same 64-QFN 9×9 mm layout.