Skyworks Solutions Inc. SI5345B-B05356-GMR

Overview

SI5345B-B05356-GMR from Skyworks is a 10-channel, any-frequency jitter attenuator and clock multiplier featuring fourth-generation DSPLL™ and MultiSynth™ architectures. It delivers ultra-low 90 fs rms jitter, supports differential inputs up to 750 MHz and outputs up to 1028 MHz, and operates in free-run, locked, or holdover modes - enabling precise timing for SyncE-compliant 100 GbE line cards and OTN transponders.

For engineers reviewing the SI5345B-B05356-GMR datasheet, SI5345B-B05356-GMR pinout, SI5345B-B05356-GMR application, or SI5345B-B05356-GMR equivalent, key selection considerations include its 0.001–350 MHz output frequency range (fractional synthesis disabled), programmable jitter attenuation bandwidth (0.1 Hz–4 kHz), G.8262 EEC Option 1/2 compliance, and 64-QFN 9×9 mm package with independent output supply pins.

Technical Context

The SI5345B-B05356-GMR implements a digitally controlled DSPLL with integrated loop filter and fully programmable loop bandwidth (0.1 Hz–4 kHz), enabling application-specific jitter filtering. Its MultiSynth architecture uses integer-only frequency synthesis (per Ordering Guide: "B" variant = 0.001–350 MHz, Integer Only), eliminating fractional-N spurs while supporting hitless and glitchless input switching between up to four differential or LVCMOS inputs.

It integrates an on-chip oscillator with internal crystal load capacitors for 25–54 MHz external crystals, supports DCO mode with 0.001 ppb step size, and provides status monitoring (LOS/OOF/LOL) plus configurable zero-delay and ramped holdover exit. Core voltage is 1.8 V ±5%, analog supply is 3.3 V ±5%, and output supplies are independently selectable at 3.3 V / 2.5 V / 1.8 V.

Key Specifications

Pinout & Package

SI5345B-B05356-GMR is housed in a 64-pin QFN package (9 mm × 9 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks Si5345 pinout documentation (Rev D, Section 9), including dedicated I²C/SPI control, 4 clock inputs, 10 clock outputs, status flags (LOL, OOF, LOS), and independent power domains.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar jitter attenuator applications.

Compared with Si5345A-B05356-GMR and LMK04832RHAT, the SI5345B-B05356-GMR offers optimized cost/performance for integer-only, sub-350 MHz telecom timing - delivering G.8262 compliance, 90 fs jitter, and robust holdover in a single-chip solution without requiring external loop filters or configuration EEPROM.

Availability

SI5345B-B05356-GMR is available at Aetrix Electronics and suitable for OTN transponders, SyncE line cards, and broadcast video equipment requiring stable component supply, long-term lifecycle support, and G.8262-certified timing performance.

Supply support for SI5345B-B05356-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for infrastructure, automotive, and mobile markets.

The Si5345 family is designed specifically for high-performance timing in telecom and datacom infrastructure - delivering jitter-attenuated, multi-output clock generation with integrated DSPLL and programmable loop dynamics for SyncE, OTN, and broadcast applications.

FAQ

What is the maximum output frequency supported by SI5345B-B05356-GMR?

The SI5345B-B05356-GMR supports an output frequency range of 0.001 MHz to 350 MHz. This upper limit is fixed by its "B" variant designation in the Skyworks ordering guide, which specifies integer-only synthesis up to 350 MHz - distinct from the "A" variant's 1028 MHz capability. The 350 MHz ceiling ensures optimal jitter performance and simplifies layout for telecom timing applications.

Does SI5345B-B05356-GMR support G.8262 Synchronous Ethernet compliance?

Yes, SI5345B-B05356-GMR meets ITU-T G.8262 EEC Option 1 and Option 2 requirements. Its ultra-low 90 fs rms jitter (12 kHz–20 MHz), programmable loop bandwidth down to 0.1 Hz, and holdover stability using internal crystal reference enable full SyncE compliance in carrier-grade equipment such as 100GbE line cards and aggregation switches.

How does the SI5345B-B05356-GMR handle input clock failures?

Upon input clock failure, SI5345B-B05356-GMR automatically enters holdover mode using up to 120 seconds of stored historical frequency data. It calculates an averaged holdover frequency from a programmable window within that history, then ramps output frequency to that value - ensuring glitchless, phase-continuous timing recovery without disrupting downstream SerDes or PHYs.

Can SI5345B-B05356-GMR be configured without external hardware?

Yes. SI5345B-B05356-GMR includes in-circuit programmable non-volatile memory (OTP), allowing full configuration to be stored onboard. Once programmed via I²C or SPI using ClockBuilder Pro™ software, the device powers up with known settings - eliminating need for external EEPROM, FPGA configuration logic, or boot-time host initialization.

What output signal formats does SI5345B-B05356-GMR support?

SI5345B-B05356-GMR supports LVDS, LVPECL, LVCMOS, CML, and HCSL output formats across all 10 channels. Each output is independently configurable for format, amplitude, common-mode voltage (differential), and drive strength (LVCMOS), enabling direct interface to diverse SerDes, FPGA, ASIC, and PHY devices without level-shifting components.