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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Clock Generators, PLLs, Frequency Synthesizers

Skyworks Solutions Inc. SI5345B-B05382-GMR

Name: SI5345B-B05382-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5345B-B05382-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5345B-B05382-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Clock Generators, PLLs, Frequency Synthesizers

Package:: -

Datasheet:: SI5345B-B05382-GMR.pdf

Description:: IC CLK MULTIPLIER ATTENUATOR

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Product details

Overview

SI5345B-B05382-GMR from Skyworks is a 10-channel, any-frequency jitter attenuator/clock multiplier with fourth-generation DSPLL™ and MultiSynth™ architecture. It delivers ultra-low 90 fs rms jitter, supports differential inputs up to 750 MHz and outputs up to 1028 MHz, and operates in free-run, locked, or holdover modes - enabling precise timing in SyncE-compliant 100G line cards and OTN transponders.

For engineers reviewing the SI5345B-B05382-GMR datasheet, SI5345B-B05382-GMR pinout, SI5345B-B05382-GMR application, or SI5345B-B05382-GMR equivalent, key selection factors include its G.8262 EEC Option 1/2 compliance, programmable jitter attenuation bandwidth (0.1 Hz–4 kHz), 64-QFN 9×9 mm package, I²C/SPI configurability, and factory-programmable NVM for guaranteed power-up frequency configuration.

Technical Context

The SI5345B-B05382-GMR implements a digitally controlled DSPLL with fully integrated loop filter and programmable loop bandwidth (0.1 Hz–4 kHz), enabling application-tuned jitter filtering. Its MultiSynth™ fractional-N synthesis engine generates up to 10 independent output frequencies from any input - supporting integer and fractional division across all 4 inputs (IN0–IN3) and configurable crosspoint routing.

It features hitless and glitchless input switching, ramped holdover exit, DCO mode with 0.001 ppb step size, and status monitoring (LOS/OOF/LOL). Core supply is 1.8 V ±5% (VDD), analog supply 3.3 V ±5% (VDDA), with independent 1.8/2.5/3.3 V output supply pins for signal integrity optimization.

Key Specifications

Parameter	Value and Actual Design Meaning
Jitter (rms)	90 fs - meets stringent ITU-T G.8262 EEC Option 1 & 2 for Synchronous Ethernet applications.
Input range (diff)	8 kHz–750 MHz - supports SONET/SDH, OTN, and high-speed serial reference clocks.
Output range (diff)	100 Hz–1028 MHz - covers 10/40/100G Ethernet, PCIe Gen5, and broadcast video timing.
Jitter BW	0.1 Hz–4 kHz - digitally programmable to optimize attenuation vs. transient response per system requirement.
Crystal support	25–54 MHz - internal load capacitors eliminate external caps; 48–54 MHz recommended for best jitter.
Supply voltages	VDD = 1.8 V ±5%, VDDA = 3.3 V ±5% - dual-rail operation enables low-power core with noise-isolated analog domain.
Interface	I²C or SPI - enables in-system configuration and NVM programming without external hardware.
Temp range	–40 °C to +85 °C - qualified for industrial and telecom infrastructure environments.

Pinout & Package

The SI5345B-B05382-GMR is housed in a 64-pin QFN package measuring 9 mm × 9 mm with exposed thermal pad. Pinout follows Skyworks' standard Si5345 layout: 4 differential/single-ended clock inputs (IN0–IN3), 10 configurable differential/LVCMOS outputs (OUT0–OUT9), dedicated XA/XB crystal interface, I²C/SPI control pins (SDA/SCL/MOSI/MISO/SCLK/CSB), power/ground, and status/enable signals.

Pin/Terminal	Circuit Role	Design Meaning
IN0–IN3	Differential or LVCMOS clock input	Accepts 8 kHz–750 MHz (diff) or 8 kHz–250 MHz (LVCMOS); supports automatic/manual switching and gapped-clock lock.
OUT0–OUT9	Programmable clock output	Each supports LVDS/LVPECL/LVCMOS/CML/HCSL; independently configurable amplitude, common-mode voltage, and enable/disable.
XA/XB	Cry stal oscillator interface	Connects 25–54 MHz fundamental-mode crystal; internal 12 pF load caps eliminate external components.
SCL/SDA or SCLK/MOSI/MISO/CSB	Serial control interface	Configures all registers and stores settings in on-chip OTP NVM for repeatable power-up behavior.
INTRb	Interrupt output	Asserts on LOS, OOF, or LOL events; enables real-time fault monitoring without polling.

Key Features

Feature	Design Value
Any-frequency synthesis	Generates arbitrary output frequencies from any input via fractional-N MultiSynth dividers - no external PLL required.
Hitless input switching	Eliminates phase transients when switching between fractionally related inputs (e.g., 156.25 MHz ↔ 312.5 MHz), preserving downstream timing integrity.
Programmable holdover	Uses 120-second frequency history window to compute stable holdover frequency - critical for SyncE network resilience during input loss.
Zero delay mode	Configures IN3 as feedback input (FB_IN) to align OUTx phase with IN0–IN2 - essential for deterministic latency in packet-processing systems.
DCO mode	Enables fine-grained frequency tuning (0.001 ppb steps) via FINC/FDEC pins or register writes - supports IEEE 1588 PTP slave clock adjustment.

Applications

OTN Transponders	SyncE Line Cards
Use Scenario: Timing recovery and jitter cleaning for 100G/400G OTN client-side interfaces in metro/core transport systems. IC Role / Device Role / Timing Role: Jitter attenuator and multi-rate clock multiplier that cleans incoming WAN PHY clocks and generates synchronous parallel clocks for FEC, MAC, and SerDes blocks. Use Value: Reduces accumulated jitter below 90 fs rms to meet OTU4 BER requirements and enables seamless interworking with legacy SDH/SONET equipment.	Use Scenario: Primary timing source in Carrier Ethernet switches compliant with ITU-T G.8262 EEC Option 1/2. IC Role / Device Role / Timing Role: Synchronous Ethernet clock generator that locks to primary BITS or PRC references and distributes low-jitter clocks to multiple PHYs and switch fabric interfaces. Use Value: Guarantees wander and jitter performance within EEC limits across temperature and aging - eliminating need for external TCXO in pizza-box deployments.
Broadcast Video	Test & Measurement
Use Scenario: Reference clock distribution in SMPTE ST 2059-2 compliant IP video routers and frame synchronizers. IC Role / Device Role / Timing Role: Multi-output jitter cleaner that accepts GPSDO or atomic clock references and generates synchronized 74.25 MHz, 148.5 MHz, and 297 MHz video clocks. Use Value: Maintains sub-100 fs jitter across all outputs to prevent lip-sync errors and pixel corruption in UHD/8K workflows.	Use Scenario: Clock stimulus and analysis in high-speed oscilloscopes, bit-error-rate testers, and protocol analyzers. IC Role / Device Role / Timing Role: Programmable jitter injection and attenuation platform used to validate receiver jitter tolerance (TIE, DJ, RJ) per IEEE 802.3 and Fibre Channel standards. Use Value: Enables repeatable, traceable jitter stress testing with digitally tunable bandwidth and amplitude - replacing multiple fixed-function instruments.

OTN Transponders

SyncE Line Cards

Use Scenario: Timing recovery and jitter cleaning for 100G/400G OTN client-side interfaces in metro/core transport systems.

IC Role / Device Role / Timing Role: Jitter attenuator and multi-rate clock multiplier that cleans incoming WAN PHY clocks and generates synchronous parallel clocks for FEC, MAC, and SerDes blocks.

Use Value: Reduces accumulated jitter below 90 fs rms to meet OTU4 BER requirements and enables seamless interworking with legacy SDH/SONET equipment.

Use Scenario: Primary timing source in Carrier Ethernet switches compliant with ITU-T G.8262 EEC Option 1/2.

IC Role / Device Role / Timing Role: Synchronous Ethernet clock generator that locks to primary BITS or PRC references and distributes low-jitter clocks to multiple PHYs and switch fabric interfaces.

Use Value: Guarantees wander and jitter performance within EEC limits across temperature and aging - eliminating need for external TCXO in pizza-box deployments.

Broadcast Video

Test & Measurement

Use Scenario: Reference clock distribution in SMPTE ST 2059-2 compliant IP video routers and frame synchronizers.

IC Role / Device Role / Timing Role: Multi-output jitter cleaner that accepts GPSDO or atomic clock references and generates synchronized 74.25 MHz, 148.5 MHz, and 297 MHz video clocks.

Use Value: Maintains sub-100 fs jitter across all outputs to prevent lip-sync errors and pixel corruption in UHD/8K workflows.

Use Scenario: Clock stimulus and analysis in high-speed oscilloscopes, bit-error-rate testers, and protocol analyzers.

IC Role / Device Role / Timing Role: Programmable jitter injection and attenuation platform used to validate receiver jitter tolerance (TIE, DJ, RJ) per IEEE 802.3 and Fibre Channel standards.

Use Value: Enables repeatable, traceable jitter stress testing with digitally tunable bandwidth and amplitude - replacing multiple fixed-function instruments.

Equivalent & Alternatives

The following parts are listed as comparable options for similar jitter attenuator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5345A-B05382-GMR	Supports full 0.001–1028 MHz output range with integer+fractional synthesis; SI5345B is limited to ≤350 MHz.	Required for >350 MHz outputs (e.g., PCIe Gen5, 56G PAM4 SerDes); SI5345B suffices for SyncE, OTN, and broadcast video.	Select SI5345A only if outputs above 350 MHz are needed; SI5345B offers cost and power advantage for sub-350 MHz use cases.
LMK04832RHAR	Triple-loop architecture with separate jitter cleaner + clock distributor; higher power (1.2 W vs. 0.75 W), larger 64-VQFN (9×9 mm same footprint).	Preferred for ultra-low phase noise (<50 fs) in RF sampling and radar; less optimized for multi-output SyncE holdover.	Choose LMK04832 for applications demanding <60 fs jitter or dual redundant inputs; SI5345B excels in high-channel-count, NVM-configured telecom timing.

Compared with Si5345A-B05382-GMR, the SI5345B-B05382-GMR trades maximum output frequency for lower cost and reduced power, while versus LMK04832RHAR it prioritizes integration, holdover intelligence, and ease of configuration over absolute phase noise floor - making it optimal for carrier-grade Ethernet and OTN timing where 90 fs and G.8262 compliance are decisive.

Availability

SI5345B-B05382-GMR is available at Aetrix Electronics and suitable for OTN transponders, Synchronous Ethernet line cards, and broadcast video infrastructure requiring stable component supply, long-term lifecycle support, and factory-programmable timing configurations.

Supply support for SI5345B-B05382-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The SI5345B-B05382-GMR belongs to Skyworks' Si5345 family of jitter-attenuating clock multipliers, engineered specifically for high-reliability telecom and datacom timing applications demanding G.8262 compliance, multi-input redundancy, and field-upgradable NVM configuration.

FAQ

What is the maximum output frequency supported by the SI5345B-B05382-GMR?

The SI5345B-B05382-GMR supports differential output frequencies up to 350 MHz - as defined by its "B" variant designation in the Si5345 ordering guide. This is lower than the Si5345A's 1028 MHz limit but sufficient for SyncE (156.25 MHz), OTN (155.52/622.08 MHz base rates), and broadcast video (297 MHz) applications. The device maintains 90 fs rms jitter across its entire 100 Hz–350 MHz range.

Does the SI5345B-B05382-GMR require external loop filter components?

No, the SI5345B-B05382-GMR integrates the entire DSPLL loop filter on-die, eliminating discrete capacitors and resistors. This removes sensitivity to PCB layout parasitics and board-level noise coupling - a key differentiator from discrete PLL solutions. The loop bandwidth remains digitally programmable from 0.1 Hz to 4 kHz without hardware changes.

How does the SI5345B-B05382-GMR handle input clock failure in a telecom system?

Upon input failure, the SI5345B-B05382-GMR automatically enters holdover mode using up to 120 seconds of stored frequency history to compute a stable averaged holdover frequency. Its programmable holdover window and ramped exit ensure phase-continuous transition back to lock - meeting ITU-T G.8262 wander requirements for carrier-class network resilience.

Can the SI5345B-B05382-GMR generate different output formats simultaneously?

Yes, the SI5345B-B05382-GMR supports concurrent LVDS, LVPECL, LVCMOS, CML, and HCSL outputs across its 10 channels. Each output is independently configurable for format, amplitude, common-mode voltage, polarity, and enable state - enabling direct interfacing with diverse SerDes, FPGA, and ASIC clock inputs without level-shifting components.

Is factory programming available for the SI5345B-B05382-GMR?

Yes, Skyworks offers factory preprogramming of the SI5345B-B05382-GMR using ClockBuilder Pro™ software. Custom configurations - including input/output frequencies, loop bandwidth, holdover parameters, and pin strapping - are stored in one-time-programmable (OTP) NVM. Devices power up immediately with validated timing settings, eliminating field programming overhead and reducing qualification time.

SI5345B-B05382-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: *

Package/Case:: -

Packaging:: Tape & Reel (TR)

Product Status:: Obsolete

Programmable:: Not Verified

Type:: -

PLL:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Divider/Multiplier:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: -

Grade:: -

Qualification:: -

Supplier Device Package:: -

SI5345B-B05382-GMR FAQ

1.How can I place an order for SI5345B-B05382-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5345B-B05382-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5345B-B05382-GMR reliable?

The price and inventory of SI5345B-B05382-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5345B-B05382-GMR is usually 5 days.

3.What payment methods are accepted for SI5345B-B05382-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5345B-B05382-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5345B-B05382-GMR?

SI5345B-B05382-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5345B-B05382-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5345B-B05382-GMR?

For technical support, including SI5345B-B05382-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5345B-B05382-GMR requirements.

6.How does Aetrix verify that SI5345B-B05382-GMR is sourced from the original manufacturer or authorized distributors?

All SI5345B-B05382-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5345B-B05382-GMR meets industry standards.

7.What is the process for return or replacement of SI5345B-B05382-GMR?

All SI5345B-B05382-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5345B-B05382-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5345B-B05382-GMR part is unused and in its original packaging.

Return procedure for SI5345B-B05382-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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