Skyworks Solutions Inc. SI5345B-B05420-GMR

Overview

SI5345B-B05420-GMR from Skyworks is a 10-channel, any-frequency jitter attenuator/clock multiplier with fourth-generation DSPLL™ and MultiSynth™ architecture. It delivers ultra-low 90 fs rms jitter, supports differential inputs up to 750 MHz and outputs up to 1028 MHz, and operates in free-run, locked, or holdover modes - deployed in ITU-T G.8262 SyncE-compliant carrier Ethernet switches and OTN transponders.

For engineers reviewing the SI5345B-B05420-GMR datasheet, SI5345B-B05420-GMR pinout, SI5345B-B05420-GMR application, or SI5345B-B05420-GMR equivalent, key selection criteria include programmable jitter attenuation bandwidth (0.1 Hz–4 kHz), G.8262 EEC Option 1/2 compliance, hitless input switching, DCO mode with 0.001 ppb step size, and support for LVDS/LVPECL/LVCMOS/CML/HCSL output formats.

Technical Context

The SI5345B-B05420-GMR implements a digitally controlled DSPLL with fully integrated loop filter and programmable loop bandwidth (0.1 Hz–4 kHz), enabling precise jitter filtering without external components. Its MultiSynth architecture uses fractional-N synthesis (Mn/Md) and integer-R division to generate any output frequency from any input frequency across 10 independent outputs.

It features automatic/manual input clock selection across four inputs (IN0–IN3), status monitoring (LOS/OOF/LOL), glitchless on-the-fly frequency changes, and ramped holdover exit with user-selectable slew rates (0.2–40,000 ppm/s). The device integrates non-volatile OTP memory for power-up configuration and supports I²C/SPI control with ClockBuilder Pro™ software.

Key Specifications

Pinout & Package

SI5345B-B05420-GMR is housed in a 64-pin QFN package (9×9 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks Si5345 64-QFN pinout specification (Rev D).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar jitter attenuator applications.

Compared with SI5345A-B05420-GMR, the SI5345B-B05420-GMR trades maximum output frequency (≤350 MHz vs. ≤1028 MHz) for reduced cost and power in carrier-grade Ethernet applications, while the LTC6957-3IUF#PBF offers lower integration and no holdover capability - making it unsuitable for infrastructure-grade reliability requirements.

Availability

SI5345B-B05420-GMR is available at Aetrix Electronics and suitable for OTN transponders, carrier Ethernet switches, broadcast video infrastructure, and test & measurement equipment requiring stable component supply, long-term lifecycle support, and G.8262-compliant timing performance.

Supply support for SI5345B-B05420-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, and infrastructure markets.

The SI5345 family is designed for high-reliability telecom and datacom timing applications, delivering ultra-low jitter, programmable holdover, and SyncE compliance in a single-chip jitter attenuator/multiplier architecture.

FAQ

What is the maximum output frequency supported by SI5345B-B05420-GMR?

The SI5345B-B05420-GMR supports a maximum differential output frequency of 350 MHz, as specified in Skyworks' Ordering Guide for Si5345B variants. This is distinct from the Si5345A variant (up to 1028 MHz) and reflects its optimization for cost-sensitive SyncE and Ethernet applications where higher frequencies are unnecessary. The 350 MHz limit applies regardless of output format (LVDS, LVPECL, etc.) and is enforced by internal synthesis constraints.

Does SI5345B-B05420-GMR require an external crystal, and what frequency range is supported?

Yes, SI5345B-B05420-GMR requires an external crystal connected to XA/XB pins. It supports fundamental-mode crystals from 25 MHz to 54 MHz, with Skyworks recommending 48–54 MHz for optimal jitter performance. Internal load capacitors eliminate the need for external C_L components, simplifying layout and improving noise immunity. Crystal selection directly impacts holdover stability and free-run accuracy.

How does SI5345B-B05420-GMR achieve ITU-T G.8262 compliance?

SI5345B-B05420-GMR meets ITU-T G.8262 EEC Option 1 and Option 2 specifications through its ultra-low 90 fs rms jitter, programmable DSPLL loop bandwidth (0.1 Hz–4 kHz), and robust holdover algorithm using 120 seconds of historical frequency averaging. Compliance is validated under defined test conditions including input wander limits, holdover duration, and phase transient response - all enabled by its integrated DSPLL and MultiSynth architecture.

Can SI5345B-B05420-GMR perform hitless switching between unrelated input frequencies?

No, SI5345B-B05420-GMR supports hitless switching only between input frequencies that are exactly equal or fractionally related (e.g., 156.25 MHz and 312.5 MHz). For unrelated frequencies (e.g., 125 MHz and 156.25 MHz), it performs glitchless switching using Fastlock or standard DSPLL pull-in - maintaining continuous output but introducing controlled phase transients within the loop bandwidth. Hitless operation requires precise frequency relationship verification in ClockBuilder Pro™.

What are the power supply requirements for SI5345B-B05420-GMR?

SI5345B-B05420-GMR requires three dedicated supplies: VDD = 1.8 V ±5% (core logic), VDDA = 3.3 V ±5% (analog PLL), and independent output supply pins configurable for 1.8 V, 2.5 V, or 3.3 V per output bank. Each output bank's supply must be decoupled with 100 nF + 10 µF capacitors close to the pins. Proper sequencing (VDDA before VDD) is recommended to ensure reliable lock acquisition.