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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Clock Generators, PLLs, Frequency Synthesizers

Skyworks Solutions Inc. SI5345B-B05600-GMR

Name: SI5345B-B05600-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5345B-B05600-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5345B-B05600-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Clock Generators, PLLs, Frequency Synthesizers

Package:: -

Datasheet:: SI5345B-B05600-GMR.pdf

Description:: IC CLK MULTIPLIER ATTENUATOR

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Product details

Overview

SI5345B-B05600-GMR from Skyworks is a 10-channel, any-frequency jitter attenuator/clock multiplier with fourth-generation DSPLL™ and MultiSynth™ architecture. It delivers 90 fs rms jitter, supports differential inputs up to 750 MHz and outputs up to 1028 MHz, and operates in free-run, locked, or holdover modes - enabling precise clock synthesis for SyncE-compliant 100 GbE line cards.

For engineers reviewing the SI5345B-B05600-GMR datasheet, SI5345B-B05600-GMR pinout, SI5345B-B05600-GMR application, or SI5345B-B05600-GMR equivalent, key selection considerations include its 0.001–350 MHz output frequency range (B-grade), programmable jitter attenuation bandwidth (0.1 Hz–4 kHz), G.8262 EEC Option 1/2 compliance, and factory-programmed configuration stored in on-chip OTP NVM.

Technical Context

The SI5345B-B05600-GMR implements a digitally controlled DSPLL with fractional input dividers (P) and MultiSynth output dividers (N/R) to enable hitless switching between fractionally related inputs and glitchless on-the-fly output frequency changes. Its loop filter is fully integrated, eliminating external components and noise coupling risks.

It supports automatic/manual input clock selection across four inputs (IN0–IN3), status monitoring (LOS/OOF/LOL), and programmable holdover using up to 120 seconds of historical frequency data. The device uses an internal oscillator with 25–54 MHz crystal reference and offers DCO mode with 0.001 ppb step resolution.

Key Specifications

Parameter	Value and Actual Design Meaning
Output Channels	10 independent, configurable clock outputs with crosspoint routing
Jitter Performance	90 fs rms (integrated 12 kHz–20 MHz), enabling ITU-T G.8262 EEC Option 1/2 compliance
Output Frequency Range	0.001–350 MHz (B-grade variant), supporting integer-only synthesis per ordering guide
Input Frequency Range	Differential: 8 kHz–750 MHz; LVCMOS: 8 kHz–250 MHz
Jitter Attenuation BW	Digitally programmable 0.1 Hz–4 kHz, allowing application-level optimization without hardware changes
Supply Voltages	VDD = 1.8 V ±5%; VDDA = 3.3 V ±5%; independent output supply pins (1.8/2.5/3.3 V)
Interface & Memory	I²C/SPI serial control; in-circuit programmable OTP NVM for power-up known-state configuration

Pinout & Package

SI5345B-B05600-GMR is housed in a 64-pin QFN package (9 × 9 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are validated per Skyworks Si5345 64-QFN pinout documentation (Rev D datasheet, Section 9).

Pin/Terminal	Circuit Role	Design Meaning
IN0–IN3	Differential/single-ended clock inputs	Support automatic/manual selection; IN3 serves as FB_IN in zero-delay mode
OUT0–OUT9	Configurable clock outputs	Each supports LVDS/LVPECL/LVCMOS/CML/HCSL with programmable amplitude and common-mode voltage
XA/XB	Cry stal resonator interface	Accepts 25–54 MHz fundamental-mode crystal; internal load caps eliminate external capacitors
SDA/SCL or MOSI/MISO/SCLK/CS	Serial interface I/O	Configurable for I²C or SPI; enables full register access and NVM programming
INTRb	Interrupt output	Asserts on LOS/OOF/LOL events; supports status monitoring without polling
RSTb	Hardware reset input	Active-low; triggers hard reset restoring NVM configuration and initializing all circuits

Key Features

Feature	Design Value
Any-frequency synthesis	Generates arbitrary output frequencies from any input via fractional P/N/R dividers - no external VCXO or loop filter required
Hitless input switching	Eliminates phase transients when switching between fractionally related clocks (e.g., 125 MHz ↔ 156.25 MHz), preserving system timing integrity
Programmable holdover	Uses 120-second frequency history with user-defined averaging window to minimize phase disturbance during input failure
Glitchless output reconfiguration	Enables on-the-fly frequency changes without output glitches - critical for dynamic network synchronization
DCO mode resolution	0.001 ppb frequency step size supports fine-grained wander correction in SyncE applications

Applications

OTN Muxponders	100 GbE Synchronous Ethernet
Use Scenario: Line card in optical transport network aggregating multiple client interfaces into OTU4 payloads. IC Role / Device Role / Timing Role: Jitter attenuator and multi-frequency clock generator synchronizing OTU4 framing, FEC, and SerDes blocks to a Stratum 3E master clock. Use Value: 90 fs rms jitter ensures BER <1e-15 under G.709 mapping; programmable holdover maintains timing continuity during upstream clock loss.	Use Scenario: Carrier-grade switch supporting IEEE 1588v2 PTP and ITU-T G.8262 SyncE distribution. IC Role / Device Role / Timing Role: Primary clock multiplier generating 100 MHz, 125 MHz, and 156.25 MHz outputs from a 10 MHz SyncE reference. Use Value: Meets EEC Option 2 wander requirements; fastlock reduces lock time to <1 s after reference recovery.
Broadcast Video Timing	Test & Measurement Equipment
Use Scenario: SMPTE ST 2059-2 compliant video router requiring ultra-low-jitter genlock and frame sync signals. IC Role / Device Role / Timing Role: Jitter-cleaned reference distributor generating 27 MHz, 74.25 MHz, and 148.5 MHz pixel clocks from tri-level sync input. Use Value: Sub-100 fs jitter prevents visible artifacts in 4K/8K real-time processing; LVDS outputs drive long backplane traces with minimal skew.	Use Scenario: High-precision signal analyzer needing stable local oscillators and sampling clocks across multiple bands. IC Role / Device Role / Timing Role: Low-phase-noise clock source for ADC/DAC sampling and RF synthesizer LO generation. Use Value: Integrated DSPLL eliminates discrete PLL loop filter sensitivity to PCB layout; programmable bandwidth optimizes jitter vs. transient response trade-off.

OTN Muxponders

100 GbE Synchronous Ethernet

Use Scenario: Line card in optical transport network aggregating multiple client interfaces into OTU4 payloads.

IC Role / Device Role / Timing Role: Jitter attenuator and multi-frequency clock generator synchronizing OTU4 framing, FEC, and SerDes blocks to a Stratum 3E master clock.

Use Value: 90 fs rms jitter ensures BER <1e-15 under G.709 mapping; programmable holdover maintains timing continuity during upstream clock loss.

Use Scenario: Carrier-grade switch supporting IEEE 1588v2 PTP and ITU-T G.8262 SyncE distribution.

IC Role / Device Role / Timing Role: Primary clock multiplier generating 100 MHz, 125 MHz, and 156.25 MHz outputs from a 10 MHz SyncE reference.

Use Value: Meets EEC Option 2 wander requirements; fastlock reduces lock time to <1 s after reference recovery.

Broadcast Video Timing

Test & Measurement Equipment

Use Scenario: SMPTE ST 2059-2 compliant video router requiring ultra-low-jitter genlock and frame sync signals.

IC Role / Device Role / Timing Role: Jitter-cleaned reference distributor generating 27 MHz, 74.25 MHz, and 148.5 MHz pixel clocks from tri-level sync input.

Use Value: Sub-100 fs jitter prevents visible artifacts in 4K/8K real-time processing; LVDS outputs drive long backplane traces with minimal skew.

Use Scenario: High-precision signal analyzer needing stable local oscillators and sampling clocks across multiple bands.

IC Role / Device Role / Timing Role: Low-phase-noise clock source for ADC/DAC sampling and RF synthesizer LO generation.

Use Value: Integrated DSPLL eliminates discrete PLL loop filter sensitivity to PCB layout; programmable bandwidth optimizes jitter vs. transient response trade-off.

Equivalent & Alternatives

The following parts are listed as comparable options for similar jitter attenuator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
SI5345A-B05600-GMR	Same package and pinout; supports full 0.001–1028 MHz output range with integer+fractional synthesis	Required where >350 MHz outputs (e.g., 644.53125 MHz SerDes rates) or fractional division is needed	Select A-grade if design requires >350 MHz outputs or fractional synthesis flexibility beyond B-grade limits
LMK04832RHAR	6-output, dual-loop jitter cleaner; 110 fs rms jitter; supports JESD204B deterministic latency	Better suited for high-speed data converter timing; lacks 10-output density and SyncE holdover depth of SI5345B	Choose LMK04832 for JESD204B systems needing sub-2 ns deterministic latency; SI5345B preferred for multi-protocol SyncE/OTN line cards

Compared with SI5345A-B05600-GMR, the SI5345B-B05600-GMR trades maximum output frequency and fractional synthesis for tighter B-grade specification and lower cost - while retaining identical pinout, package, and holdover architecture. Against LMK04832RHAR, it provides higher channel count and deeper SyncE compliance at the expense of JESD204B-specific features.

Availability

SI5345B-B05600-GMR is available at Aetrix Electronics and suitable for OTN muxponders, 100 GbE synchronous Ethernet switches, and broadcast video infrastructure requiring stable component supply across multi-year production cycles.

Supply support for SI5345B-B05600-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for communications, industrial, and automotive markets.

The Si5345 family is designed specifically for high-performance timing in telecom infrastructure - delivering jitter attenuation, multi-frequency synthesis, and robust holdover for SyncE, OTN, and packet-optical systems.

FAQ

What is the maximum output frequency supported by SI5345B-B05600-GMR?

The SI5345B-B05600-GMR supports an output frequency range of 0.001 MHz to 350 MHz, as defined by its "B" grade designation in the Skyworks ordering guide. This is a hardware-limited specification - unlike the A-grade variant, it does not support outputs above 350 MHz, even via configuration. The 350 MHz upper bound applies to all output formats (LVDS, LVPECL, LVCMOS, etc.) and is verified in the Rev D datasheet Table 2.

Does SI5345B-B05600-GMR require an external loop filter?

No, SI5345B-B05600-GMR does not require an external loop filter. Its fourth-generation DSPLL features a fully integrated loop filter implemented on-die, eliminating discrete components, reducing PCB area, and removing noise coupling paths common in traditional PLL designs. This integration is confirmed in the Rev D datasheet Section 1 and Functional Description.

How is SI5345B-B05600-GMR configured for operation?

SI5345B-B05600-GMR is configured via I²C or SPI interface and stores settings in on-chip OTP NVM. Factory preprogramming is performed using ClockBuilder Pro™ software, ensuring the device powers up with a known, validated frequency plan. Configuration includes input selection, output format, jitter attenuation bandwidth, and holdover parameters - all accessible through standard register maps.

What crystal frequency is recommended for optimal jitter performance with SI5345B-B05600-GMR?

A 48 MHz to 54 MHz fundamental-mode crystal is recommended for optimal jitter performance with SI5345B-B05600-GMR, per Section 3.5 and Table 5.12 of the Rev D datasheet. Crystals in this range minimize phase noise contribution to the DSPLL's reference path. The device includes internal load capacitors, so no external C_L components are needed - simplifying layout and improving repeatability.

Is SI5345B-B05600-GMR compliant with ITU-T G.8262 for Synchronous Ethernet?

Yes, SI5345B-B05600-GMR meets ITU-T G.8262 EEC Option 1 and Option 2 requirements for Synchronous Ethernet equipment clocks, as explicitly stated in the Rev D datasheet Features List and Section 1. This compliance is achieved through its ultra-low 90 fs rms jitter, programmable jitter attenuation bandwidth, and robust holdover algorithm using up to 120 seconds of frequency history.

SI5345B-B05600-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: *

Package/Case:: -

Packaging:: Tape & Reel (TR)

Product Status:: Obsolete

Programmable:: Not Verified

Type:: -

PLL:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Divider/Multiplier:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: -

Grade:: -

Qualification:: -

Supplier Device Package:: -

SI5345B-B05600-GMR FAQ

1.How can I place an order for SI5345B-B05600-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5345B-B05600-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5345B-B05600-GMR reliable?

The price and inventory of SI5345B-B05600-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5345B-B05600-GMR is usually 5 days.

3.What payment methods are accepted for SI5345B-B05600-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5345B-B05600-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5345B-B05600-GMR?

SI5345B-B05600-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5345B-B05600-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5345B-B05600-GMR?

For technical support, including SI5345B-B05600-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5345B-B05600-GMR requirements.

6.How does Aetrix verify that SI5345B-B05600-GMR is sourced from the original manufacturer or authorized distributors?

All SI5345B-B05600-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5345B-B05600-GMR meets industry standards.

7.What is the process for return or replacement of SI5345B-B05600-GMR?

All SI5345B-B05600-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5345B-B05600-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5345B-B05600-GMR part is unused and in its original packaging.

Return procedure for SI5345B-B05600-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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