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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Clock Generators, PLLs, Frequency Synthesizers

Skyworks Solutions Inc. SI5345D-B-GM

Name: SI5345D-B-GM
Brand: Skyworks Solutions Inc.
SKU: SI5345D-B-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5345D-B-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Clock Generators, PLLs, Frequency Synthesizers

Package:: 64-VFQFN Exposed Pad

Datasheet:: SI5345D-B-GM.pdf

Description:: IC CLK BUFFER PLL 64QFN

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5345D-B-GM from Skyworks is a 10-channel, any-frequency jitter attenuator/clock multiplier featuring fourth-generation DSPLL™ and MultiSynth™ architectures. It delivers ultra-low 90 fs rms jitter, supports differential inputs up to 750 MHz and outputs up to 1028 MHz, and operates in free-run, locked, or holdover modes - enabling precise clock synthesis for SyncE-compliant 100 GbE line cards.

For engineers reviewing the SI5345D-B-GM datasheet, SI5345D-B-GM pinout, SI5345D-B-GM application, or SI5345D-B-GM equivalent, key selection considerations include its 0.1–4 kHz digitally programmable jitter attenuation bandwidth, G.8262 EEC Option 1/2 compliance, I²C/SPI configurability with on-chip NVM, and support for LVDS/LVPECL/LVCMOS/CML/HCSL output formats with independent supply voltage per output bank.

Technical Context

The SI5345D-B-GM implements a dual-stage architecture: a DSPLL loop with fractional input dividers (P) for hitless switching between fractionally related inputs, and programmable MultiSynth dividers (N) with integer R-division for final output frequency synthesis. Its loop bandwidth is fully digital (0.1 Hz–4 kHz), eliminating analog filter sensitivity while ensuring <0.1 dB peaking across all settings.

It integrates status monitoring (LOS/OOF/LOL), glitchless on-the-fly frequency changes, DCO mode with 0.001 ppb step size, and ramped holdover exit using user-selectable slew rates (0.2–40,000 ppm/s). Input qualification, automatic priority-based switching, and gapped-clock locking are handled by an internal state machine without external intervention.

Key Specifications

Parameter	Value and Actual Design Meaning
Jitter (rms)	90 fs - meets stringent ITU-T G.8262 EEC Option 1/2 requirements for SyncE applications
Input range (diff)	8 kHz–750 MHz - supports OC-192, SONET, and high-speed serial data recovery clocks
Output range (diff)	100 Hz–1028 MHz - covers Ethernet, CPRI, and PCIe Gen5 reference frequencies
Jitter BW	0.1–4 kHz - digitally selectable to optimize attenuation vs. wander trade-off per system requirement
Supply voltages	VDD = 1.8 V ±5%, VDDA = 3.3 V ±5% - enables low-power core operation with robust analog rail
Output formats	LVDS, LVPECL, LVCMOS, CML, HCSL - configurable per-output with programmable amplitude and common-mode voltage
Temp range	–40 °C to +85 °C - qualified for industrial and telecom infrastructure environments

Pinout & Package

SI5345D-B-GM is housed in a 64-pin QFN package (9 × 9 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions align with the Si5345 family's standardized layout, supporting 4 differential/single-ended inputs (IN0–IN3), 10 programmable outputs (OUT0–OUT9), crystal interface (XA/XB), I²C/SPI control (SDA/SCL/MOSI/MISO/SCLK/CSB), and dedicated power/ground banks per output group.

Pin/Terminal	Circuit Role	Design Meaning
IN0–IN3	Differential or LVCMOS input	Accepts primary timing references; IN3 serves as FB_IN in zero-delay mode
OUT0–OUT9	Programmable clock outputs	Each independently configurable for format, frequency, amplitude, and enable/disable
XA/XB	Crytal oscillator interface	Connects 25–54 MHz fundamental-mode crystal; internal load caps eliminate external components
SCL/SDA or SCLK/MOSI/MISO/CSB	Serial configuration interface	Supports I²C or SPI; enables in-circuit programming of NVM for power-up configuration
INTRb	Interrupt output	Asserts on LOS/OOF/LOL events; enables real-time fault monitoring without polling

Key Features

Feature	Design Value
Hitless input switching	Eliminates phase transients when switching between fractionally related clocks (e.g., 156.25 MHz ↔ 312.5 MHz)
Programmable holdover history	Stores 120 s of locked-frequency data; uses programmable window/delay to compute stable holdover frequency
Ramped holdover exit	Linearly slews output frequency from holdover value to target at user-defined rate (0.2–40,000 ppm/s)
DCO mode resolution	0.001 ppb frequency step size - enables fine-grained timing adjustments for packet network synchronization
Glitchless input pull-in	Locks to new input within ±500 ppm offset without output phase discontinuity or LOL assertion delay

Applications

OTN Muxponders	100 GbE Line Cards
Use Scenario: Aggregating multiple lower-rate client signals into a single OTU4 wavelength with strict jitter accumulation limits. IC Role / Device Role / Timing Role: Jitter attenuator and multi-frequency clock generator synchronizing muxponder PHY, FEC, and framing logic. Use Value: 90 fs rms jitter ensures OTU4 BER <1e−15 under worst-case cascaded jitter; programmable bandwidth suppresses low-frequency wander from upstream SyncE sources.	Use Scenario: Providing clean, synchronized reference clocks to multiple SerDes lanes and MAC processors on a 100 GbE switch line card. IC Role / Device Role / Timing Role: Central clock multiplier distributing 100 MHz, 156.25 MHz, and 312.5 MHz clocks with independent format control per subsystem. Use Value: Ten configurable outputs eliminate discrete clock buffers; LVDS/LVPECL compatibility ensures signal integrity across long PCB traces to SerDes ICs.
Broadcast Video	Test & Measurement
Use Scenario: Generating genlock, frame sync, and pixel clocks for 4K/8K video processing pipelines requiring sub-picosecond phase stability. IC Role / Device Role / Timing Role: Low-jitter clock synthesizer delivering SMPTE ST 2082–1 (12G-SDI) and ST 2081–1 (6G-SDI) reference frequencies. Use Value: Ultra-low 90 fs jitter prevents visible timing artifacts in high-resolution video; DCO mode enables real-time phase alignment during camera switching.	Use Scenario: Serving as a reconfigurable reference source in high-precision oscilloscopes and bit-error-rate testers where clock purity directly impacts measurement accuracy. IC Role / Device Role / Timing Role: Programmable jitter attenuator generating calibrated test clocks with known spectral purity and phase noise floor. Use Value: Factory-programmable NVM allows preloading of application-specific configurations; Fastlock reduces setup time during automated test sequences.

OTN Muxponders

100 GbE Line Cards

Use Scenario: Aggregating multiple lower-rate client signals into a single OTU4 wavelength with strict jitter accumulation limits.

IC Role / Device Role / Timing Role: Jitter attenuator and multi-frequency clock generator synchronizing muxponder PHY, FEC, and framing logic.

Use Value: 90 fs rms jitter ensures OTU4 BER <1e−15 under worst-case cascaded jitter; programmable bandwidth suppresses low-frequency wander from upstream SyncE sources.

Use Scenario: Providing clean, synchronized reference clocks to multiple SerDes lanes and MAC processors on a 100 GbE switch line card.

IC Role / Device Role / Timing Role: Central clock multiplier distributing 100 MHz, 156.25 MHz, and 312.5 MHz clocks with independent format control per subsystem.

Use Value: Ten configurable outputs eliminate discrete clock buffers; LVDS/LVPECL compatibility ensures signal integrity across long PCB traces to SerDes ICs.

Broadcast Video

Test & Measurement

Use Scenario: Generating genlock, frame sync, and pixel clocks for 4K/8K video processing pipelines requiring sub-picosecond phase stability.

IC Role / Device Role / Timing Role: Low-jitter clock synthesizer delivering SMPTE ST 2082–1 (12G-SDI) and ST 2081–1 (6G-SDI) reference frequencies.

Use Value: Ultra-low 90 fs jitter prevents visible timing artifacts in high-resolution video; DCO mode enables real-time phase alignment during camera switching.

Use Scenario: Serving as a reconfigurable reference source in high-precision oscilloscopes and bit-error-rate testers where clock purity directly impacts measurement accuracy.

IC Role / Device Role / Timing Role: Programmable jitter attenuator generating calibrated test clocks with known spectral purity and phase noise floor.

Use Value: Factory-programmable NVM allows preloading of application-specific configurations; Fastlock reduces setup time during automated test sequences.

Equivalent & Alternatives

The following parts are listed as comparable options for similar jitter attenuator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5345A-D-GM	Supports full 0.001–1028 MHz output range with integer+fractional synthesis; SI5345D-B-GM limited to ≤350 MHz outputs	Required for >350 MHz outputs (e.g., PCIe Gen5 32 GHz reference division)	Select Si5345A-D-GM if output frequencies exceed 350 MHz or fractional synthesis is needed beyond base integer modes
LTC6957-3	Analog PLL-based jitter cleaner; 225 fs rms jitter; no integrated crystal oscillator or NVM; requires external loop filter	Better suited for narrowband, fixed-frequency cleaning where DSPLL flexibility is unnecessary	Choose LTC6957-3 only for cost-sensitive, single-output applications with static clock plans and no need for field reconfiguration

Compared with SI5345A-D-GM, SI5345D-B-GM trades maximum output frequency and fractional synthesis for tighter specification control in mid-band SyncE applications; versus LTC6957-3, it provides integrated digital programmability, multi-output scalability, and autonomous holdover - at the expense of higher component count in simple single-clock scenarios.

Availability

SI5345D-B-GM is available at Aetrix Electronics and suitable for 100 GbE line cards, OTN muxponders, broadcast video infrastructure, and SyncE-compliant carrier switches requiring stable component supply across extended production lifecycles.

Supply support for SI5345D-B-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5345 family is engineered for high-performance timing in telecom infrastructure, delivering jitter-attenuated, multi-frequency clock synthesis with autonomous failover - specifically targeting ITU-T G.8262 and IEEE 1588-compliant systems.

FAQ

What is the maximum output frequency supported by the SI5345D-B-GM?

The SI5345D-B-GM supports differential output frequencies up to 350 MHz, as specified in Skyworks' Ordering Guide for the "D" variant. This is lower than the full Si5345 family's 1028 MHz capability and reflects its optimization for mid-band SyncE and OTN applications where jitter performance at 156.25 MHz, 311.04 MHz, and similar rates is prioritized over extreme high-frequency reach. The SI5345D-B-GM maintains 90 fs rms jitter across its entire 100 Hz–350 MHz range.

Does the SI5345D-B-GM require an external crystal, and what frequency range is supported?

Yes, the SI5345D-B-GM requires an external fundamental-mode crystal connected to XA/XB pins, operating in the 25–54 MHz range. Skyworks recommends 48–54 MHz crystals for optimal jitter performance. The device integrates internal load capacitors, eliminating the need for external tuning capacitors and reducing board-level noise coupling. Crystal selection directly impacts holdover stability and free-run accuracy, especially in telecom applications requiring tight wander specifications.

How does the SI5345D-B-GM handle loss of input clock, and what is its holdover behavior?

The SI5345D-B-GM automatically enters holdover mode when all valid inputs fail, using up to 120 seconds of stored historical frequency data to compute a stable holdover frequency. Its programmable holdover window and delay allow designers to exclude corrupted pre-failure data. Output frequency drift during holdover depends solely on the external crystal's stability - making TCXO integration advisable for pizza-box SyncE deployments where wander must remain below ITU-T G.8262 limits.

Can the SI5345D-B-GM generate different output formats simultaneously, and how is this configured?

Yes, the SI5345D-B-GM supports simultaneous LVDS, LVPECL, LVCMOS, CML, and HCSL outputs across its 10 channels. Each output bank has independent supply pins (3.3 V, 2.5 V, or 1.8 V), enabling mixed-voltage operation. Format, amplitude, common-mode voltage, and polarity are configured per-output via SPI or I²C registers - all stored in on-chip NVM so the SI5345D-B-GM powers up with the exact required configuration without host intervention.

Is the SI5345D-B-GM pin-compatible with other Si5345 variants such as the SI5345A-D-GM or SI5345C-D-GM?

Yes, all Si5345 variants including SI5345D-B-GM share identical 64-QFN 9×9 mm packaging and pinout. Mechanical and electrical pin compatibility is guaranteed across the Si5345 family. However, functional differences exist: SI5345D-B-GM is factory-configured for ≤350 MHz outputs and integer-only synthesis, whereas SI5345A-D-GM supports full 1028 MHz range with fractional synthesis. No PCB redesign is needed when upgrading - only firmware/NVM reprogramming may be required to unlock extended features.

SI5345D-B-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: -

Package/Case:: 64-VFQFN Exposed Pad

Packaging:: Tray

Product Status:: Obsolete

Programmable:: Not Verified

Type:: -

PLL:: Yes

Input:: LVCMOS, LVDS, LVPECL, Crystal

Output:: CML, HCSL, LVCMOS, LVDS, LVPECL

Number of Circuits:: 1

Ratio - Input:Output:: 5:10

Differential - Input:Output:: Yes/Yes

Frequency - Max:: 350MHz

Divider/Multiplier:: Yes/No

Voltage - Supply:: 1.71V ~ 3.47V

Operating Temperature:: -40°C ~ 85°C

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 64-QFN (9x9)

SI5345D-B-GM FAQ

1.How can I place an order for SI5345D-B-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5345D-B-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5345D-B-GM reliable?

The price and inventory of SI5345D-B-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5345D-B-GM is usually 5 days.

3.What payment methods are accepted for SI5345D-B-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5345D-B-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5345D-B-GM?

SI5345D-B-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5345D-B-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5345D-B-GM?

For technical support, including SI5345D-B-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5345D-B-GM requirements.

6.How does Aetrix verify that SI5345D-B-GM is sourced from the original manufacturer or authorized distributors?

All SI5345D-B-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5345D-B-GM meets industry standards.

7.What is the process for return or replacement of SI5345D-B-GM?

All SI5345D-B-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5345D-B-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5345D-B-GM part is unused and in its original packaging.

Return procedure for SI5345D-B-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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