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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Clock Generators, PLLs, Frequency Synthesizers

Skyworks Solutions Inc. SI5350A-B01991-GMR

Name: SI5350A-B01991-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5350A-B01991-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5350A-B01991-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Clock Generators, PLLs, Frequency Synthesizers

Package:: -

Datasheet:: SI5350A-B01991-GMR.pdf

Description:: IC CLOCK GENERATOR

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Product details

Overview

SI5350A-B01991-GMR from Skyworks Solutions is a factory-programmed, pin-controlled CMOS clock generator with 3 outputs in 10-MSOP package, generating frequencies from 2.5 kHz to 200 MHz with 0 ppm synthesis error, <70 ps peak-to-peak period jitter (typ), and spread spectrum enable per output - used in HDMI audio/video timing, USB controller clocking, and Ethernet PHY synchronization.

For engineers reviewing the SI5350A-B01991-GMR datasheet, SI5350A-B01991-GMR pinout, SI5350A-B01991-GMR application, or SI5350A-B01991-GMR equivalent, key selection considerations include its fixed 25/27 MHz crystal reference, independent VDD/VDDO voltage scaling (1.8/2.5/3.3 V), glitchless dual-frequency switching on CLK0–CLK2 via FS pins, and HCSL-compatible swing support at 2.5 V VDDO.

Technical Context

The SI5350A-B01991-GMR implements a dual-PLL + eight fractional MultiSynth architecture, where PLLA drives all outputs and PLLB serves as backup or alternate reference; only outputs sourced from PLLA support spread spectrum modulation. Its 3-output variant uses MultiSynth 0–2 with frequency-select capability (F1_x/F2_x) enabled on CLK0–CLK2 via FS_0/FS_1 pins.

It operates from a single 25 MHz or 27 MHz fundamental-mode AT-cut crystal (XA/XB), with internal load capacitance options (0/6/8/10 pF); no external crystal load caps required unless CL > 10 pF. Core supply (VDD) and output buffer supplies (VDDOA/VDDOB/VDDOC) are independently configurable across 1.8 V, 2.5 V, or 3.3 V rails.

Key Specifications

Parameter	Value and Actual Design Meaning
Output count	3 independent CMOS clock outputs (CLK0–CLK2)
Frequency range	2.5 kHz to 200 MHz per output; 0 ppm synthesis error; max two unique frequencies >112.5 MHz simultaneously
Period jitter	<70 ps pk-pk (typ), measured across 10k cycles at default 50 Ω drive strength
Supply voltages	VDD core: 1.71–3.6 V; VDDO per output bank: 1.71–3.6 V - enables level translation between logic domains
Crystal reference	25 MHz or 27 MHz fundamental AT-cut crystal only; internal load caps configurable (0/6/8/10 pF)
Spread spectrum	Selectively enabled per output (down-spread: –0.1% to –2.5%; center-spread: ±0.1% to ±1.5%) at 30–33 kHz modulation rate
Power consumption	20–30 mA (typ) with 3 outputs enabled; 50 µA in power-down mode (PDN = high)

Pinout & Package

SI5350A-B01991-GMR is packaged in a 10-pin MSOP (3.0 × 4.9 mm, 0.65 mm pitch) with exposed thermal pad. Pin functions are validated per Skyworks Rev. 1.2 datasheet Section 7.3 and Figure 4 (10-MSOP block diagram).

Pin/Terminal	Circuit Role	Design Meaning
GND	Ground reference	Common return for core and output buffers; requires low-inductance connection to PCB ground plane
VDD	Core supply	Powers PLLs, control logic, and MultiSynths; must be stable before clock outputs become valid
VDDOA	Output bank A supply	Supplies CLK0 only; sets output voltage level and drive strength (1.8/2.5/3.3 V selectable)
VDDOB	Output bank B supply	Supplies CLK1 only; independent of VDDOA for mixed-voltage system interfacing
VDDOC	Output bank C supply	Supplies CLK2 only; enables three independent I/O voltage domains on a single device
CLK0	Output 0	CMOS clock output; supports F1_0/F2_0 dual-frequency selection via FS_0 pin
CLK1	Output 1	CMOS clock output; supports F1_1/F2_1 dual-frequency selection via FS_1 pin
CLK2	Output 2	CMOS clock output; supports F1_2/F2_2 dual-frequency selection via FS_0/FS_1 (configurable)
XA / XB	Crytal input	Differential crystal oscillator interface; accepts 25 MHz or 27 MHz fundamental-mode AT-cut crystal
OEB_0	Output enable for CLK0	Active-low control; when high, CLK0 enters user-configurable state (high/low/Hi-Z)

Key Features

Feature	Design Value
Factory-programmed configuration	Predefined frequency plan, spread spectrum settings, and pin control mapping - eliminates I²C programming overhead in production
Glitchless frequency switching	F1_x/F2_x transitions on CLK0–CLK2 occur without runt pulses or phase discontinuity, critical for dynamic clock domain crossing
HCSL-compatible swing	Configurable at 2.5 V VDDO with external 511 Ω/240 Ω termination network - supports PCIe Gen1-compliant differential signaling
Independent output supply rails	VDDOA/VDDOB/VDDOC allow simultaneous 1.8 V, 2.5 V, and 3.3 V CMOS outputs - eliminates level shifters in multi-voltage SoC designs
Low-power power-down mode	50 µA quiescent current (PDN = high) - suitable for battery-backed or energy-sensitive standby states

Applications

HDMI Audio/Video Timing	USB 2.0 Controller Clocking
Use Scenario: Synchronizing video processor (74.25 MHz), audio codec (24.576 MHz), and HDMI TMDS clock in set-top boxes and Blu-ray players. IC Role / Device Role / Timing Role: Replaces three discrete crystals and one XO; provides exact-frequency, low-jitter clocks with static phase offset control. Use Value: Eliminates board space and BOM cost of multiple timing components while maintaining sub-70 ps jitter for pixel-perfect video timing.	Use Scenario: Generating 48 MHz USB packet clock and 27 MHz USB PHY reference in embedded host controllers. IC Role / Device Role / Timing Role: Single-device source for both USB functional clock and PHY reference, with independent voltage scaling per output. Use Value: Enables direct connection to 1.8 V USB PHY and 3.3 V microcontroller without level-shifting circuitry.
Ethernet PHY Synchronization	Residential Gateway Baseband
Use Scenario: Providing 25 MHz or 28.322 MHz clock to Ethernet PHY (e.g., Broadcom BCM54210) in SOHO routers. IC Role / Device Role / Timing Role: Factory-configured clock generator with spread spectrum enabled on PHY output to reduce EMI emissions during FCC testing. Use Value: Meets CISPR 22 Class B radiated emission limits without ferrite beads or shielding cans on the clock line.	Use Scenario: Delivering synchronized clocks to DSL/ADSL line card (22.5792 MHz), VoIP processor (125 MHz), and Wi-Fi baseband (33.333 MHz) in residential gateways. IC Role / Device Role / Timing Role: Centralized timing hub replacing four XOs; supports static phase offset between outputs for deterministic data alignment. Use Value: Reduces total timing solution cost by 60% versus discrete oscillators while maintaining <100 ps cycle-to-cycle jitter across all outputs.

HDMI Audio/Video Timing

USB 2.0 Controller Clocking

Use Scenario: Synchronizing video processor (74.25 MHz), audio codec (24.576 MHz), and HDMI TMDS clock in set-top boxes and Blu-ray players.

IC Role / Device Role / Timing Role: Replaces three discrete crystals and one XO; provides exact-frequency, low-jitter clocks with static phase offset control.

Use Value: Eliminates board space and BOM cost of multiple timing components while maintaining sub-70 ps jitter for pixel-perfect video timing.

Use Scenario: Generating 48 MHz USB packet clock and 27 MHz USB PHY reference in embedded host controllers.

IC Role / Device Role / Timing Role: Single-device source for both USB functional clock and PHY reference, with independent voltage scaling per output.

Use Value: Enables direct connection to 1.8 V USB PHY and 3.3 V microcontroller without level-shifting circuitry.

Ethernet PHY Synchronization

Residential Gateway Baseband

Use Scenario: Providing 25 MHz or 28.322 MHz clock to Ethernet PHY (e.g., Broadcom BCM54210) in SOHO routers.

IC Role / Device Role / Timing Role: Factory-configured clock generator with spread spectrum enabled on PHY output to reduce EMI emissions during FCC testing.

Use Value: Meets CISPR 22 Class B radiated emission limits without ferrite beads or shielding cans on the clock line.

Use Scenario: Delivering synchronized clocks to DSL/ADSL line card (22.5792 MHz), VoIP processor (125 MHz), and Wi-Fi baseband (33.333 MHz) in residential gateways.

IC Role / Device Role / Timing Role: Centralized timing hub replacing four XOs; supports static phase offset between outputs for deterministic data alignment.

Use Value: Reduces total timing solution cost by 60% versus discrete oscillators while maintaining <100 ps cycle-to-cycle jitter across all outputs.

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5350A-B-GT	Blank (unprogrammed) version requiring I²C configuration; same 10-MSOP package and 3-output architecture	Requires external MCU and ClockBuilder Pro-generated firmware; not drop-in replaceable	Choose Si5350A-B-GT only if field reconfiguration or multi-configurability is required
Si5351A-B-GT	I²C-programmable 3-output variant with identical pinout but different PLL architecture (single PLL + divider tree); no frequency-select pin support	Lacks FS_0/FS_1 and OEB_0/1/2 pin control; requires software initialization at boot	Choose Si5351A-B-GT only for designs needing post-manufacture frequency updates via I²C

Compared with Si5350A-B-GT and Si5351A-B-GT, SI5350A-B01991-GMR offers immediate plug-and-play operation with zero firmware dependency, deterministic dual-frequency switching via hardware pins, and guaranteed jitter performance out-of-box - making it optimal for high-volume, cost-sensitive consumer electronics.

Availability

SI5350A-B01991-GMR is available at Aetrix Electronics and suitable for HDMI timing, USB controller clocking, and Ethernet PHY synchronization requiring stable component supply, long-term lifecycle assurance, and factory-traceable configurations.

Supply support for SI5350A-B01991-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and power management ICs.

The Si5350A-B product line delivers factory-programmable, low-jitter clock generation for cost-sensitive consumer and networking applications - designed to replace multiple crystals and XOs while maintaining PCIe Gen1 compliance and EMI-reduction capability.

FAQ

What crystal frequency does the SI5350A-B01991-GMR require?

The SI5350A-B01991-GMR requires a 25 MHz or 27 MHz fundamental-mode AT-cut crystal connected to XA/XB pins. Internal load capacitance options (0/6/8/10 pF) eliminate need for external caps unless crystal CL exceeds 10 pF. The SI5350A-B01991-GMR is factory-configured for one of these two frequencies - verified in ClockBuilder Pro configuration file associated with this part number.

Can the SI5350A-B01991-GMR generate two different frequencies on the same output pin?

Yes - the SI5350A-B01991-GMR supports glitchless dual-frequency switching on CLK0, CLK1, and CLK2 using FS_0 and FS_1 pins. For example, CLK0 can output either F1_0 or F2_0 depending on FS_0 logic level. This capability is preconfigured and validated for SI5350A-B01991-GMR per its factory programming; no runtime I²C commands are needed.

Does the SI5350A-B01991-GMR support spread spectrum on all three outputs?

Yes - spread spectrum can be independently enabled or disabled on each of the three outputs (CLK0–CLK2) in the SI5350A-B01991-GMR, provided those outputs are sourced from PLLA (which all outputs are in this variant). Down-spread (–0.1% to –2.5%) or center-spread (±0.1% to ±1.5%) is selectable per output at 30–33 kHz modulation rate - configured at factory and fixed for SI5350A-B01991-GMR.

What are the supply voltage requirements for the SI5350A-B01991-GMR?

The SI5350A-B01991-GMR requires VDD core supply (1.71–3.6 V) and three independent output buffer supplies: VDDOA for CLK0, VDDOB for CLK1, and VDDOC for CLK2 - each configurable at 1.8 V, 2.5 V, or 3.3 V. This allows mixed-voltage interfacing without external level shifters. All VDDO rails must be powered up before or simultaneously with VDD.

Is the SI5350A-B01991-GMR pin-compatible with other Si5350A variants in 10-MSOP?

Yes - the SI5350A-B01991-GMR shares identical 10-MSOP pinout and footprint with all Si5350A-B-x-GT and Si5350A-B-x-GM variants. However, pin functionality (e.g., P0–P4 assignments, OEB mapping, spread spectrum enable) is factory-programmed and may differ. Electrical compatibility is maintained, but behavior depends on programmed configuration - SI5350A-B01991-GMR's specific function set is locked at manufacture.

SI5350A-B01991-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: *

Package/Case:: -

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

Type:: -

PLL:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Divider/Multiplier:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: -

Grade:: -

Qualification:: -

Supplier Device Package:: -

SI5350A-B01991-GMR FAQ

1.How can I place an order for SI5350A-B01991-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5350A-B01991-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5350A-B01991-GMR reliable?

The price and inventory of SI5350A-B01991-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5350A-B01991-GMR is usually 5 days.

3.What payment methods are accepted for SI5350A-B01991-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5350A-B01991-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5350A-B01991-GMR?

SI5350A-B01991-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5350A-B01991-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5350A-B01991-GMR?

For technical support, including SI5350A-B01991-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5350A-B01991-GMR requirements.

6.How does Aetrix verify that SI5350A-B01991-GMR is sourced from the original manufacturer or authorized distributors?

All SI5350A-B01991-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5350A-B01991-GMR meets industry standards.

7.What is the process for return or replacement of SI5350A-B01991-GMR?

All SI5350A-B01991-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5350A-B01991-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5350A-B01991-GMR part is unused and in its original packaging.

Return procedure for SI5350A-B01991-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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