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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Clock Generators, PLLs, Frequency Synthesizers

Skyworks Solutions Inc. SI5350A-B01997-GM

Name: SI5350A-B01997-GM
Brand: Skyworks Solutions Inc.
SKU: SI5350A-B01997-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5350A-B01997-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Clock Generators, PLLs, Frequency Synthesizers

Package:: -

Datasheet:: SI5350A-B01997-GM.pdf

Description:: IC CLOCK GENERATOR

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Product details

Overview

SI5350A-B01997-GM from Skyworks Solutions is a factory-programmed, pin-controlled CMOS clock generator delivering up to 8 independent output frequencies (2.5 kHz–200 MHz) with 0 ppm synthesis error, low period jitter (<70 ps pk-pk), and configurable spread spectrum on any output. It replaces multiple crystals/XOs in audio/video processors, HDMI interfaces, and Ethernet PHYs using a single 25 or 27 MHz crystal reference.

For engineers reviewing the SI5350A-B01997-GM datasheet, SI5350A-B01997-GM pinout, SI5350A-B01997-GM application, or SI5350A-B01997-GM equivalent, key selection factors include its 20-QFN-20 package, 8-output capability, dual-PLL + fractional MultiSynth architecture, independent VDD/VDDO voltage scaling (1.8/2.5/3.3 V), and HCSL-compatible swing support at 2.5 V VDDO.

Technical Context

The SI5350A-B01997-GM implements two high-frequency PLLs (PLLA and PLLB) plus eight independent fractional MultiSynth™ dividers-one per output-enabling simultaneous generation of non-integer-related frequencies. PLLA supports spread spectrum modulation (±0.1% to ±1.5% center-spread, –0.1% to –2.5% down-spread at 30–33 kHz), while PLLB provides low-jitter outputs without spread spectrum.

It accepts only a fixed 25 or 27 MHz crystal via XA/XB pins (no external CLKIN), uses programmable control pins (P0–P4) for OEB_0/1/2, PDN, FS_0/1, and SSEN, and supports static phase offset, rise/fall time control, and output state configuration (high/low/Hi-Z) per channel.

Key Specifications

Parameter	Value and Actual Design Meaning
Output count	8 independent CMOS clock outputs (CLK0–CLK7)
Frequency range	2.5 kHz to 200 MHz per output; max two unique frequencies >112.5 MHz simultaneously
Period jitter	<70 ps pk-pk typical (all outputs active, worst-case frequency plan)
Core supply	1.71–1.89 V / 2.25–2.75 V / 3.0–3.6 V; supports mixed VDD/VDDO rail operation
Crystal reference	25 MHz or 27 MHz AT-cut crystal only (no external clock input)
Spread spectrum	Selectable per-output on PLLA-derived clocks; center-spread (±0.1–±1.5%) or down-spread (–0.1––2.5%)
Power consumption	25 mA typical core current with all 8 outputs enabled

Pinout & Package

SI5350A-B01997-GM is packaged in a 20-pin QFN (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks Rev. 1.2 datasheet Section 7.1.

Pin/Terminal	Circuit Role	Design Meaning
XA, XB	Crytal reference input pair	Accepts 25 or 27 MHz fundamental-mode AT-cut crystal; internal load capacitance selectable (0/6/8/10 pF)
CLK0–CLK7	CMOS clock outputs	Individually configurable frequency, drive strength, invert/non-invert, and disable state (Hi-Z/low/high)
VDD	Core supply	Powers PLLs, logic, and MultiSynths; must be powered before or concurrently with VDDOx rails
VDDOA–VDDOD	Output buffer supplies	Four independent 1.8/2.5/3.3 V rails enabling level translation and HCSL-compatible swing at 2.5 V
P0–P4	Configurable control inputs	Programmable as OEB_0/1/2 (output enable), PDN (global power-down), FS_0/1 (dual-frequency select), or SSEN (spread spectrum enable)
GND	Ground reference	Eight dedicated ground pins (GND0–GND7) and one thermal pad ground for noise isolation and thermal dissipation

Key Features

Feature	Design Value
Factory-programmed configuration	Delivers exact user-defined frequencies and control pin mapping without I²C interface or runtime programming
Dual-PLL + per-output MultiSynth	Enables glitchless frequency switching and independent synthesis of up to 8 unrelated clocks from one crystal
HCSL-compatible output swing	Supported on CLK0/1 (VDDOA = 2.5 V), CLK2/3 (VDDOB = 2.5 V), etc., with external termination for differential signaling
Independent VDDO rails	Four VDDO supplies allow mixed-voltage system interfacing (e.g., 1.8 V CPU + 3.3 V peripheral clocks)
Low-power operation	25 mA typical core current with all outputs active; 50 µA power-down current when PDN = high
PCIE Gen 1 compliance	Meets jitter and timing requirements for PCIe Gen 1 reference clock applications

Applications

Audio/Video Processing	HDMI Interface Timing
Use Scenario: Synchronizing video processor, audio codec, and HDMI transmitter in set-top boxes or Blu-ray players. IC Role / Device Role / Timing Role: Generates 74.25 MHz (HDMI pixel clock), 24.576 MHz (audio sample rate), and 27 MHz (video encoder reference) simultaneously from one crystal. Use Value: Eliminates three discrete oscillators, reduces BOM cost and board space, and ensures deterministic inter-clock phase alignment.	Use Scenario: Providing precise, low-jitter reference clocks to HDMI source devices compliant with HDMI 1.4+ specifications. IC Role / Device Role / Timing Role: Delivers 74.25 MHz (standard pixel clock) and 22.5792 MHz (audio return channel) with <70 ps period jitter and 45–55% duty cycle. Use Value: Meets HDMI jitter tolerance (≤ 500 ps peak-to-peak) without external filtering, simplifying layout and improving signal integrity.
Ethernet PHY Clocking	Residential Gateway SoC
Use Scenario: Supplying synchronized clocks to multi-port Ethernet PHYs (e.g., 25/50/125 MHz variants) in SMB switches. IC Role / Device Role / Timing Role: Generates 25 MHz (PHY reference), 125 MHz (RGMII TX/RX), and 28.322 MHz (USB 2.0 PHY) with independent spread spectrum on noise-sensitive outputs. Use Value: Reduces EMI emissions across multiple PHY lanes while maintaining IEEE 802.3 jitter compliance.	Use Scenario: Replacing multiple XOs in integrated residential gateways combining Wi-Fi, VoIP, and DSL modems. IC Role / Device Role / Timing Role: Provides 33.333 MHz (CPU), 48 MHz (USB), 27 MHz (DSL PHY), and 125 MHz (switch fabric) from a single 27 MHz crystal. Use Value: Lowers total timing solution cost by >40% versus discrete XO approach and enables unified firmware clock management.

Audio/Video Processing

HDMI Interface Timing

Use Scenario: Synchronizing video processor, audio codec, and HDMI transmitter in set-top boxes or Blu-ray players.

IC Role / Device Role / Timing Role: Generates 74.25 MHz (HDMI pixel clock), 24.576 MHz (audio sample rate), and 27 MHz (video encoder reference) simultaneously from one crystal.

Use Value: Eliminates three discrete oscillators, reduces BOM cost and board space, and ensures deterministic inter-clock phase alignment.

Use Scenario: Providing precise, low-jitter reference clocks to HDMI source devices compliant with HDMI 1.4+ specifications.

IC Role / Device Role / Timing Role: Delivers 74.25 MHz (standard pixel clock) and 22.5792 MHz (audio return channel) with <70 ps period jitter and 45–55% duty cycle.

Use Value: Meets HDMI jitter tolerance (≤ 500 ps peak-to-peak) without external filtering, simplifying layout and improving signal integrity.

Ethernet PHY Clocking

Residential Gateway SoC

Use Scenario: Supplying synchronized clocks to multi-port Ethernet PHYs (e.g., 25/50/125 MHz variants) in SMB switches.

IC Role / Device Role / Timing Role: Generates 25 MHz (PHY reference), 125 MHz (RGMII TX/RX), and 28.322 MHz (USB 2.0 PHY) with independent spread spectrum on noise-sensitive outputs.

Use Value: Reduces EMI emissions across multiple PHY lanes while maintaining IEEE 802.3 jitter compliance.

Use Scenario: Replacing multiple XOs in integrated residential gateways combining Wi-Fi, VoIP, and DSL modems.

IC Role / Device Role / Timing Role: Provides 33.333 MHz (CPU), 48 MHz (USB), 27 MHz (DSL PHY), and 125 MHz (switch fabric) from a single 27 MHz crystal.

Use Value: Lowers total timing solution cost by >40% versus discrete XO approach and enables unified firmware clock management.

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5350A-B-GM	Blank (unprogrammed) version requiring ClockBuilder Pro configuration and factory programming	Not preconfigured; requires custom part number generation and lead time for programming	Select SI5350A-B01997-GM for immediate deployment of verified 8-output frequency plan; choose Si5350A-B-GM only if design requires different output frequencies or control pin mapping
Si5351A-B-GM	I²C-programmable (not pin-controlled); supports CLKIN in addition to crystal; 8 outputs but no PLLB bypass mode	Requires microcontroller I²C interface and runtime initialization; lacks static phase offset and HCSL compatibility	Choose SI5350A-B01997-GM for pin-strapped, crystal-only systems needing guaranteed startup timing and HCSL swing; use Si5351A-B-GM only if dynamic reconfiguration or external clock input is required

Compared with Si5350A-B-GM and Si5351A-B-GM, SI5350A-B01997-GM delivers production-ready timing with zero firmware dependency, guaranteed 25–27 MHz crystal lock, and hardware-level spread spectrum control-critical for cost-sensitive, high-volume consumer electronics where BOM reduction and test repeatability are prioritized over runtime flexibility.

Availability

SI5350A-B01997-GM is available at Aetrix Electronics and suitable for audio/video processing, HDMI interface timing, Ethernet PHY clocking, and residential gateway SoC designs requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for SI5350A-B01997-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and power management ICs.

The Si5350A family is designed for cost-sensitive, high-volume applications requiring flexible, factory-programmed clock generation-replacing multiple discrete oscillators while maintaining sub-100 ps jitter performance and PCIE Gen 1 compliance.

FAQ

What is the reference clock requirement for SI5350A-B01997-GM?

The SI5350A-B01997-GM requires a 25 MHz or 27 MHz fundamental-mode AT-cut crystal connected to XA/XB pins. It does not accept external clock signals (CLKIN). Internal load capacitance is configurable (0/6/8/10 pF), and optional external capacitors ≤2 pF may be added for crystals requiring 12 pF load.

Does SI5350A-B01997-GM support HCSL-compatible output swing?

Yes, SI5350A-B01997-GM supports HCSL-compatible swing on output pairs when the corresponding VDDO rail is set to 2.5 V (e.g., VDDOA = 2.5 V for CLK0/CLK1). This requires external 511 Ω pull-up and 240 Ω pull-down resistors per output and inversion of one clock in the pair to form a differential signal.

How many unique high-frequency outputs can SI5350A-B01997-GM generate above 112.5 MHz?

SI5350A-B01997-GM can simultaneously output no more than two unique frequencies above 112.5 MHz. For example, 125 MHz and 130 MHz may be assigned to separate outputs, but a third distinct frequency >112.5 MHz (e.g., 150 MHz) is not permitted in the same configuration.

What control pins are implemented on SI5350A-B01997-GM and how are they configured?

SI5350A-B01997-GM uses P0–P4 as programmable control inputs. In this factory-programmed variant, P0 and P1 are configured as frequency select pins (FS_0/FS_1) for CLK0–CLK2, P2 and P3 as output enable pins (OEB_0/OEB_1), and P4 as spread spectrum enable (SSEN), per the B01997 configuration file.

Is SI5350A-B01997-GM pin-compatible with other Si5350A variants in the 20-QFN package?

Yes, SI5350A-B01997-GM shares identical 20-QFN-20 mechanical and electrical pinout with all Si5350A variants in that package, including blank (Si5350A-B-GM) and other factory-programmed versions. Pin functions (XA, XB, CLK0–CLK7, VDD, VDDOA–VDDOD, P0–P4, GND) are fixed across the 20-QFN Si5350A family.

SI5350A-B01997-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: *

Package/Case:: -

Packaging:: Strip

Product Status:: Active

Programmable:: Not Verified

Type:: -

PLL:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Divider/Multiplier:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: -

Grade:: -

Qualification:: -

Supplier Device Package:: -

SI5350A-B01997-GM FAQ

1.How can I place an order for SI5350A-B01997-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5350A-B01997-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5350A-B01997-GM reliable?

The price and inventory of SI5350A-B01997-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5350A-B01997-GM is usually 5 days.

3.What payment methods are accepted for SI5350A-B01997-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5350A-B01997-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5350A-B01997-GM?

SI5350A-B01997-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5350A-B01997-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5350A-B01997-GM?

For technical support, including SI5350A-B01997-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5350A-B01997-GM requirements.

6.How does Aetrix verify that SI5350A-B01997-GM is sourced from the original manufacturer or authorized distributors?

All SI5350A-B01997-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5350A-B01997-GM meets industry standards.

7.What is the process for return or replacement of SI5350A-B01997-GM?

All SI5350A-B01997-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5350A-B01997-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5350A-B01997-GM part is unused and in its original packaging.

Return procedure for SI5350A-B01997-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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