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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Clock Generators, PLLs, Frequency Synthesizers

Skyworks Solutions Inc. SI5350A-B01998-GM

Name: SI5350A-B01998-GM
Brand: Skyworks Solutions Inc.
SKU: SI5350A-B01998-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5350A-B01998-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Clock Generators, PLLs, Frequency Synthesizers

Package:: -

Datasheet:: SI5350A-B01998-GM.pdf

Description:: IC CLOCK GENERATOR

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Product details

Overview

SI5350A-B01998-GM from Skyworks Solutions is a factory-programmed, pin-controlled CMOS clock generator delivering up to 8 independent output frequencies (2.5 kHz–200 MHz) with 0 ppm synthesis error, low period jitter (<70 ps pk-pk), and configurable spread spectrum on any output. It replaces multiple crystals/XOs in audio/video systems, residential gateways, and networking equipment using a single 25 or 27 MHz crystal reference.

For engineers reviewing the SI5350A-B01998-GM datasheet, SI5350A-B01998-GM pinout, SI5350A-B01998-GM application, or SI5350A-B01998-GM equivalent, key selection criteria include its 20-QFN-20 package, 8-output capability, PLL + MultiSynth architecture, per-output frequency select (FS_0/FS_1), and HCSL-compatible swing support at 2.5 V VDDO.

Technical Context

The SI5350A-B01998-GM implements a dual-PLL architecture with eight independent high-resolution fractional MultiSynth dividers-one per output-enabling simultaneous generation of non-integer-related frequencies. Each output supports glitchless frequency switching via FS_0/FS_1 control pins and static phase offset configuration.

It operates from a fixed 25 or 27 MHz crystal (XA/XB), uses separate core (VDD) and output (VDDOx) supply rails (1.8/2.5/3.3 V), and achieves <70 ps period jitter (pk-pk) with 50 Ω output impedance. Spread spectrum modulation (±0.1% to ±1.5%, 30–33 kHz) is selectable per output but only available for clocks derived from PLLA.

Key Specifications

Parameter	Value and Actual Design Meaning
Output count	8 independent CMOS clock outputs (CLK0–CLK7)
Frequency range	2.5 kHz to 200 MHz per output; only two unique frequencies >112.5 MHz simultaneously allowed
Period jitter	<70 ps pk-pk (typical, all outputs active, 20-QFN)
Core supply	1.8 V / 2.5 V / 3.3 V (1.71–3.6 V supported); independent from VDDO
Output supply	VDDOA–VDDOD individually configurable at 1.8 V / 2.5 V / 3.3 V
Crystal reference	25 MHz or 27 MHz fundamental-mode AT-cut crystal (no external load caps required for 6–10 pF CL)
Spread spectrum	Selectable per output: down-spread (–0.1% to –2.5%) or center-spread (±0.1% to ±1.5%), 30–33 kHz modulation rate

Pinout & Package

SI5350A-B01998-GM is packaged in a 20-pin QFN (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks Rev. 1.2 datasheet Section 7.1.

Pin/Terminal	Circuit Role	Design Meaning
XA, XB	Crystal oscillator input pair	Accepts 25 or 27 MHz fundamental crystal; internal load capacitance (0/6/8/10 pF) programmable via ClockBuilder Pro
CLK0–CLK7	Dedicated CMOS clock outputs	Each independently configurable for frequency, drive strength, invert/non-invert, and spread spectrum (PLLA only)
VDD, GND	Core power and ground	Supplies PLLs, logic, and MultiSynths; sequencing requires VDD powered before or with VDDOx
VDDOA–VDDOD	Output buffer supplies	Four independent rails (VDDOA for CLK0/1, VDDOB for CLK2/3, etc.); enables level translation and HCSL compatibility at 2.5 V
P0–P4	Configurable control inputs	P0 = FS_0, P1 = FS_1, P2 = OEB_0, P3 = OEB_1, P4 = SSEN (PDN tied internally per factory config)

Key Features

Feature	Design Value
Factory-programmed configuration	Delivers exact pre-validated frequency plan (e.g., 33.333, 74.25, 27, 24.576, 22.5792, 28.322, 125, 48 MHz) without I²C interface or runtime programming
Glitchless frequency switching	FS_0/FS_1 pins enable zero-cycle transition between two preconfigured frequencies per output (e.g., CLK0 F1_0/F2_0)
HCSL-compatible outputs	When VDDOA = 2.5 V, CLK0/CLK1 can be configured as complementary HCSL pair (50 Ω ZO, 1 Vpp swing) using INV function and external resistors
Per-output spread spectrum	Reduces EMI peak amplitude on selected outputs without affecting timing-critical clocks derived from PLLB
Low-power operation	25 mA typical core current with all 8 outputs enabled; 50 µA power-down current when PDN asserted (internal tie)

Applications

Audio/Video Timing	Networking PHY Interface
Use Scenario: HDMI transmitter, audio codec, and video processor require synchronized clocks at 74.25 MHz, 24.576 MHz, and 48 MHz within a set-top box. IC Role / Device Role / Timing Role: Single-source clock generator replacing three discrete XOs while maintaining sub-100 ps jitter and exact frequency ratios. Use Value: Reduces BOM count, PCB area, and EMI by consolidating clocks with programmable spread spectrum on noise-sensitive outputs.	Use Scenario: Ethernet PHY and USB controller in a residential gateway need 125 MHz and 48 MHz clocks with tight duty cycle (45–55%) and low jitter. IC Role / Device Role / Timing Role: Provides deterministic, jitter-clean clocks meeting IEEE 802.3 and USB 2.0 timing budgets without external filtering. Use Value: Eliminates crystal matching tolerances and board-level skew; enables single-crystal reference for multi-protocol timing.
Server Baseboard Management	Print/Scan Engine Control
Use Scenario: BMC, CPU, and PCIe switch on a server motherboard require 33.333 MHz, 27 MHz, and 100 MHz clocks with static phase alignment. IC Role / Device Role / Timing Role: Delivers phase-coherent outputs across voltage domains (1.8 V, 2.5 V, 3.3 V) using independent VDDO rails. Use Value: Ensures deterministic setup/hold margins for high-speed interfaces; avoids timing closure issues from discrete XO skew.	Use Scenario: Laser printer engine controller needs precise 28.322 MHz and 22.5792 MHz clocks for image rasterization and motor control. IC Role / Device Role / Timing Role: Generates exact non-integer frequencies from one crystal-eliminating need for custom oscillators or PLL ICs. Use Value: Lowers cost vs. multiple XOs; enables field-upgradable timing via factory reprogramming (new part number).

Audio/Video Timing

Networking PHY Interface

Use Scenario: HDMI transmitter, audio codec, and video processor require synchronized clocks at 74.25 MHz, 24.576 MHz, and 48 MHz within a set-top box.

IC Role / Device Role / Timing Role: Single-source clock generator replacing three discrete XOs while maintaining sub-100 ps jitter and exact frequency ratios.

Use Value: Reduces BOM count, PCB area, and EMI by consolidating clocks with programmable spread spectrum on noise-sensitive outputs.

Use Scenario: Ethernet PHY and USB controller in a residential gateway need 125 MHz and 48 MHz clocks with tight duty cycle (45–55%) and low jitter.

IC Role / Device Role / Timing Role: Provides deterministic, jitter-clean clocks meeting IEEE 802.3 and USB 2.0 timing budgets without external filtering.

Use Value: Eliminates crystal matching tolerances and board-level skew; enables single-crystal reference for multi-protocol timing.

Server Baseboard Management

Print/Scan Engine Control

Use Scenario: BMC, CPU, and PCIe switch on a server motherboard require 33.333 MHz, 27 MHz, and 100 MHz clocks with static phase alignment.

IC Role / Device Role / Timing Role: Delivers phase-coherent outputs across voltage domains (1.8 V, 2.5 V, 3.3 V) using independent VDDO rails.

Use Value: Ensures deterministic setup/hold margins for high-speed interfaces; avoids timing closure issues from discrete XO skew.

Use Scenario: Laser printer engine controller needs precise 28.322 MHz and 22.5792 MHz clocks for image rasterization and motor control.

IC Role / Device Role / Timing Role: Generates exact non-integer frequencies from one crystal-eliminating need for custom oscillators or PLL ICs.

Use Value: Lowers cost vs. multiple XOs; enables field-upgradable timing via factory reprogramming (new part number).

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5351A-B-GM	I²C-programmable (not factory-configured); 8 outputs; same 2.5 kHz–200 MHz range but higher typical jitter (95 ps pk-pk)	Requires microcontroller host and firmware integration; unsuitable for pin-strapped, no-processor designs	Choose Si5351A-B-GM only if runtime reconfiguration or dynamic frequency changes are required.
CDCE906PWR	3-output, 0.5–235 MHz; integrated 3.3 V LDO; no spread spectrum; 100 ps pk-pk jitter; TSSOP-24 package	Limited to 3 clocks; lacks per-output control (FS/SSEN/OEB); no HCSL support; higher jitter limits high-speed SerDes use	CDCE906PWR fits simple 3-clock systems where cost and footprint outweigh flexibility and jitter performance.

Compared with Si5351A-B-GM and CDCE906PWR, SI5350A-B01998-GM provides factory-validated 8-output timing with lowest jitter, pin-based control, and HCSL compatibility-making it optimal for cost-sensitive, processor-less, multi-protocol embedded systems requiring guaranteed timing performance out-of-box.

Availability

SI5350A-B01998-GM is available at Aetrix Electronics and suitable for audio/video equipment, residential gateways, and networking infrastructure requiring stable component supply, long-term lifecycle support, and factory-programmed timing accuracy.

Supply support for SI5350A-B01998-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5350A-B product line delivers factory-programmed, pin-configurable clock generators targeting cost-sensitive, high-volume applications where simplicity, reliability, and guaranteed timing performance eliminate design risk and qualification overhead.

FAQ

What is the crystal requirement for SI5350A-B01998-GM?

The SI5350A-B01998-GM requires a fundamental-mode AT-cut crystal operating at either 25 MHz or 27 MHz. Internal load capacitance options (0, 6, 8, or 10 pF) eliminate external capacitors for most crystals; for 12 pF crystals, ≤2 pF external capacitance (e.g., 4 pF on XA/XB) is supported. The SI5350A-B01998-GM does not accept external clock signals on XA/XB unless specifically configured during factory programming.

Does SI5350A-B01998-GM support HCSL output levels?

Yes, SI5350A-B01998-GM supports HCSL-compatible swing when VDDOA is set to 2.5 V and CLK0/CLK1 are configured as complementary (one inverted) with external 511 Ω and 240 Ω resistors per Skyworks Figure 3. This functionality is validated only for the 20-QFN and 10-MSOP packages-not the 16-QFN variant-and requires proper termination to achieve 1 Vpp differential swing.

How many frequencies can SI5350A-B01998-GM generate above 112.5 MHz simultaneously?

The SI5350A-B01998-GM supports only two unique frequencies above 112.5 MHz at the same time-for example, 125 MHz on CLK0 and 130 MHz on CLK1. Additional outputs may duplicate those frequencies (e.g., 125 MHz on CLK0–CLK3), but introducing a third distinct frequency >112.5 MHz violates specification and risks timing failure. This limit arises from PLL bandwidth and MultiSynth divider resolution constraints.

Is SI5350A-B01998-GM pin-compatible with other Si5350 variants?

No-SI5350A-B01998-GM is a specific factory-programmed 20-QFN-20 variant with fixed configuration. While it shares the same 20-pin QFN footprint with other Si5350A-Bxxxxx-GM parts, pin functions (e.g., P0–P4 assignments) and internal settings (spread spectrum enable, FS mapping, output frequencies) are unique to this part number and cannot be altered post-manufacture. Substituting another Si5350A-B part requires validation of its programmed behavior.

What is the power-up time for SI5350A-B01998-GM?

The SI5350A-B01998-GM achieves valid output clocks within 2 ms (typical) and 10 ms (max) after VDD reaches minimum operating voltage (1.71 V for 1.8 V mode), assuming CL = 5 pF and fCLKn > 1 MHz. In PLL bypass mode-where the crystal directly drives outputs-the power-up time reduces to 0.5–1 ms. These values are measured under recommended operating conditions and do not include crystal start-up delay.

SI5350A-B01998-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: *

Package/Case:: -

Packaging:: Strip

Product Status:: Active

Programmable:: Not Verified

Type:: -

PLL:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Divider/Multiplier:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: -

Grade:: -

Qualification:: -

Supplier Device Package:: -

SI5350A-B01998-GM FAQ

1.How can I place an order for SI5350A-B01998-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5350A-B01998-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5350A-B01998-GM reliable?

The price and inventory of SI5350A-B01998-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5350A-B01998-GM is usually 5 days.

3.What payment methods are accepted for SI5350A-B01998-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5350A-B01998-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5350A-B01998-GM?

SI5350A-B01998-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5350A-B01998-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5350A-B01998-GM?

For technical support, including SI5350A-B01998-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5350A-B01998-GM requirements.

6.How does Aetrix verify that SI5350A-B01998-GM is sourced from the original manufacturer or authorized distributors?

All SI5350A-B01998-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5350A-B01998-GM meets industry standards.

7.What is the process for return or replacement of SI5350A-B01998-GM?

All SI5350A-B01998-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5350A-B01998-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5350A-B01998-GM part is unused and in its original packaging.

Return procedure for SI5350A-B01998-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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