Skyworks Solutions Inc. SI5350A-B04041-GMR
- Part No.:
- SI5350A-B04041-GMR
- Manufacturer:
- Skyworks Solutions Inc.
- Package:
- 20-VFQFN Exposed Pad
- Datasheet:
-
SI5350A-B04041-GMR.pdf
- Description:
- IC ANY FREQ ANY OUT XTAL 20QFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI5350A-B04041-GMR from Skyworks Solutions is a factory-programmed, pin-controlled CMOS clock generator with 4 outputs in a 16-QFN (3×3 mm) package. It synthesizes any frequency from 2.5 kHz to 200 MHz per output with 0 ppm error using a 25 or 27 MHz crystal reference, supports per-output spread spectrum, and delivers <70 ps pk-pk period jitter. It replaces multiple crystals and oscillators in audio/video and networking equipment.
For engineers reviewing the SI5350A-B04041-GMR datasheet, SI5350A-B04041-GMR pinout, SI5350A-B04041-GMR application, or SI5350A-B04041-GMR equivalent, key selection considerations include its 4-output 16-QFN configuration, factory-programmed frequency plan, per-output spread spectrum enable, glitchless frequency switching via FS pins, and HCSL-compatible swing support at 2.5 V VDDO.
Technical Context
The SI5350A-B04041-GMR implements a dual-PLL + eight fractional MultiSynth architecture, enabling independent synthesis of up to four non-integer-related frequencies simultaneously. Each output uses a dedicated high-resolution fractional divider for exact frequency generation without rounding error.
It operates from a single fixed-frequency crystal (25 or 27 MHz), supports static phase offset control, and allows per-output rise/fall time tuning and invert/non-invert selection. Spread spectrum is available only on PLLA-synchronized outputs and configurable via SSEN pin or register setting.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output count | 4 independent CMOS clock outputs (CLK0–CLK3), configured at factory |
| Frequency range | 2.5 kHz to 200 MHz per output; only two unique frequencies >112.5 MHz allowed simultaneously |
| Period jitter | <70 ps pk-pk typical (measured across all 4 outputs running) |
| Core supply | 1.71–1.89 V, 2.25–2.75 V, or 3.0–3.6 V - supports mixed-voltage system integration |
| Output supply | VDDOA/VDDOB independently configurable at 1.71–1.89 V, 2.25–2.75 V, or 3.0–3.6 V for level translation |
| Crystal reference | 25 MHz or 27 MHz fundamental-mode AT-cut crystal; internal load capacitance selectable (0/6/8/10 pF) |
| Spread spectrum | Selectable per output: down-spread (–0.1% to –2.5%) or center-spread (±0.1% to ±1.5%) at 30–33 kHz modulation rate |
Pinout & Package
SI5350A-B04041-GMR is housed in a 16-pin QFN package (3 mm × 3 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks Rev. 1.2 datasheet Section 7.2 and Figure 4 (16-QFN block diagram).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P0 | Frequency Select 0 (FS_0) | Controls F1/F2 frequency selection on CLK0 and CLK1; logic-high selects F2_x |
| P1 | Frequency Select 1 (FS_1) | Controls F1/F2 frequency selection on CLK0 and CLK1; logic-high selects F2_x |
| P2 | Output Enable B (OEB_1) | Active-low enables/disables CLK2 and CLK3; high-impedance when asserted |
| P3 | Power Down (PDN) | Active-high places device in ultra-low-power shutdown mode (50 µA max) |
| CLK0–CLK3 | CMOS clock outputs | Configurable drive strength, invert/non-invert, and output state (high/low/Hi-Z) when disabled |
| VDDOA / VDDOB | Output buffer supplies | VDDOA powers CLK0/CLK1; VDDOB powers CLK2/CLK3 - enables mixed-voltage signaling |
| XA / XB | Crysal input terminals | Differential crystal connection; supports 25 or 27 MHz AT-cut crystals with internal load caps |
| GND | Ground reference | Common return for core, outputs, and crystal; thermal pad must be soldered to PCB ground plane |
Key Features
| Feature | Design Value |
|---|---|
| Factory-programmed frequency plan | Eliminates need for I²C configuration or external EEPROM; reduces BOM and boot-time latency |
| Per-output spread spectrum enable | Reduces EMI peak amplitude on selected clocks without affecting timing-critical outputs |
| Glitchless frequency switching | FS_0/FS_1 pins change output frequency without cycle loss or metastability - critical for dynamic rate adaptation |
| HCSL-compatible swing support | When VDDOA = VDDOB = 2.5 V and INV enabled on one leg, CLK0/CLK1 or CLK2/CLK3 form HCSL differential pairs |
| Independent output voltage supplies | VDDOA and VDDOB allow simultaneous 1.8 V, 2.5 V, and 3.3 V CMOS outputs on same device |
Applications
| Audio/Video Timing | Networking PHY Clocking |
|---|---|
Use Scenario: HDMI transmitter, audio codec, and video processor require synchronized but non-integer-related clocks (e.g., 74.25 MHz, 24.576 MHz, 48 MHz). IC Role / Device Role / Timing Role: Single-device clock source replacing three discrete XOs; provides exact frequencies with 0 ppm error and static phase alignment. Use Value: Reduces board space by 60%, eliminates crystal matching tolerances, and simplifies layout with single reference crystal. | Use Scenario: Ethernet PHY and USB controller in residential gateway need low-jitter clocks (25 MHz, 28.322 MHz, 125 MHz) with EMI reduction. IC Role / Device Role / Timing Role: Factory-configured 4-output generator delivering PCIe Gen1-compliant clocks with per-output spread spectrum. Use Value: Meets FCC Class B emissions limits without added shielding or ferrites; supports multi-protocol timing from one IC. |
| Printers & Scanners | Handheld Instrumentation |
Use Scenario: Laser printer SoC requires precise motor control (33.333 MHz), image sensor (27 MHz), and interface (48 MHz) clocks. IC Role / Device Role / Timing Role: Replaces crystal oscillator + buffer + divider chain; supports power-down of unused outputs during sleep mode. Use Value: Cuts active current to 21 mA (4 outputs), extends battery life, and enables fast wake-up (<10 ms powerup time). | Use Scenario: Portable oscilloscope FPGA needs stable 125 MHz sampling clock plus auxiliary 22.5792 MHz and 28.322 MHz clocks. IC Role / Device Role / Timing Role: Low-phase-noise clock generator with <70 ps jitter; supports HCSL-compatible outputs for FPGA differential inputs. Use Value: Enables 8-bit+ ENOB at full sample rate; eliminates external level-shifting components via dual VDDO rails. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar clock generator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si5350A-B-GM1 | Same 4-output 16-QFN package and architecture, but blank/unprogrammed - requires ClockBuilder Pro configuration and I²C programming | Used where field-updatable frequency plans or multi-design reuse is required; not suitable for drop-in replacement | Select SI5350A-B-GM1 only if programmability and post-manufacture reconfiguration are needed |
| Si5351A-B-GM1 | I²C-programmable 4-output variant with identical pinout but different PLL architecture (single PLL + MultiSynth); higher typical jitter (95 ps pk-pk) | Supports dynamic frequency changes via I²C; lacks per-output spread spectrum and FS pin control | Choose Si5351A-B-GM1 for systems requiring runtime clock reconfiguration, not factory-set stability |
Compared with SI5350A-B-GM1 and Si5351A-B-GM1, SI5350A-B04041-GMR offers guaranteed factory-programmed timing performance, eliminates I²C bus overhead and configuration firmware, and provides deterministic glitchless switching via hardware FS pins - making it optimal for cost-sensitive, high-volume embedded designs.
Availability
SI5350A-B04041-GMR is available at Aetrix Electronics and suitable for audio/video equipment, networking PHY interfaces, and printer/scanner timing applications requiring stable component supply, long-term lifecycle assurance, and factory-verified frequency accuracy.
Supply support for SI5350A-B04041-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.
The Si5350A family is designed as a factory-programmable, pin-controlled clock generator targeting cost-sensitive applications that require replacement of multiple crystals and oscillators with a single, jitter-optimized, low-power solution.
FAQ
What is the reference crystal requirement for SI5350A-B04041-GMR?
The SI5350A-B04041-GMR requires a 25 MHz or 27 MHz fundamental-mode AT-cut crystal with load capacitance of 6–12 pF and ESR ≤150 Ω. Internal load capacitors (0/6/8/10 pF) are configurable via ClockBuilder Pro; external caps ≤2 pF may be added if needed. The crystal connects directly to XA/XB pins - no external oscillator input is supported for this variant.
Does SI5350A-B04041-GMR support HCSL-compatible outputs?
Yes, SI5350A-B04041-GMR supports HCSL-compatible swing on CLK0/CLK1 or CLK2/CLK3 when VDDOA or VDDOB is set to 2.5 V and one output in the pair is inverted. This requires external 511 Ω pull-up and 240 Ω termination resistors per differential leg, as specified in Skyworks AN551. HCSL compatibility is confirmed only for 10-MSOP and 20-QFN packages - the 16-QFN package (SI5350A-B04041-GMR) supports it per Figure 3 and Section 4.3 of Rev. 1.2 datasheet.
How many unique high-frequency outputs can SI5350A-B04041-GMR generate above 112.5 MHz?
SI5350A-B04041-GMR can generate up to two unique frequencies above 112.5 MHz simultaneously (e.g., 125 MHz on CLK0 and 130 MHz on CLK1). Additional outputs above 112.5 MHz must duplicate one of those two frequencies - for example, CLK2 and CLK3 may both output 125 MHz, but a third distinct frequency like 150 MHz is prohibited. This limitation is inherent to the MultiSynth architecture and applies regardless of total output count.
Can SI5350A-B04041-GMR be reprogrammed after manufacturing?
No, SI5350A-B04041-GMR is factory-programmed with a fixed frequency plan and cannot be reconfigured in-system. It lacks I²C interface pins and is intended for applications where timing requirements are stable across product lifetime. For field-programmable alternatives, consider SI5350A-B-GM1 (same package, blank version) or SI5351A-B-GM1, both requiring external I²C control and configuration firmware.
What is the power-up time and power-down current of SI5350A-B04041-GMR?
SI5350A-B04041-GMR achieves valid output clocks within 2–10 ms after VDD reaches minimum (TRDY), or within 0.5–1 ms in PLL bypass mode (TBYP). In power-down mode (PDN = high), supply current drops to ≤50 µA. Core supply current is 21 mA typical with all 4 outputs enabled at 1.8 V - scaling with VDD and output count per Table 4 of the datasheet.
SI5350A-B04041-GMR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- 20-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- -
- PLL:
- -
- Input:
- -
- Output:
- -
- Number of Circuits:
- -
- Ratio - Input:Output:
- -
- Differential - Input:Output:
- -
- Frequency - Max:
- -
- Divider/Multiplier:
- -
- Voltage - Supply:
- -
- Operating Temperature:
- -
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 20-QFN (4x4)
SI5350A-B04041-GMR FAQ
1.How can I place an order for SI5350A-B04041-GMR through Aetrix?
Please submit a Request for Quotation (RFQ) for SI5350A-B04041-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI5350A-B04041-GMR reliable?
The price and inventory of SI5350A-B04041-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5350A-B04041-GMR is usually 5 days.
3.What payment methods are accepted for SI5350A-B04041-GMR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5350A-B04041-GMR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI5350A-B04041-GMR?
SI5350A-B04041-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI5350A-B04041-GMR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI5350A-B04041-GMR?
For technical support, including SI5350A-B04041-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5350A-B04041-GMR requirements.
6.How does Aetrix verify that SI5350A-B04041-GMR is sourced from the original manufacturer or authorized distributors?
All SI5350A-B04041-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5350A-B04041-GMR meets industry standards.
7.What is the process for return or replacement of SI5350A-B04041-GMR?
All SI5350A-B04041-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5350A-B04041-GMR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI5350A-B04041-GMR part is unused and in its original packaging.
Return procedure for SI5350A-B04041-GMR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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