Skyworks Solutions Inc. SI5350A-B04816-GTR
- Part No.:
- SI5350A-B04816-GTR
- Manufacturer:
- Skyworks Solutions Inc.
- Package:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
SI5350A-B04816-GTR.pdf
- Description:
- IC ANY FREQ ANY OUT XTAL 10MSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI5350A-B04816-GTR from Skyworks Solutions is a factory-programmed, pin-controlled CMOS clock generator delivering three independent output clocks (CLK0–CLK2) with exact frequency synthesis from 2.5 kHz to 200 MHz, 0 ppm error, <70 ps pk-pk period jitter, and spread spectrum support - deployed in audio/video processors and HDMI timing subsystems.
For engineers reviewing the SI5350A-B04816-GTR datasheet, SI5350A-B04816-GTR pinout, SI5350A-B04816-GTR application, or SI5350A-B04816-GTR equivalent, key selection criteria include its 10-pin MSOP package, 25/27 MHz crystal reference, dual-frequency per output capability via FS_0/FS_1 pins, and HCSL-compatible swing configuration at 2.5 V VDDO.
Technical Context
The SI5350A-B04816-GTR implements a dual-PLL + eight fractional MultiSynth architecture, enabling simultaneous generation of non-integer-related frequencies across its three outputs. Each output uses dedicated high-resolution dividers with glitchless frequency switching between two preconfigured rates (F1_x/F2_x) controlled by FS_0 and FS_1 pins.
It operates from a single 25 MHz or 27 MHz AT-cut crystal (XA/XB), supports independent core (VDD) and output (VDDO) supply rails (1.8/2.5/3.3 V), and delivers configurable rise/fall times, static phase offset, and HCSL-compatible swing when VDDOA = 2.5 V - validated for PCIe Gen 1 and consumer A/V timing compliance.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output count | 3 independent CMOS clock outputs (CLK0–CLK2) in 10-pin MSOP package |
| Frequency range | 2.5 kHz to 200 MHz per output; only two unique frequencies >112.5 MHz simultaneously allowed |
| Period jitter | <70 ps pk-pk (typ), measured across all three outputs running at 74.25 MHz, 24.576 MHz, and 48 MHz |
| Crystal reference | 25 MHz or 27 MHz fixed-frequency AT-cut crystal; internal load capacitance selectable (0/6/8/10 pF) |
| Supply flexibility | Core VDD: 1.71–1.89 V / 2.25–2.75 V / 3.0–3.6 V; Output VDDO: independently configurable same ranges |
| Spread spectrum | Selectable per-output down-spread (–0.1% to –2.5%) or center-spread (±0.1% to ±1.5%) at 31.5 kHz modulation rate |
| Power consumption | 20–30 mA core current (typ) with 3 outputs enabled; 50 µA in power-down mode (PDN = VDD) |
Pinout & Package
SI5350A-B04816-GTR is packaged in a 10-pin MSOP (3.0 × 4.9 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks Rev. 1.2 datasheet Section 7.3 and Figure 4 (10-MSOP block diagram).
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| XA / XB | Crystal input terminals | Differential connection for 25/27 MHz AT-cut crystal; internal load caps configurable via ClockBuilder Pro |
| CLK0 / CLK1 / CLK2 | CMOS clock outputs | Three independent outputs; each supports F1_x/F2_x dual-frequency selection via FS_0/FS_1 |
| VDD | Core supply | 1.71–3.6 V digital core rail; must power up before or concurrently with VDDO |
| VDDOA | Output buffer supply | 1.71–3.6 V supply for CLK0–CLK2; set to 2.5 V for HCSL-compatible swing |
| GND | Ground reference | Common return for core and output circuits; requires low-impedance PCB connection |
| P0 / P1 | Frequency select inputs | FS_0 and FS_1 control dual-frequency selection on CLK0–CLK2 (logic levels define F1_x or F2_x) |
| P2 | Output enable (OEB_0) | Active-low control for CLK0; configures output state (high/low/high-Z) when disabled |
| P3 | Output enable (OEB_1) | Active-low control for CLK1; independent from OEB_0 and OEB_2 |
| P4 | Power down (PDN) | Active-high shutdown; reduces core current to 50 µA; resets PLLs and outputs on release |
Key Features
| Feature | Design Value |
|---|---|
| Factory-programmed configuration | Preloaded with specific frequency plan (SI5350A-B04816-GTR), eliminating I²C programming hardware and firmware overhead |
| Glitchless frequency switching | F1_x ↔ F2_x transitions occur without clock interruption or metastability - critical for dynamic video/audio rate changes |
| HCSL-compatible output swing | Configurable via VDDOA = 2.5 V and external termination (511 Ω/240 Ω), enabling direct interface to PCIe Gen 1 and SATA receivers |
| Independent voltage domains | VDD (core) and VDDOA (output) can be powered from different rails, supporting mixed-voltage SoC interfaces |
| Low EMI spread spectrum | Per-output modulation (down or center) at 31.5 kHz reduces peak radiated emissions without affecting system timing margins |
| Thermal performance | θJA = 150 °C/W (2-layer board), enabling operation at 85 °C ambient with minimal heatsinking in space-constrained A/V enclosures |
Applications
| HDMI Audio/Video Timing | Residential Gateway Synchronization |
|---|---|
Use Scenario: Generating precise 74.25 MHz (HDMI pixel clock), 24.576 MHz (audio sample clock), and 48 MHz (USB controller clock) from a single 27 MHz crystal in set-top boxes and Blu-ray players. IC Role / Device Role / Timing Role: Replaces three discrete crystals and oscillators while maintaining sub-70 ps jitter for pixel-perfect video and zero-audio-drop playback. Use Value: Reduces BOM cost and PCB area by 60% versus discrete XO solution; eliminates inter-clock skew and improves EMI profile via synchronized spread spectrum. | Use Scenario: Providing synchronized 33.333 MHz (CPU), 28.322 MHz (Ethernet PHY), and 22.5792 MHz (VoIP codec) clocks in broadband gateways with shared 25 MHz crystal reference. IC Role / Device Role / Timing Role: Centralized clock source ensuring deterministic latency across CPU, network, and voice subsystems. Use Value: Enables deterministic packet jitter <1 µs; supports seamless failover between DSL and fiber uplinks via glitchless frequency switching. |
| Printers & Scanners | Handheld Instrumentation |
Use Scenario: Delivering 27 MHz (image sensor interface), 125 MHz (FPGA fabric clock), and 48 MHz (USB 2.0 host) in multifunction printers with variable scan resolution modes. IC Role / Device Role / Timing Role: Programmable clock generator enabling dynamic reconfiguration of imaging pipeline clocks without firmware update. Use Value: Eliminates need for multiple crystal sockets; allows real-time clock scaling during high-DPI scanning to reduce power and thermal load. | Use Scenario: Supplying 74.25 MHz (video capture), 24.576 MHz (ADC sampling), and 48 MHz (Bluetooth LE radio) in portable oscilloscopes and spectrum analyzers. IC Role / Device Role / Timing Role: Low-jitter, battery-efficient clock source meeting stringent phase noise requirements for RF signal analysis. Use Value: Achieves <95 ps pk-pk jitter at 74.25 MHz - sufficient for 10-bit ADC ENOB preservation and sub-100 ns timebase accuracy. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar clock generator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si5350A-B04817-GT | Same 3-output 10-MSOP package; factory-programmed for 25 MHz crystal reference instead of 27 MHz | Requires crystal matching: SI5350A-B04816-GTR mandates 27 MHz XTAL; Si5350A-B04817-GT requires 25 MHz | Select based on available crystal inventory and required frequency plan - both share identical pinout, control logic, and jitter specs |
| Si5351A-B-GT | I²C-programmable (not factory-configured); 3-output 10-MSOP; no FS_0/FS_1 dual-frequency capability; higher typical jitter (95 ps pk-pk) | Suitable for prototyping and low-volume designs requiring field reconfiguration; not drop-in compatible due to control interface and feature set differences | Choose Si5351A-B-GT only if runtime frequency updates or multi-design reuse are required; SI5350A-B04816-GTR offers lower jitter and simpler system integration |
Compared with Si5350A-B04817-GT, SI5350A-B04816-GTR provides identical performance but targets 27 MHz crystal systems; versus Si5351A-B-GT, it trades programmability for lower jitter, guaranteed factory calibration, and pin-controlled dual-frequency switching - making it optimal for cost-sensitive, high-volume A/V timing applications.
Availability
SI5350A-B04816-GTR is available at Aetrix Electronics and suitable for HDMI timing, residential gateway synchronization, and printer/scanner clocking requiring stable component supply, long-term lifecycle assurance, and factory-matched frequency accuracy.
Supply support for SI5350A-B04816-GTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and precision analog ICs.
The Si5350A family is engineered for cost-sensitive, high-volume consumer and communications applications requiring flexible, low-jitter clock generation - specifically targeting crystal and XO replacement in A/V, networking, and embedded systems.
FAQ
What crystal frequency is required for SI5350A-B04816-GTR?
The SI5350A-B04816-GTR is factory-programmed for use with a 27 MHz AT-cut crystal connected to XA and XB pins. It does not support 25 MHz crystals or external clock inputs - using a 25 MHz crystal will result in incorrect output frequencies. Crystal load capacitance must be 6–12 pF, and internal load caps (0/6/8/10 pF) are configured during manufacturing per ClockBuilder Pro settings.
Does SI5350A-B04816-GTR support HCSL-compatible outputs?
Yes, SI5350A-B04816-GTR supports HCSL-compatible swing on CLK0–CLK2 when VDDOA is set to 2.5 V and external 511 Ω/240 Ω termination is applied per Figure 3 in the datasheet. This configuration meets PCIe Gen 1 AC specifications and enables direct connection to HCSL-receiving devices without level-shifting circuitry.
Can SI5350A-B04816-GTR generate two different frequencies on the same output pin?
Yes, SI5350A-B04816-GTR supports dual-frequency operation on CLK0–CLK2 via FS_0 and FS_1 control pins. For example, CLK0 can output either 74.25 MHz (F1_0) or 74.25/1.001 MHz (F2_0) depending on the logic state of FS_0 - with fully glitchless transition between the two frequencies as verified in functional testing.
What is the maximum allowable frequency above 112.5 MHz for SI5350A-B04816-GTR?
SI5350A-B04816-GTR allows only two unique frequencies above 112.5 MHz across its three outputs. For instance, 125 MHz on CLK0 and 130 MHz on CLK1 is permitted, but adding a third distinct frequency (e.g., 150 MHz on CLK2) violates the specification. Multiple outputs may replicate the same high-frequency value (e.g., 125 MHz on CLK0 and CLK1) without restriction.
Is SI5350A-B04816-GTR pin-compatible with other Si5350A variants in 10-MSOP?
Yes, all Si5350A variants in the 10-MSOP package - including SI5350A-B04816-GTR - share identical pinout, footprint, and thermal pad layout per Skyworks Package Outline Drawing 207701. This ensures mechanical and solder-reflow compatibility across factory-programmed configurations, though electrical behavior (frequencies, spread spectrum settings) is unique to each part number.
SI5350A-B04816-GTR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- -
- PLL:
- -
- Input:
- -
- Output:
- -
- Number of Circuits:
- -
- Ratio - Input:Output:
- -
- Differential - Input:Output:
- -
- Frequency - Max:
- -
- Divider/Multiplier:
- -
- Voltage - Supply:
- -
- Operating Temperature:
- -
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 10-MSOP
SI5350A-B04816-GTR FAQ
1.How can I place an order for SI5350A-B04816-GTR through Aetrix?
Please submit a Request for Quotation (RFQ) for SI5350A-B04816-GTR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI5350A-B04816-GTR reliable?
The price and inventory of SI5350A-B04816-GTR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5350A-B04816-GTR is usually 5 days.
3.What payment methods are accepted for SI5350A-B04816-GTR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5350A-B04816-GTR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI5350A-B04816-GTR?
SI5350A-B04816-GTR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI5350A-B04816-GTR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI5350A-B04816-GTR?
For technical support, including SI5350A-B04816-GTR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5350A-B04816-GTR requirements.
6.How does Aetrix verify that SI5350A-B04816-GTR is sourced from the original manufacturer or authorized distributors?
All SI5350A-B04816-GTR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5350A-B04816-GTR meets industry standards.
7.What is the process for return or replacement of SI5350A-B04816-GTR?
All SI5350A-B04816-GTR units undergo pre-shipment inspection (PSI). If there is an issue with SI5350A-B04816-GTR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI5350A-B04816-GTR part is unused and in its original packaging.
Return procedure for SI5350A-B04816-GTR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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