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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Clock Generators, PLLs, Frequency Synthesizers

Skyworks Solutions Inc. SI5350A-B04942-GMR

Name: SI5350A-B04942-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5350A-B04942-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5350A-B04942-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Clock Generators, PLLs, Frequency Synthesizers

Package:: 20-VFQFN Exposed Pad

Datasheet:: SI5350A-B04942-GMR.pdf

Description:: IC ANY FREQ ANY OUT XTAL 20QFN

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5350A-B04942-GMR from Skyworks Solutions is a factory-programmed, pin-controlled CMOS clock generator with 3 outputs in 10-MSOP package, generating frequencies from 2.5 kHz to 200 MHz with 0 ppm synthesis error, <70 ps pk-pk period jitter (typ), and spread spectrum support on any output - deployed in HDMI video processors, USB controllers, and Ethernet PHYs.

For engineers reviewing the SI5350A-B04942-GMR datasheet, SI5350A-B04942-GMR pinout, SI5350A-B04942-GMR application, or SI5350A-B04942-GMR equivalent, key selection criteria include its fixed 25/27 MHz crystal reference, independent VDD/VDDO voltage scaling (1.8/2.5/3.3 V), glitchless dual-frequency switching via FS pins, HCSL-compatible swing capability at 2.5 V VDDO, and PCIE Gen 1 compliance.

Technical Context

The SI5350A-B04942-GMR implements a dual-PLL + eight fractional MultiSynth architecture, where PLLA drives spread-spectrum-capable outputs and PLLB supports non-spread-spectrum clocks. Its 3-output 10-MSOP variant uses MultiSynth 0–2 with frequency-selectable F1_x/F2_x modes on CLK0–CLK2.

It operates from a single 25 MHz or 27 MHz fundamental-mode AT-cut crystal (no external load caps required for 6–10 pF CL), supports static phase offset, rise/fall time control, and features separate core (VDD) and output (VDDOA/VDDOB/VDDOC) supply rails for level translation and PSRR optimization.

Key Specifications

Parameter	Value and Actual Design Meaning
Output count	3 independent CMOS clock outputs (CLK0–CLK2)
Frequency range	2.5 kHz to 200 MHz per output; only two unique frequencies >112.5 MHz simultaneously allowed
Period jitter	<70 ps pk-pk (typ), measured across 10k cycles at default 50 Ω drive strength
Core supply	1.71–1.89 V / 2.25–2.75 V / 3.0–3.6 V - supports mixed-voltage system integration
Output supply	VDDOA/VDDOB/VDDOC independently configurable at 1.71–1.89 V / 2.25–2.75 V / 3.0–3.6 V
Crystal reference	25 MHz or 27 MHz fixed-frequency AT-cut crystal; internal 0/6/8/10 pF load capacitance selectable
Spread spectrum	Selectable per-output down-spread (–0.1% to –2.5%) or center-spread (±0.1% to ±1.5%) at 30–33 kHz modulation rate

Pinout & Package

SI5350A-B04942-GMR is housed in a 10-pin MSOP package (3.0 × 4.9 mm, 0.65 mm pitch) with exposed thermal pad. Pin functions are validated per Skyworks Rev. 1.2 datasheet Section 7.3 and Figure 4 (10-MSOP block diagram).

Pin/Terminal	Circuit Role	Design Meaning
VDD	Core power supply	Supplies 1.8/2.5/3.3 V core logic; must be powered before or concurrently with VDDOx
VDDOA	CLK0 output buffer supply	Configures CLK0 swing and drive strength; enables HCSL compatibility when set to 2.5 V
VDDOB	CLK1 output buffer supply	Independent voltage rail for CLK1; allows mixed-swing operation across outputs
VDDOC	CLK2 output buffer supply	Enables level translation for CLK2; decouples noise from other output domains
CLK0–CLK2	CMOS clock outputs	Programmable frequencies up to 200 MHz; support invert/non-invert, high-Z/low/high disable states
XA/XB	Crystal oscillator inputs	Differential crystal connection; accepts 25 or 27 MHz AT-cut crystals with internal load cap options
P0/P1	Frequency select inputs	Glitchless dual-frequency switching on CLK0/CLK1/CLK2 (F1_x/F2_x); logic-level controlled
P2	Output enable (OEB_0)	Active-low control for CLK0; configurable disable state (high, low, or high-Z)
P3	Output enable (OEB_1)	Active-low control for CLK1; independent from OEB_0 and OEB_2
P4	Power down (PDN)	Active-high global shutdown; reduces core current to ≤50 µA in power-down mode

Key Features

Feature	Design Value
Factory-programmed configuration	Delivers exact pre-defined frequencies without I²C interface or runtime programming overhead
Glitchless frequency switching	Zero-cycle disruption during F1_x ↔ F2_x transitions on CLK0–CLK2 using P0/P1 control
HCSL-compatible output swing	Enabled by setting VDDOA/VDDOB/VDDOC = 2.5 V and applying external 511 Ω/240 Ω termination per output pair
Independent output supply rails	VDDOA/VDDOB/VDDOC allow mixed-voltage clocking (e.g., 1.8 V CPU + 3.3 V peripheral clocks)
Low-power operation	20–30 mA typical core current with 3 outputs enabled; ≤50 µA in PDN mode
PCIE Gen 1 compliance	Meets jitter and timing requirements for PCIe root complex and endpoint clocking applications

Applications

HDMI Video Processing	USB 2.0 Host Controller
Use Scenario: Generating synchronized pixel clock (74.25 MHz), audio sample clock (24.576 MHz), and TMDS clock (27 MHz) for HDMI transmitter in AV receivers. IC Role / Device Role / Timing Role: Single-chip replacement for three discrete XOs; provides exact frequencies with zero ppm error and static phase alignment. Use Value: Eliminates board space, BOM cost, and layout complexity of multiple crystals while maintaining sub-70 ps jitter for clean video signal integrity.	Use Scenario: Supplying 48 MHz USB PHY clock and 28.322 MHz USB packet timer in embedded host controllers for printers and scanners. IC Role / Device Role / Timing Role: Factory-configured dual-frequency source enabling USB suspend/resume clock switching via FS pins. Use Value: Reduces EMI through spread spectrum on 48 MHz output and enables glitchless 48 MHz ↔ 28.322 MHz transition without software intervention.
Ethernet PHY Clocking	Residential Gateway SoC
Use Scenario: Delivering 25 MHz or 125 MHz reference clocks to Ethernet PHYs (e.g., Broadcom BCM54210) in switches and routers. IC Role / Device Role / Timing Role: Low-jitter, spread-spectrum-capable clock generator meeting IEEE 802.3 jitter masks for 100BASE-TX/1000BASE-T. Use Value: Achieves EMI reduction via programmable down-spread (–0.5% to –2.5%) while maintaining <95 ps pk-pk period jitter at 125 MHz.	Use Scenario: Providing 33.333 MHz CPU clock, 22.5792 MHz audio codec clock, and 74.25 MHz video decoder clock in integrated residential gateway SoCs. IC Role / Device Role / Timing Role: Multi-synchronous timing hub supporting heterogeneous subsystems with independent voltage domains (VDDOA=1.8 V, VDDOB=3.3 V). Use Value: Enables simultaneous operation of CPU, audio, and video blocks with precise inter-subsystem phase relationships and minimal power supply filtering.

HDMI Video Processing

USB 2.0 Host Controller

Use Scenario: Generating synchronized pixel clock (74.25 MHz), audio sample clock (24.576 MHz), and TMDS clock (27 MHz) for HDMI transmitter in AV receivers.

IC Role / Device Role / Timing Role: Single-chip replacement for three discrete XOs; provides exact frequencies with zero ppm error and static phase alignment.

Use Value: Eliminates board space, BOM cost, and layout complexity of multiple crystals while maintaining sub-70 ps jitter for clean video signal integrity.

Use Scenario: Supplying 48 MHz USB PHY clock and 28.322 MHz USB packet timer in embedded host controllers for printers and scanners.

IC Role / Device Role / Timing Role: Factory-configured dual-frequency source enabling USB suspend/resume clock switching via FS pins.

Use Value: Reduces EMI through spread spectrum on 48 MHz output and enables glitchless 48 MHz ↔ 28.322 MHz transition without software intervention.

Ethernet PHY Clocking

Residential Gateway SoC

Use Scenario: Delivering 25 MHz or 125 MHz reference clocks to Ethernet PHYs (e.g., Broadcom BCM54210) in switches and routers.

IC Role / Device Role / Timing Role: Low-jitter, spread-spectrum-capable clock generator meeting IEEE 802.3 jitter masks for 100BASE-TX/1000BASE-T.

Use Value: Achieves EMI reduction via programmable down-spread (–0.5% to –2.5%) while maintaining <95 ps pk-pk period jitter at 125 MHz.

Use Scenario: Providing 33.333 MHz CPU clock, 22.5792 MHz audio codec clock, and 74.25 MHz video decoder clock in integrated residential gateway SoCs.

IC Role / Device Role / Timing Role: Multi-synchronous timing hub supporting heterogeneous subsystems with independent voltage domains (VDDOA=1.8 V, VDDOB=3.3 V).

Use Value: Enables simultaneous operation of CPU, audio, and video blocks with precise inter-subsystem phase relationships and minimal power supply filtering.

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5350A-B-GT	Blank (unprogrammed) 10-MSOP variant requiring ClockBuilder Pro configuration and I²C programming post-solder	Used in prototyping or low-volume designs needing field reconfiguration; lacks factory-set frequency stability	Select SI5350A-B-GT only if runtime frequency updates or multi-design reuse are required
Si5351A-B-GM1	I²C-programmable 4-output QFN variant with XTAL-only reference; supports higher output count but no pin-control features (FS/PDN/SSEN)	Suitable for systems requiring >3 outputs or dynamic clock reprogramming; not drop-in compatible due to different pinout and control scheme	Choose Si5351A-B-GM1 when design flexibility outweighs production simplicity and pin-strapped operation

Compared with SI5350A-B-GT and Si5351A-B-GM1, the SI5350A-B04942-GMR delivers production-ready timing with zero firmware dependency, deterministic pin-controlled behavior, and optimized jitter performance for cost-sensitive consumer electronics - at the expense of field programmability and output count scalability.

Availability

SI5350A-B04942-GMR is available at Aetrix Electronics and suitable for HDMI transmitters, USB host controllers, Ethernet PHYs, residential gateways, and set-top boxes requiring stable component supply with guaranteed factory-programmed configurations.

Supply support for SI5350A-B04942-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The SI5350A-B04942-GMR belongs to Skyworks' Si535x family of factory-programmable clock generators, designed specifically to replace multiple discrete crystals and oscillators in cost- and space-constrained consumer electronics with guaranteed jitter performance and zero-ppm frequency accuracy.

FAQ

What crystal frequency does the SI5350A-B04942-GMR require?

The SI5350A-B04942-GMR requires a 25 MHz or 27 MHz fundamental-mode AT-cut crystal connected to XA/XB pins. Internal load capacitance options (0/6/8/10 pF) eliminate need for external caps in most cases; Skyworks AN551 provides crystal selection guidance. The SI5350A-B04942-GMR is not compatible with TCXOs, VCXOs, or clock inputs - only fixed-frequency crystals.

Does the SI5350A-B04942-GMR support HCSL output levels?

Yes, the SI5350A-B04942-GMR supports HCSL-compatible swing when VDDOA/VDDOB/VDDOC is set to 2.5 V and external 511 Ω pull-down + 240 Ω termination is applied per output pair (per Figure 3 in datasheet Rev. 1.2). This capability is confirmed for the 10-MSOP package and requires inverted complementary clock generation for true differential signaling.

How many frequencies can the SI5350A-B04942-GMR generate simultaneously above 112.5 MHz?

The SI5350A-B04942-GMR supports only two unique frequencies above 112.5 MHz simultaneously - for example, 125 MHz on CLK0 and 130 MHz on CLK1 is valid, but adding 150 MHz on CLK2 violates the specification. Multiple instances of the same high-frequency (e.g., 125 MHz on all three outputs) are permitted without restriction.

What is the power-down current consumption of the SI5350A-B04942-GMR?

In power-down mode (PDN = high), the SI5350A-B04942-GMR draws ≤50 µA total current, as specified in Table 4 of the datasheet. This ultra-low standby current enables energy-efficient operation in battery-backed or always-on consumer devices without compromising fast wake-up (<1 ms) via PDN deassertion.

Can the SI5350A-B04942-GMR replace a 74.25 MHz crystal oscillator in an HDMI design?

Yes - the SI5350A-B04942-GMR is factory-programmed to deliver exact 74.25 MHz on CLK0 (or another designated output) with 0 ppm error and <70 ps pk-pk period jitter, meeting HDMI pixel clock requirements. It also supports simultaneous generation of related clocks (e.g., 24.576 MHz audio, 27 MHz TMDS) from a single 25/27 MHz crystal, reducing component count versus discrete XOs.

SI5350A-B04942-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: -

Package/Case:: 20-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

Type:: -

PLL:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Divider/Multiplier:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 20-QFN (4x4)

SI5350A-B04942-GMR FAQ

1.How can I place an order for SI5350A-B04942-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5350A-B04942-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5350A-B04942-GMR reliable?

The price and inventory of SI5350A-B04942-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5350A-B04942-GMR is usually 5 days.

3.What payment methods are accepted for SI5350A-B04942-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5350A-B04942-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5350A-B04942-GMR?

SI5350A-B04942-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5350A-B04942-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5350A-B04942-GMR?

For technical support, including SI5350A-B04942-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5350A-B04942-GMR requirements.

6.How does Aetrix verify that SI5350A-B04942-GMR is sourced from the original manufacturer or authorized distributors?

All SI5350A-B04942-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5350A-B04942-GMR meets industry standards.

7.What is the process for return or replacement of SI5350A-B04942-GMR?

All SI5350A-B04942-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5350A-B04942-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5350A-B04942-GMR part is unused and in its original packaging.

Return procedure for SI5350A-B04942-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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