Skyworks Solutions Inc. SI5350A-B05041-GTR
- Part No.:
- SI5350A-B05041-GTR
- Manufacturer:
- Skyworks Solutions Inc.
- Package:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
SI5350A-B05041-GTR.pdf
- Description:
- IC ANY FREQ ANY OUT XTAL 10MSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI5350A-B05041-GTR from Skyworks Solutions is a factory-programmed, pin-controlled CMOS clock generator delivering three independent output clocks (CLK0–CLK2) with 0 ppm frequency error across 2.5 kHz–200 MHz. It uses a 25 or 27 MHz crystal reference, supports per-output spread spectrum modulation, and operates with core VDD at 1.8/2.5/3.3 V and independent output VDDO rails-enabling precise level translation in mixed-voltage systems such as HDMI audio/video processors.
For engineers reviewing the SI5350A-B05041-GTR datasheet, SI5350A-B05041-GTR pinout, SI5350A-B05041-GTR application, or SI5350A-B05041-GTR equivalent, key selection criteria include its 3-output 10-MSOP package, glitchless dual-frequency switching via FS_0/FS_1 pins, HCSL-compatible swing capability (with 2.5 V VDDOA/VDDOB), and verified jitter performance of < 70 ps pk-pk (typ) under full-load conditions.
Technical Context
The SI5350A-B05041-GTR implements a dual-PLL + eight fractional MultiSynth architecture-two PLLs (PLLA and PLLB) feed up to eight independently programmable dividers, though this specific variant is configured for three outputs. Each output derives from its own MultiSynth divider, enabling non-integer-related frequencies without inter-channel coupling.
It accepts only a fixed-frequency crystal (25 or 27 MHz) on XA/XB inputs-not external CLKIN-and supports static phase offset, rise/fall time control, and per-output spread spectrum (down-spread or center-spread, 0.1–2.5% deviation). Frequency changes are glitchless when toggling between F1_x/F2_x states using FS_0/FS_1 control pins.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output count | 3 independent CMOS clock outputs (CLK0–CLK2), each configurable to any frequency from 2.5 kHz to 200 MHz |
| Frequency accuracy | 0 ppm error-exact synthesis enabled by fractional MultiSynth dividers referenced to stable 25/27 MHz crystal |
| Output jitter (pk-pk) | < 70 ps typical-measured across all 3 outputs running simultaneously in 10-MSOP package at 74.25/24.576/48 MHz |
| Spread spectrum | Selectable per output: down-spread (–0.1% to –2.5%) or center-spread (±0.1% to ±1.5%), modulated at 31.5 kHz nominal |
| Supply flexibility | Separate core VDD (1.8/2.5/3.3 V) and output VDDO (1.8/2.5/3.3 V) rails-enables level translation for interfacing with diverse logic families |
| Control interface | Pin-strapped configuration only-no I²C; uses P0–P4 for PDN, OEB_0/1/2, FS_0/FS_1, and SSEN functions |
| Package | 10-pin MSOP (3.0 × 4.9 mm), thermal resistance θJA = 150 °C/W (2-layer board) |
Pinout & Package
SI5350A-B05041-GTR is housed in a 10-pin MSOP package (3.0 × 4.9 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments follow the standard Si5350A 10-MSOP layout: XA/XB (crystal inputs), CLK0/CLK1/CLK2 (CMOS outputs), VDD (core supply), VDDOA/VDDOB/VDDOC (output supply rails), GND, and P0–P2 (configurable control pins).
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| XA, XB | Crystal oscillator input pair | Accepts 25 or 27 MHz fundamental-mode AT-cut crystal; internal load capacitance configurable (0/6/8/10 pF) |
| CLK0, CLK1, CLK2 | CMOS clock outputs | Individually programmable frequencies (2.5 kHz–200 MHz); support invert/non-invert, high-Z/low/high disable states |
| VDD | Core supply voltage | Supplies PLLs, logic, and MultiSynths; accepts 1.71–3.6 V (1.8/2.5/3.3 V nominal) |
| VDDOA, VDDOB, VDDOC | Output buffer supply rails | Independent 1.71–3.6 V supplies per output pair-enables mixed-voltage system interfacing (e.g., 1.8 V core + 3.3 V outputs) |
| GND | Ground reference | Common return for core, outputs, and crystal circuit; requires low-impedance connection to minimize jitter |
| P0, P1, P2 | Configurable control inputs | P0 = OEB_0 (CLK0 enable), P1 = OEB_1 (CLK1 enable), P2 = OEB_2 (CLK2 enable); all support active-low assertion |
Key Features
| Feature | Design Value |
|---|---|
| Factory-programmed configuration | Predefined frequency plan (SI5350A-B05041-GTR) eliminates need for I²C programming hardware or firmware integration |
| Glitchless frequency switching | F1_x/F2_x dual-frequency mode on CLK0–CLK2 enables real-time clock rate changes (e.g., video format switching) without output disruption |
| HCSL-compatible swing | Configurable via 2.5 V VDDOA/VDDOB and external termination-supports differential signaling for PCIe Gen1 and SATA applications |
| Per-output spread spectrum | Reduces EMI peak amplitude on individual clocks-critical for passing FCC/CE radiated emissions tests in compact consumer electronics |
| Low-power operation | 20–30 mA typical core current with 3 outputs active; 50 µA power-down current when PDN pin asserted |
Applications
| HDMI Audio/Video Processor Clocking | Residential Gateway Timing |
|---|---|
Use Scenario: Synchronizing HDMI transmitter (74.25 MHz), audio codec (24.576 MHz), and Ethernet PHY (25/27 MHz) in set-top boxes or Blu-ray players. IC Role / Device Role / Timing Role: Replaces three discrete crystals/XOs with a single programmable source, reducing BOM count and board space. Use Value: Eliminates crystal matching tolerances and board-level skew; enables dynamic frequency reconfiguration during video format transitions. |
Use Scenario: Providing synchronized clocks to CPU (33.333 MHz), USB controller (48 MHz), and Wi-Fi SoC (22.5792 MHz) in home routers. IC Role / Device Role / Timing Role: Central timing hub delivering multiple non-harmonically related frequencies from one crystal reference. Use Value: Reduces EMI through per-output spread spectrum; simplifies supply design with independent VDDO rails for mixed-voltage subsystems. |
| Printers & Scanners | Handheld Instrumentation |
Use Scenario: Driving image sensor interface (27 MHz), motor controller (48 MHz), and display driver (74.25 MHz) in multifunction printers. IC Role / Device Role / Timing Role: Low-jitter (<70 ps pk-pk) clock source ensuring pixel-perfect image capture and accurate motion control. Use Value: Maintains timing integrity across high-speed parallel interfaces while minimizing radiated noise near sensitive analog circuits. |
Use Scenario: Supplying sample clocks (125 MHz ADC), FPGA fabric (48 MHz), and communication interface (28.322 MHz) in portable test equipment. IC Role / Device Role / Timing Role: Factory-configured, pin-controlled clock generator eliminating need for external configuration EEPROM or microcontroller. Use Value: Enables rapid power-up (<2 ms) and deterministic timing behavior-critical for battery-powered devices requiring fast wake-from-sleep response. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar clock generator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si5350A-B-GT | Blank (unprogrammed) 10-MSOP variant requiring ClockBuilder Pro configuration and I²C programming before use | Suitable for designs needing custom frequency plans not pre-defined in factory-programmed variants | Choose SI5350A-B05041-GTR for drop-in deployment; select Si5350A-B-GT only if field-programmability or post-manufacture tuning is required |
| Si5351A-B-GT | I²C-programmable 3-output variant with identical 10-MSOP package but supports external CLKIN (not crystal-only) and higher max frequency (200 MHz vs. same) | Better suited for systems with existing clock trees where an input clock signal-not crystal-is available | SI5350A-B05041-GTR offers lower jitter and simpler integration in crystal-referenced cost-sensitive designs; Si5351A-B-GT adds flexibility at the cost of added I²C infrastructure |
Compared with Si5350A-B-GT and Si5351A-B-GT, the SI5350A-B05041-GTR delivers guaranteed factory-set timing performance without configuration overhead, making it optimal for high-volume production where consistency, startup reliability, and minimal BOM complexity are prioritized.
Availability
SI5350A-B05041-GTR is available at Aetrix Electronics and suitable for HDMI transceivers, residential gateways, printers/scanners, and handheld instrumentation requiring stable component supply, consistent factory-programmed timing behavior, and long-term lifecycle support.
Supply support for SI5350A-B05041-GTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and power management ICs.
The Si5350A-B product line delivers factory-programmable, low-jitter clock generators targeting cost-sensitive consumer, networking, and embedded applications where crystal replacement and multi-frequency synthesis are critical.
FAQ
What is the reference clock requirement for SI5350A-B05041-GTR?
The SI5350A-B05041-GTR requires a 25 MHz or 27 MHz fundamental-mode AT-cut crystal connected to XA and XB pins. It does not accept external clock signals-only crystal oscillation. Internal load capacitance is configurable (0/6/8/10 pF), and optional external capacitors ≤2 pF may be added for crystals requiring 12 pF total load.
Does SI5350A-B05041-GTR support spread spectrum on all three outputs?
Yes, SI5350A-B05041-GTR supports independent spread spectrum enable/disable per output (CLK0–CLK2), with selectable down-spread (–0.1% to –2.5%) or center-spread (±0.1% to ±1.5%) profiles modulated at 31.5 kHz. Spread spectrum is only available on outputs derived from PLLA-not PLLB.
Can SI5350A-B05041-GTR generate two different frequencies on the same output pin?
Yes, SI5350A-B05041-GTR supports dual-frequency operation (F1_x/F2_x) on CLK0–CLK2 via FS_0 and FS_1 control pins. For example, CLK0 can output either 74.25 MHz (FS_0 = low) or 74.25/1.001 MHz (FS_0 = high), with glitchless transition between states.
What are the supply voltage requirements for SI5350A-B05041-GTR?
SI5350A-B05041-GTR requires core VDD at 1.71–3.6 V (1.8/2.5/3.3 V nominal) and separate output supply rails VDDOA/VDDOB/VDDOC, each independently configurable within the same range. All VDDO rails must be powered before or simultaneously with VDD to ensure proper sequencing.
Is SI5350A-B05041-GTR compatible with HCSL signaling?
Yes, SI5350A-B05041-GTR supports HCSL-compatible swing when VDDOA and/or VDDOB are set to 2.5 V and appropriate external termination (e.g., 51.1 Ω pull-down + 240 Ω series) is applied. This capability is validated for the 10-MSOP package and enables direct interface with PCIe Gen1 receivers.
SI5350A-B05041-GTR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- -
- PLL:
- -
- Input:
- -
- Output:
- -
- Number of Circuits:
- -
- Ratio - Input:Output:
- -
- Differential - Input:Output:
- -
- Frequency - Max:
- -
- Divider/Multiplier:
- -
- Voltage - Supply:
- -
- Operating Temperature:
- -
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 10-MSOP
SI5350A-B05041-GTR FAQ
1.How can I place an order for SI5350A-B05041-GTR through Aetrix?
Please submit a Request for Quotation (RFQ) for SI5350A-B05041-GTR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI5350A-B05041-GTR reliable?
The price and inventory of SI5350A-B05041-GTR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5350A-B05041-GTR is usually 5 days.
3.What payment methods are accepted for SI5350A-B05041-GTR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5350A-B05041-GTR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI5350A-B05041-GTR?
SI5350A-B05041-GTR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI5350A-B05041-GTR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI5350A-B05041-GTR?
For technical support, including SI5350A-B05041-GTR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5350A-B05041-GTR requirements.
6.How does Aetrix verify that SI5350A-B05041-GTR is sourced from the original manufacturer or authorized distributors?
All SI5350A-B05041-GTR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5350A-B05041-GTR meets industry standards.
7.What is the process for return or replacement of SI5350A-B05041-GTR?
All SI5350A-B05041-GTR units undergo pre-shipment inspection (PSI). If there is an issue with SI5350A-B05041-GTR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI5350A-B05041-GTR part is unused and in its original packaging.
Return procedure for SI5350A-B05041-GTR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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