Skyworks Solutions Inc. SI5350A-B05236-GM
- Part No.:
- SI5350A-B05236-GM
- Manufacturer:
- Skyworks Solutions Inc.
- Package:
- 20-VFQFN Exposed Pad
- Datasheet:
-
SI5350A-B05236-GM.pdf
- Description:
- IC ANY FREQ ANY OUT XTAL 20QFN
- Quantity:
- Payment:

- Shipping:

Inventory:3,687
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Product details
Overview
SI5350A-B05236-GM from Skyworks Solutions is a factory-programmed, pin-controlled CMOS clock generator delivering up to 8 independent output frequencies (2.5 kHz–200 MHz) with 0 ppm synthesis error, low period jitter (<70 ps pk-pk), and configurable spread spectrum on any output. It replaces multiple crystals/XOs in audio/video, networking, and embedded systems using a single 25 or 27 MHz crystal reference.
For engineers reviewing the SI5350A-B05236-GM datasheet, SI5350A-B05236-GM pinout, SI5350A-B05236-GM application, or SI5350A-B05236-GM equivalent, key selection criteria include its 20-QFN package with 20-pin layout, dual-PLL + MultiSynth architecture, per-output voltage supply (VDDO), and support for glitchless frequency switching via FS_0/FS_1 pins.
Technical Context
The SI5350A-B05236-GM implements two high-frequency PLLs (PLLA and PLLB) feeding eight independent fractional MultiSynth™ dividers-one per output-enabling simultaneous non-integer-related frequencies. PLLA supports spread spectrum modulation (±0.1% to ±1.5%, 31.5 kHz rate); PLLB does not.
It accepts only a fixed 25 MHz or 27 MHz crystal (XA/XB), operates across –40°C to +85°C, and supports per-output VDDO at 1.8 V, 2.5 V, or 3.3 V-critical for HCSL-compatible swing (2.5 V VDDO required) and level translation to mixed-voltage systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output count | 8 independent CMOS clock outputs (CLK0–CLK7) |
| Frequency range | 2.5 kHz to 200 MHz per output; max two unique frequencies >112.5 MHz simultaneously |
| Period jitter | <70 ps pk-pk (typical, all outputs active, worst-case frequency plan) |
| Core supply | 1.8 V / 2.5 V / 3.3 V (independent of VDDO; sequencing requires VDDO powered before or with VDD) |
| Reference input | 25 MHz or 27 MHz fundamental-mode AT-cut crystal only (no external CLKIN support) |
| Spread spectrum | Selectable per-output down-spread (–0.1% to –2.5%) or center-spread (±0.1% to ±1.5%), modulated at 31.5 kHz |
| Power consumption | 25 mA typical core current (all 8 outputs enabled, 1.8 V VDD) |
Pinout & Package
SI5350A-B05236-GM is packaged in a 20-pin QFN (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks Rev. 1.2 datasheet Section 7.1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND | Ground reference | Common return for core and output supplies; must connect to PCB thermal pad |
| VDD | Core supply | Supplies internal logic, PLLs, and control circuitry; 1.8/2.5/3.3 V |
| VDDOA–VDDOD | Output buffer supplies | Four independent VDDO rails (1.8/2.5/3.3 V each) powering CLK0–CLK7 in pairs (e.g., VDDOA powers CLK0/CLK1) |
| CLK0–CLK7 | CMOS clock outputs | Eight configurable, glitchless outputs; each supports invert/non-invert, high-Z/low/high disable state |
| XA, XB | Crystal oscillator inputs | Differential crystal connection; supports only 25 MHz or 27 MHz AT-cut crystals |
| P0–P4 | Configurable control pins | Factory-assigned roles: P0=FS_0, P1=FS_1, P2=OEB_0, P3=OEB_1, P4=SSEN (per datasheet Table 14) |
| PDN | Power-down enable | Active-high; places device in ultra-low-power mode (≤50 µA) when asserted |
Key Features
| Feature | Design Value |
|---|---|
| Factory-programmed configuration | Preloaded with exact frequency plan (SI5350A-B05236-GM), eliminating I²C programming during system boot |
| Dual-PLL + per-output MultiSynth™ | Enables true independence between all 8 outputs-no integer relationship required between frequencies |
| Per-output VDDO rails | Allows mixed-voltage clocking: e.g., CLK0/CLK1 at 1.8 V for FPGA I/O, CLK2/CLK3 at 3.3 V for legacy MCU |
| HCSL-compatible output mode | Configurable via 2.5 V VDDO + external resistor network (511 Ω/240 Ω) on CLK0–CLK3 pairs for PCIe Gen1 compliance |
| Glitchless frequency switching | FS_0/FS_1 pins select between two preconfigured frequencies (F1_x/F2_x) on CLK0–CLK2 without clock interruption |
Applications
| Audio/Video Timing | Networking PHY Clocking |
|---|---|
Use Scenario: HDMI transmitter, audio codec, and video processor require synchronized but non-integer-related clocks (e.g., 74.25 MHz, 24.576 MHz, 48 MHz). IC Role / Device Role / Timing Role: Single-source multi-frequency clock generator replacing four discrete XOs. Use Value: Reduces BOM count and board space while guaranteeing 0 ppm frequency accuracy and <70 ps jitter across all outputs. | Use Scenario: Ethernet PHY (e.g., 125 MHz), USB controller (48 MHz), and CPU interface (33.333 MHz) operate concurrently in a residential gateway. IC Role / Device Role / Timing Role: Centralized timing hub providing isolated, low-jitter clocks to heterogeneous subsystems. Use Value: Eliminates inter-clock crosstalk and EMI issues via per-output spread spectrum control and independent VDDO rail noise isolation. |
| Embedded System XO Replacement | PCIe Gen1 Reference Clock |
Use Scenario: Cost-sensitive industrial controller uses multiple legacy microcontrollers and FPGAs each requiring distinct clock frequencies. IC Role / Device Role / Timing Role: Drop-in replacement for 3–8 crystals/XOs with identical footprint consolidation. Use Value: Lowers total system cost by >40% versus discrete oscillators and simplifies inventory management with one programmable part number. | Use Scenario: PCIe Gen1 endpoint (e.g., add-in card) requires a 100 MHz differential reference clock meeting jitter and swing specs. IC Role / Device Role / Timing Role: Configured as HCSL-compatible source using 2.5 V VDDOA and external resistors on CLK0/CLK1 pair. Use Value: Meets PCIe Gen1 jitter requirement (<100 ps pk-pk) without external differential driver IC or complex layout. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar clock generator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si5350A-B-GM | Blank (unprogrammed) 20-QFN variant requiring ClockBuilder Pro configuration and I²C initialization at boot | Not suitable for systems lacking I²C host or requiring immediate clock availability after power-up | Select SI5350A-B05236-GM when factory-programmed, pin-controlled operation is mandatory |
| Si5351A-B-GM | I²C-programmable 8-output clock generator with CLKIN option (supports external reference), but no spread spectrum or FS pin control | Better for designs needing dynamic reconfiguration or external clock sources; lacks glitchless frequency switching | Choose Si5351A-B-GM only if runtime frequency updates or non-crystal references are required |
Compared with Si5350A-B-GM and Si5351A-B-GM, SI5350A-B05236-GM delivers deterministic, zero-latency clock startup and hardware-based frequency selection-critical for automotive infotainment and medical imaging where boot-time timing predictability is non-negotiable.
Availability
SI5350A-B05236-GM is available at Aetrix Electronics and suitable for audio/video equipment, networking infrastructure, and embedded industrial controllers requiring stable component supply, guaranteed factory-programmed configurations, and long-term lifecycle support.
Supply support for SI5350A-B05236-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, and industrial markets.
The Si5350A product line delivers highly flexible, factory-programmable clock generation for cost-sensitive, high-volume applications where replacing multiple crystals with a single configurable device reduces design complexity and bill-of-materials cost.
FAQ
What reference crystal is required for SI5350A-B05236-GM?
The SI5350A-B05236-GM requires a 25 MHz or 27 MHz fundamental-mode AT-cut crystal connected to XA/XB pins. It does not accept external clock signals or other crystal frequencies. Internal load capacitance options (0/6/8/10 pF) are factory-configured per the specific SI5350A-B05236-GM programming, eliminating need for external capacitors in most cases.
Does SI5350A-B05236-GM support spread spectrum on all eight outputs?
Yes, spread spectrum is configurable per output-but only for clocks derived from PLLA. Outputs synchronized to PLLB (e.g., those using certain MultiSynth configurations) do not support spread spectrum. The SI5350A-B05236-GM's factory programming defines which outputs use PLLA; this is fixed and cannot be changed post-manufacture.
Can SI5350A-B05236-GM generate frequencies above 112.5 MHz on more than two outputs?
No. The SI5350A-B05236-GM supports only two unique frequencies above 112.5 MHz simultaneously. For example, it can deliver 125 MHz on CLK0 and 130 MHz on CLK1-but cannot also output 150 MHz on CLK2. Multiple copies of the same high-frequency signal (e.g., 125 MHz on CLK0–CLK3) are permitted.
How is the frequency switching function implemented on SI5350A-B05236-GM?
The SI5350A-B05236-GM uses factory-assigned P0 (FS_0) and P1 (FS_1) pins to select between two preconfigured frequencies (F1_x/F2_x) on CLK0–CLK2. When FS_0 is low, CLK0 outputs F1_0; when high, it outputs F2_0-switching occurs without clock glitches. This hardware-based control requires no software or I²C interaction.
Is SI5350A-B05236-GM pin-compatible with other Si5350A variants in 20-QFN?
Yes, all Si5350A 20-QFN variants-including SI5350A-B05236-GM, SI5350A-B-GM, and SI5350A-B-GMR-share identical 20-pin QFN (4×4 mm) mechanical and electrical pinouts. However, their internal configurations (frequency plan, control pin mapping, spread spectrum assignment) differ and are fixed at factory programming.
SI5350A-B05236-GM Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- 20-VFQFN Exposed Pad
- Packaging:
- Strip
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- -
- PLL:
- -
- Input:
- -
- Output:
- -
- Number of Circuits:
- -
- Ratio - Input:Output:
- -
- Differential - Input:Output:
- -
- Frequency - Max:
- -
- Divider/Multiplier:
- -
- Voltage - Supply:
- -
- Operating Temperature:
- -
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 20-QFN (4x4)
SI5350A-B05236-GM FAQ
1.How can I place an order for SI5350A-B05236-GM through Aetrix?
Please submit a Request for Quotation (RFQ) for SI5350A-B05236-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI5350A-B05236-GM reliable?
The price and inventory of SI5350A-B05236-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5350A-B05236-GM is usually 5 days.
3.What payment methods are accepted for SI5350A-B05236-GM?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5350A-B05236-GM transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI5350A-B05236-GM?
SI5350A-B05236-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI5350A-B05236-GM order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI5350A-B05236-GM?
For technical support, including SI5350A-B05236-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5350A-B05236-GM requirements.
6.How does Aetrix verify that SI5350A-B05236-GM is sourced from the original manufacturer or authorized distributors?
All SI5350A-B05236-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5350A-B05236-GM meets industry standards.
7.What is the process for return or replacement of SI5350A-B05236-GM?
All SI5350A-B05236-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5350A-B05236-GM, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI5350A-B05236-GM part is unused and in its original packaging.
Return procedure for SI5350A-B05236-GM:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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