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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Clock Generators, PLLs, Frequency Synthesizers

Skyworks Solutions Inc. SI5350A-B05282-GMR

Name: SI5350A-B05282-GMR
Brand: Skyworks Solutions Inc.
SKU: SI5350A-B05282-GMR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5350A-B05282-GMR

Manufacturer:: Skyworks Solutions Inc.

Category:: Clock Generators, PLLs, Frequency Synthesizers

Package:: 20-VFQFN Exposed Pad

Datasheet:: SI5350A-B05282-GMR.pdf

Description:: IC ANY FREQ ANY OUT XTAL 20QFN

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Product details

Overview

SI5350A-B05282-GMR from Skyworks Solutions is a factory-programmed, pin-controlled CMOS clock generator delivering up to 3 independent output frequencies (2.5 kHz–200 MHz) with 0 ppm synthesis error, <70 ps pk-pk period jitter, and configurable spread spectrum on each output. It operates from a 25 or 27 MHz crystal reference and supports 1.8/2.5/3.3 V core and output supply rails - used in audio/video processors, HDMI interfaces, and residential gateways for multi-clock domain synchronization.

For engineers reviewing the SI5350A-B05282-GMR datasheet, SI5350A-B05282-GMR pinout, SI5350A-B05282-GMR application, or SI5350A-B05282-GMR equivalent, key selection criteria include its 3-output 10-MSOP package, factory-configured frequency plan, glitchless dual-frequency switching via FS pins, HCSL-compatible swing capability at 2.5 V VDDO, and PCIe Gen 1 timing compliance.

Technical Context

The SI5350A-B05282-GMR implements a dual-PLL + per-output fractional MultiSynth architecture enabling simultaneous non-integer-related frequencies. Its 3-output variant uses PLLA as primary reference for all outputs, supporting spread spectrum only on PLLA-synchronized clocks.

It features user-configurable control pins including P0 (FS_0), P1 (FS_1), P2 (OEB_0), P3 (OEB_1), and P4 (SSEN), with programmable output enable states (high/low/Hi-Z), rise/fall time control, and static phase offset support - all configured at factory via ClockBuilder Pro.

Key Specifications

Parameter	Value and Actual Design Meaning
Output count	3 independent CMOS clock outputs (CLK0–CLK2)
Frequency range	2.5 kHz to 200 MHz per output; only two unique frequencies >112.5 MHz simultaneously allowed
Period jitter	<70 ps pk-pk typical (measured across all 3 outputs active)
Core supply	1.71–1.89 V / 2.25–2.75 V / 3.0–3.6 V - supports mixed-voltage system interfacing
Output drive voltage	VDDOx independently configurable at 1.71–1.89 V / 2.25–2.75 V / 3.0–3.6 V per output group
Reference input	25 MHz or 27 MHz fundamental-mode AT-cut crystal (XA/XB); no external load caps required for 6–10 pF CL
Power consumption	20–30 mA typical core current (3 outputs enabled); 50 µA in power-down mode

Pinout & Package

SI5350A-B05282-GMR is housed in a 10-pin MSOP package (3.0 × 4.9 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are validated per Skyworks Rev. 1.2 datasheet Section 7.3 and Figure 4 (10-MSOP block diagram).

Pin/Terminal	Circuit Role	Design Meaning
XA, XB	Crystal oscillator input pair	Differential crystal interface; supports 25/27 MHz AT-cut crystals with internal 0/6/8/10 pF load capacitance
CLK0, CLK1, CLK2	CMOS clock outputs	Individually configurable frequency, drive strength, inversion, and disable state (Hi-Z/low/high)
VDD	Core supply	Powers PLLs, logic, and MultiSynths; must be powered before or concurrently with VDDOx
VDDOA, VDDOB, VDDOC	Output buffer supplies	Independent 1.8/2.5/3.3 V rails per output group - enables level translation and HCSL compatibility at 2.5 V
GND	Ground reference	Analog/digital common return; requires low-inductance connection to thermal pad
P0, P1	Frequency select inputs	Glitchless dual-frequency switching on CLK0 (P0) and CLK1 (P1); F1_x/F2_x selection per output
P2, P3	Output enable controls	OEB_0 (P2) disables CLK0; OEB_1 (P3) disables CLK1/CLK2 - configurable Hi-Z/low/high on disable
P4	Spread spectrum enable	SSEN pin globally enables/disables spread spectrum on all PLLA-sourced outputs

Key Features

Feature	Design Value
Factory-programmed frequency plan	Eliminates I²C configuration hardware and firmware overhead; delivers known-good timing solution at power-up
Glitchless frequency switching	Enables dynamic clock rate changes (e.g., video format transitions) without metastability or system reset
HCSL-compatible output swing	Configurable at 2.5 V VDDO with external 511 Ω/240 Ω termination - supports PCIe Gen 1 differential clocking
Per-output spread spectrum	Reduces EMI peak amplitude by ±0.1–±1.5% center-spread or –0.1––2.5% down-spread at 30–33 kHz modulation
Independent VDDO rails	Allows mixed-voltage system integration (e.g., 3.3 V core + 1.8 V FPGA I/O) without external level shifters

Applications

Audio/Video Processing	HDMI Interface Timing
Use Scenario: Synchronizing audio sample rates (24.576 MHz), video pixel clocks (74.25 MHz), and system clocks (48 MHz) in set-top boxes and Blu-ray players. IC Role / Device Role / Timing Role: Replaces three discrete XOs with one programmable source, eliminating board space and BOM cost. Use Value: Reduces timing skew between domains and enables precise phase alignment across audio/video subsystems.	Use Scenario: Generating TMDS clock (74.25 MHz), audio clock (22.5792 MHz), and auxiliary timing (28.322 MHz) for HDMI transmitters. IC Role / Device Role / Timing Role: Provides sub-70 ps jitter clocks meeting HDMI 1.4 spec for pixel clock stability. Use Value: Prevents display artifacts and ensures reliable high-speed serial link operation without external jitter cleaners.
Residential Gateway	USB/Ethernet PHY Clocking
Use Scenario: Supplying synchronized clocks to CPU (33.333 MHz), Ethernet PHY (25 MHz), and VoIP codec (12.288 MHz) in broadband gateways. IC Role / Device Role / Timing Role: Single-source timing hub replacing multiple crystals and reducing EMI from multiple oscillators. Use Value: Enables spread spectrum on Ethernet clock to pass FCC Class B emissions limits without shielding.	Use Scenario: Driving USB 2.0 (48 MHz) and Gigabit Ethernet (125 MHz) PHYs from one compact clock generator. IC Role / Device Role / Timing Role: Delivers PCIe Gen 1–compliant 125 MHz clock with <95 ps pk-pk jitter to Ethernet MAC. Use Value: Eliminates need for separate low-jitter XO for Ethernet while maintaining USB timing margin.

Audio/Video Processing

HDMI Interface Timing

Use Scenario: Synchronizing audio sample rates (24.576 MHz), video pixel clocks (74.25 MHz), and system clocks (48 MHz) in set-top boxes and Blu-ray players.

IC Role / Device Role / Timing Role: Replaces three discrete XOs with one programmable source, eliminating board space and BOM cost.

Use Value: Reduces timing skew between domains and enables precise phase alignment across audio/video subsystems.

Use Scenario: Generating TMDS clock (74.25 MHz), audio clock (22.5792 MHz), and auxiliary timing (28.322 MHz) for HDMI transmitters.

IC Role / Device Role / Timing Role: Provides sub-70 ps jitter clocks meeting HDMI 1.4 spec for pixel clock stability.

Use Value: Prevents display artifacts and ensures reliable high-speed serial link operation without external jitter cleaners.

Residential Gateway

USB/Ethernet PHY Clocking

Use Scenario: Supplying synchronized clocks to CPU (33.333 MHz), Ethernet PHY (25 MHz), and VoIP codec (12.288 MHz) in broadband gateways.

IC Role / Device Role / Timing Role: Single-source timing hub replacing multiple crystals and reducing EMI from multiple oscillators.

Use Value: Enables spread spectrum on Ethernet clock to pass FCC Class B emissions limits without shielding.

Use Scenario: Driving USB 2.0 (48 MHz) and Gigabit Ethernet (125 MHz) PHYs from one compact clock generator.

IC Role / Device Role / Timing Role: Delivers PCIe Gen 1–compliant 125 MHz clock with <95 ps pk-pk jitter to Ethernet MAC.

Use Value: Eliminates need for separate low-jitter XO for Ethernet while maintaining USB timing margin.

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5350A-B05281-GMR	Same 3-output 10-MSOP package and architecture, but factory-programmed for different frequency set (e.g., 27/48/100 MHz vs. 24.576/48/74.25 MHz)	Not interchangeable without redesign; frequency plan is fixed at manufacture	Select based on exact required output frequencies - both require ClockBuilder Pro configuration pre-order
Si5351A-B-GT	I²C-programmable (not factory-configured); 3-output 10-MSOP; higher typical jitter (95 ps pk-pk); no spread spectrum	Suitable for prototyping or field-upgradable systems where runtime reconfiguration is needed	Choose Si5351A-B-GT only if dynamic frequency updates are required; SI5350A-B05282-GMR offers lower jitter and EMI control

Compared with Si5350A-B05281-GMR, SI5350A-B05282-GMR provides a distinct factory-set frequency triplet optimized for A/V timing; compared with Si5351A-B-GT, it trades I²C flexibility for lower jitter, integrated spread spectrum, and guaranteed power-on timing behavior.

Availability

SI5350A-B05282-GMR is available at Aetrix Electronics and suitable for audio/video processing, HDMI interface timing, and residential gateway applications requiring stable component supply, long-term lifecycle support, and factory-verified timing performance.

Supply support for SI5350A-B05282-GMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and power management ICs.

The Si5350A family is designed for cost-sensitive, space-constrained applications needing flexible, low-jitter clock generation - specifically targeting replacement of multiple crystals and XOs in consumer, networking, and embedded systems.

FAQ

What reference crystal frequency does SI5350A-B05282-GMR require?

SI5350A-B05282-GMR requires either a 25 MHz or 27 MHz fundamental-mode AT-cut crystal connected to XA/XB pins. The device includes selectable internal load capacitance (0/6/8/10 pF), eliminating external capacitors for standard 6–10 pF crystals. SI5350A-B05282-GMR is factory-programmed to operate with one of these two frequencies - verified in its specific configuration file.

Does SI5350A-B05282-GMR support HCSL-compatible outputs?

Yes - SI5350A-B05282-GMR supports HCSL-compatible swing when VDDOA is set to 2.5 V and CLK0/CLK1 are terminated with 511 Ω/240 Ω resistors per Figure 3 in the datasheet. This capability is confirmed for the 10-MSOP package and enables direct interface with PCIe Gen 1 receivers without external level-shifting circuitry.

Can SI5350A-B05282-GMR generate more than two frequencies above 112.5 MHz simultaneously?

No - SI5350A-B05282-GMR enforces a hard limit of two unique frequencies above 112.5 MHz across all outputs. For example, 125 MHz on CLK0 and 130 MHz on CLK1 is permitted, but adding 150 MHz on CLK2 violates the specification. Multiple copies of the same high-frequency signal (e.g., 125 MHz on CLK0/CLK1/CLK2) are allowed.

How is spread spectrum controlled on SI5350A-B05282-GMR?

Spread spectrum on SI5350A-B05282-GMR is enabled per-output during factory configuration and globally controlled by the SSEN pin (P4). When SSEN is high, spread spectrum operates at preconfigured deviation (±0.1–±1.5% center or –0.1––2.5% down) and modulation rate (30–33 kHz); when low, it is disabled. Only PLLA-sourced outputs support this feature.

What is the power-up behavior of SI5350A-B05282-GMR?

SI5350A-B05282-GMR achieves valid output clocks within 2–10 ms after VDD reaches minimum (TRDY), assuming CL = 5 pF and fCLKn > 1 MHz. In PLL bypass mode, valid output is achieved in 0.5–1 ms (TBYP). These timings are guaranteed across –40°C to +85°C and apply directly to SI5350A-B05282-GMR's factory-programmed configuration.

SI5350A-B05282-GMR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: -

Package/Case:: 20-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

Type:: -

PLL:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Divider/Multiplier:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 20-QFN (4x4)

SI5350A-B05282-GMR FAQ

1.How can I place an order for SI5350A-B05282-GMR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5350A-B05282-GMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5350A-B05282-GMR reliable?

The price and inventory of SI5350A-B05282-GMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5350A-B05282-GMR is usually 5 days.

3.What payment methods are accepted for SI5350A-B05282-GMR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5350A-B05282-GMR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5350A-B05282-GMR?

SI5350A-B05282-GMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5350A-B05282-GMR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5350A-B05282-GMR?

For technical support, including SI5350A-B05282-GMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5350A-B05282-GMR requirements.

6.How does Aetrix verify that SI5350A-B05282-GMR is sourced from the original manufacturer or authorized distributors?

All SI5350A-B05282-GMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5350A-B05282-GMR meets industry standards.

7.What is the process for return or replacement of SI5350A-B05282-GMR?

All SI5350A-B05282-GMR units undergo pre-shipment inspection (PSI). If there is an issue with SI5350A-B05282-GMR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5350A-B05282-GMR part is unused and in its original packaging.

Return procedure for SI5350A-B05282-GMR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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