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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Clock Generators, PLLs, Frequency Synthesizers

Skyworks Solutions Inc. SI5350A-B05941-GM

Name: SI5350A-B05941-GM
Brand: Skyworks Solutions Inc.
SKU: SI5350A-B05941-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5350A-B05941-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Clock Generators, PLLs, Frequency Synthesizers

Package:: 20-VFQFN Exposed Pad

Datasheet:: SI5350A-B05941-GM.pdf

Description:: IC ANY FREQ ANY OUT XTAL 20QFN

Quantity:: RFQ Add To RFQ list

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Product details

Overview

SI5350A-B05941-GM from Skyworks Solutions is a factory-programmed, pin-controlled CMOS clock generator with 8 independent outputs, synthesizing frequencies from 2.5 kHz to 200 MHz with 0 ppm error using a 25/27 MHz crystal reference. It features dual PLL + fractional MultiSynth architecture, <70 ps pk-pk period jitter (typ), and configurable spread spectrum on any output-used in audio/video processors, HDMI interfaces, and Ethernet PHY timing.

For engineers reviewing the SI5350A-B05941-GM datasheet, SI5350A-B05941-GM pinout, SI5350A-B05941-GM application, or SI5350A-B05941-GM equivalent, key selection criteria include output count (8), factory-programmed frequency plan, QFN-20 package compatibility, HCSL-compatible swing support at 2.5 V VDDO, and glitchless frequency switching via FS pins.

Technical Context

The SI5350A-B05941-GM implements two high-frequency PLLs (PLLA and PLLB) feeding eight independent fractional MultiSynth dividers-one per output-enabling simultaneous non-integer-related frequencies up to 200 MHz. Each MultiSynth supports dual-frequency configuration (F1_x/F2_x) for CLK0–CLK2, controlled by FS_0/FS_1 pins.

It operates from a single 25 MHz or 27 MHz AT-cut crystal (XA/XB), with internal load capacitance options (0/6/8/10 pF), and supports independent core (VDD) and output (VDDOx) supply rails at 1.8 V, 2.5 V, or 3.3 V-enabling level translation and eliminating external power filtering via excellent PSRR.

Key Specifications

Parameter	Value and Actual Design Meaning
Output count	8 independent CMOS clock outputs (CLK0–CLK7), each programmable to unique frequencies
Frequency range	2.5 kHz to 200 MHz per output; only two unique frequencies >112.5 MHz allowed simultaneously
Frequency accuracy	0 ppm error-exact synthesis enabled by fractional MultiSynth architecture and fixed crystal reference
Period jitter	<70 ps pk-pk (typ) at full 8-output operation-measured with 33.33/74.25/27/24.576/22.5792/28.322/125/48 MHz output set
Supply flexibility	VDD core: 1.71–1.89 V / 2.25–2.75 V / 3.0–3.6 V; VDDOx per output bank: same ranges, independently configurable
Spread spectrum	Selectable per-output down-spread (–0.1% to –2.5%) or center-spread (±0.1% to ±1.5%) at 30–33 kHz modulation rate
Power consumption	25 mA (typ) core current with all 8 outputs enabled; 50 µA in power-down mode (PDN = VDD)

Pinout & Package

SI5350A-B05941-GM is packaged in a 20-pin QFN (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks Rev. 1.2 datasheet Section 7.1.

Pin/Terminal	Circuit Role	Design Meaning
XA, XB	Crysal reference input pair	Accepts 25 MHz or 27 MHz fundamental-mode AT-cut crystal; internal load caps configurable (0/6/8/10 pF)
CLK0–CLK7	CMOS clock outputs	Eight independent outputs; each supports invert/non-invert, high/low/Hi-Z disable state, and spread spectrum (PLLA only)
VDDOA–VDDOD	Output buffer supply rails	Four independent VDDO banks (A–D); each powers two outputs (e.g., VDDOA → CLK0/CLK1) for level translation
VDD, GND	Core power and ground	VDD supplies PLLs, logic, and MultiSynths; sequencing requires VDDOx powered before or with VDD
P0–P4	Configurable control inputs	P0: OEB_0 (output enable for CLK0); P1/P2: FS_0/FS_1 (dual-frequency select for CLK0–CLK2); P3: SSEN (spread spectrum enable); P4: PDN (power-down)

Key Features

Feature	Design Value
Factory-programmed frequency plan	Eliminates I²C interface and external EEPROM-configuration is hard-coded at manufacture for deterministic boot behavior
Glitchless frequency switching	FS_0/FS_1 pins change CLK0–CLK2 between F1_x/F2_x without cycle loss or metastability-critical for dynamic clock domain adaptation
HCSL-compatible swing support	When VDDOA = 2.5 V, CLK0/CLK1 pair can drive HCSL loads (50 Ω termination) with proper external resistor network and one inverted output
Independent VDDO rail control	Each VDDO bank (A–D) isolates noise and enables mixed-voltage system interfacing-e.g., 1.8 V CPU core + 3.3 V peripheral clocks
Low-power power-down mode	PDN pin reduces core current to 50 µA-enables rapid sleep/wake in battery-sensitive or thermally constrained applications

Applications

HDMI Audio/Video Timing	Ethernet PHY Clocking
Use Scenario: Generating synchronized clocks for HDMI transmitter (74.25 MHz), audio codec (24.576 MHz), and video processor (27 MHz) in set-top boxes or AV receivers. IC Role / Device Role / Timing Role: Replaces three discrete crystals/XOs with a single programmable source, reducing BOM count and board space. Use Value: Eliminates crystal matching tolerances and improves system-level jitter margin via correlated phase alignment across outputs.	Use Scenario: Providing 25 MHz and 125 MHz clocks to Ethernet PHY and MAC layers in residential gateways or switches. IC Role / Device Role / Timing Role: Delivers precise, low-jitter reference clocks meeting IEEE 802.3 compliance requirements for 100BASE-TX and 1000BASE-T. Use Value: Enables single-device clock tree with <70 ps pk-pk jitter-exceeding PHY vendor spec limits and simplifying layout vs. multiple oscillators.
USB Controller Synchronization	Multi-Core CPU Clock Distribution
Use Scenario: Supplying 48 MHz USB 2.0 clock and 28.322 MHz USB 3.x reference to host controller in embedded computing platforms. IC Role / Device Role / Timing Role: Generates exact USB-compliant frequencies with zero ppm error-no software calibration required. Use Value: Guarantees full-speed and high-speed enumeration reliability while supporting spread spectrum to reduce EMI near USB connectors.	Use Scenario: Distributing 33.333 MHz system clock and 22.5792 MHz auxiliary clock to multi-core CPU and GPU subsystems in media processors. IC Role / Device Role / Timing Role: Provides phase-aligned, low-skew clocks across voltage domains using independent VDDO banks. Use Value: Reduces inter-core timing uncertainty and eliminates need for separate clock buffers or fanout ICs.

HDMI Audio/Video Timing

Ethernet PHY Clocking

Use Scenario: Generating synchronized clocks for HDMI transmitter (74.25 MHz), audio codec (24.576 MHz), and video processor (27 MHz) in set-top boxes or AV receivers.

IC Role / Device Role / Timing Role: Replaces three discrete crystals/XOs with a single programmable source, reducing BOM count and board space.

Use Value: Eliminates crystal matching tolerances and improves system-level jitter margin via correlated phase alignment across outputs.

Use Scenario: Providing 25 MHz and 125 MHz clocks to Ethernet PHY and MAC layers in residential gateways or switches.

IC Role / Device Role / Timing Role: Delivers precise, low-jitter reference clocks meeting IEEE 802.3 compliance requirements for 100BASE-TX and 1000BASE-T.

Use Value: Enables single-device clock tree with <70 ps pk-pk jitter-exceeding PHY vendor spec limits and simplifying layout vs. multiple oscillators.

USB Controller Synchronization

Multi-Core CPU Clock Distribution

Use Scenario: Supplying 48 MHz USB 2.0 clock and 28.322 MHz USB 3.x reference to host controller in embedded computing platforms.

IC Role / Device Role / Timing Role: Generates exact USB-compliant frequencies with zero ppm error-no software calibration required.

Use Value: Guarantees full-speed and high-speed enumeration reliability while supporting spread spectrum to reduce EMI near USB connectors.

Use Scenario: Distributing 33.333 MHz system clock and 22.5792 MHz auxiliary clock to multi-core CPU and GPU subsystems in media processors.

IC Role / Device Role / Timing Role: Provides phase-aligned, low-skew clocks across voltage domains using independent VDDO banks.

Use Value: Reduces inter-core timing uncertainty and eliminates need for separate clock buffers or fanout ICs.

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5350A-B-GM	Blank (unprogrammed) 20-QFN variant requiring ClockBuilder Pro configuration and programming	Requires post-manufacture programming infrastructure; not suitable for drop-in replacement	Select SI5350A-B05941-GM when factory-programmed, pre-validated frequency plan is required for production release.
Si5351A-B-GM	I²C-programmable 8-output variant with identical architecture but different control interface and no FS pin support	Lacks pin-controlled dual-frequency switching; requires microcontroller firmware integration for runtime reconfiguration	Choose SI5350A-B05941-GM for fixed-function, pin-strapped systems where I²C bus overhead or firmware dependency must be avoided.

Compared with Si5350A-B-GM and Si5351A-B-GM, SI5350A-B05941-GM delivers immediate plug-and-play operation with guaranteed frequency accuracy, eliminates I²C firmware development, and enables hardware-based frequency selection-making it optimal for cost-sensitive, high-volume consumer electronics with static clocking requirements.

Availability

SI5350A-B05941-GM is available at Aetrix Electronics and suitable for HDMI timing, Ethernet PHY clocking, USB synchronization, and multi-core CPU distribution requiring stable component supply and factory-verified performance.

Supply support for SI5350A-B05941-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, mobile, infrastructure, and timing solutions with broad portfolio coverage and high-reliability manufacturing.

The Si5350A family is designed for cost-sensitive, high-volume applications requiring flexible, factory-programmed clock generation-replacing multiple crystals and oscillators while maintaining sub-100 ps jitter and PCIe Gen 1 compatibility.

FAQ

What crystal frequency does the SI5350A-B05941-GM require?

The SI5350A-B05941-GM requires a 25 MHz or 27 MHz fundamental-mode AT-cut crystal connected to XA/XB pins. Internal load capacitance options (0/6/8/10 pF) eliminate external capacitors for standard crystals; optional ≤2 pF external caps support 12 pF-load crystals. The specific SI5350A-B05941-GM is factory-configured for one of these two frequencies per its programmed plan.

Does the SI5350A-B05941-GM support HCSL output levels?

Yes-the SI5350A-B05941-GM supports HCSL-compatible swing when VDDOA is set to 2.5 V and CLK0/CLK1 are configured with complementary (one inverted) outputs and external 511 Ω/240 Ω resistor networks. This capability is confirmed for the 20-QFN package and applies only to output pairs sharing the same VDDO rail.

How many unique high-frequency outputs (>112.5 MHz) can the SI5350A-B05941-GM generate simultaneously?

The SI5350A-B05941-GM supports exactly two unique frequencies above 112.5 MHz at once-e.g., 125 MHz on CLK0 and 130 MHz on CLK1. Additional outputs above 112.5 MHz must duplicate one of those two frequencies. This constraint arises from PLL resource allocation in the dual-PLL architecture and is explicitly specified in the SI5350A-B05941-GM datasheet Table 7 note.

Can the SI5350A-B05941-GM be reprogrammed after purchase?

No-the SI5350A-B05941-GM is factory-programmed with a fixed frequency plan and cannot be reconfigured. Unlike blank Si5350A-B-GM variants, it lacks I²C interface functionality and has no user-accessible programming interface. Its configuration is permanently embedded during manufacturing, ensuring consistent, tamper-proof operation in production systems.

What is the power-up time for the SI5350A-B05941-GM?

The SI5350A-B05941-GM achieves valid output clocks within 2 ms (typical) and 10 ms (max) after VDD reaches minimum operating voltage, assuming CL = 5 pF and fCLKn > 1 MHz. In PLL bypass mode-where the crystal directly drives outputs-the power-up time reduces to 0.5–1 ms. These values are measured under recommended operating conditions and apply to the SI5350A-B05941-GM's 20-QFN package.

SI5350A-B05941-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: -

Package/Case:: 20-VFQFN Exposed Pad

Packaging:: Strip

Product Status:: Active

Programmable:: Not Verified

Type:: -

PLL:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Divider/Multiplier:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 20-QFN (4x4)

SI5350A-B05941-GM FAQ

1.How can I place an order for SI5350A-B05941-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5350A-B05941-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5350A-B05941-GM reliable?

The price and inventory of SI5350A-B05941-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5350A-B05941-GM is usually 5 days.

3.What payment methods are accepted for SI5350A-B05941-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5350A-B05941-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5350A-B05941-GM?

SI5350A-B05941-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5350A-B05941-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5350A-B05941-GM?

For technical support, including SI5350A-B05941-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5350A-B05941-GM requirements.

6.How does Aetrix verify that SI5350A-B05941-GM is sourced from the original manufacturer or authorized distributors?

All SI5350A-B05941-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5350A-B05941-GM meets industry standards.

7.What is the process for return or replacement of SI5350A-B05941-GM?

All SI5350A-B05941-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5350A-B05941-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5350A-B05941-GM part is unused and in its original packaging.

Return procedure for SI5350A-B05941-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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