Skyworks Solutions Inc. SI5350C-B04231-GTR

Overview

SI5350C-B04231-GTR from Skyworks Solutions is a factory-programmed, pin-controlled CMOS clock generator with dual PLL + MultiSynth fractional synthesis architecture. It delivers up to 4 independent, non-integer-related output frequencies from 2.5 kHz to 200 MHz, supports 0 ppm frequency error, <70 ps pk-pk period jitter (typ), and operates from a 25 or 27 MHz crystal reference. It serves as a drop-in replacement for multiple XOs and PLLs in compact networking and audio/video timing systems.

For engineers reviewing the SI5350C-B04231-GTR datasheet, SI5350C-B04231-GTR pinout, SI5350C-B04231-GTR application, or SI5350C-B04231-GTR equivalent, key selection criteria include its 4-output 16-QFN package, configurable spread spectrum per output, glitchless frequency switching via FS pins, HCSL-compatible swing support at 2.5 V VDDO, and factory-programmed fixed configuration eliminating I²C programming overhead.

Technical Context

The SI5350C-B04231-GTR implements a dual-loop PLL architecture: PLLA drives outputs requiring spread spectrum or high-precision synthesis, while PLLB supports synchronous clocks referenced to CLKIN. Its eight MultiSynth fractional dividers enable independent frequency generation per output, with two-frequency capability (F1_x/F2_x) on CLK0–CLK2 selectable via FS_0/FS_1 control pins.

It accepts either a 25 MHz or 27 MHz fundamental-mode AT-cut crystal across XA/XB (with internal 0–10 pF load capacitance), or an external 10–100 MHz clock on CLKIN. Output buffers are independently powered (VDDOA–VDDOD), supporting mixed-voltage operation (1.8/2.5/3.3 V) and HCSL-compatible swing when VDDO = 2.5 V and INV function enabled.

Key Specifications

Pinout & Package

SI5350C-B04231-GTR is housed in a 16-pin QFN package (3 mm × 3 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks Rev. 1.2 datasheet Section 7.2.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Compared with SI5350C-B04231-GTR, Si5350A-B-GM1 reduces output count and removes CLKIN flexibility, while Si5350C-B-GM expands output capacity at the cost of PCB area and routing complexity-making SI5350C-B04231-GTR the optimal balance for 4-clock, mixed-reference, space-sensitive designs.

Availability

SI5350C-B04231-GTR is available at Aetrix Electronics and suitable for networking equipment, audio/video consumer devices, and industrial embedded systems requiring stable component supply, factory-programmed timing precision, and long-term production continuity.

Supply support for SI5350C-B04231-GTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and power management ICs.

The SI5350C-B04231-GTR belongs to Skyworks' Si5350 family of factory-programmable clock generators, designed to replace multiple discrete timing components in cost- and space-constrained applications such as consumer electronics, networking, and industrial control.

FAQ

What reference sources does the SI5350C-B04231-GTR support?

The SI5350C-B04231-GTR supports two reference sources: a 25 MHz or 27 MHz fundamental-mode AT-cut crystal connected to XA/XB pins, or an external 10–100 MHz single-ended clock applied to the CLKIN pin. It cannot accept both simultaneously for primary reference; CLKIN is used for synchronous outputs while the crystal serves free-running outputs. The SI5350C-B04231-GTR configuration is factory-programmed to use one of these references per design.

Does the SI5350C-B04231-GTR require I²C configuration during operation?

No. The SI5350C-B04231-GTR is factory-programmed with a fixed configuration using ClockBuilder Pro software prior to shipment. All frequency plans, spread spectrum settings, output states, and control pin assignments are permanently stored in on-chip memory. No I²C bus, external EEPROM, or runtime configuration is needed-only power, reference, and control pin assertions (e.g., FS_0/FS_1, PDN) are required for operation.

Can the SI5350C-B04231-GTR generate HCSL-compatible outputs?

Yes, the SI5350C-B04231-GTR supports HCSL-compatible swing on any output pair (e.g., CLK0/CLK1) when VDDO for that pair is set to 2.5 V and the INV function is enabled on one output to create the complementary signal. This functionality is validated for the 10-MSOP and 20-QFN packages; the 16-QFN package (SI5350C-B04231-GTR) also supports it per Skyworks documentation. External 511 Ω and 240 Ω resistors are required per output leg to terminate to 50 Ω.

What is the maximum number of unique frequencies above 112.5 MHz supported by the SI5350C-B04231-GTR?

The SI5350C-B04231-GTR supports only two unique frequencies above 112.5 MHz simultaneously across its four outputs. For example, it can deliver 125 MHz on CLK0 and 130 MHz on CLK1, but not 125 MHz, 130 MHz, and 150 MHz on three separate outputs. Multiple instances of the same high-frequency value (e.g., 125 MHz on CLK0–CLK3) are permitted. This limitation arises from internal PLL bandwidth and MultiSynth divider resolution constraints.

How does the SI5350C-B04231-GTR handle power-down and output disable?

The SI5350C-B04231-GTR implements two distinct control mechanisms: PDN (pin P0) places the entire device into ultra-low-power mode (<50 µA), halting all PLLs and outputs; OEB_0/OEB_1 (pins P1/P2) individually disable CLK0–CLK1 and CLK2–CLK3, with configurable disable state (high, low, or high-impedance). These functions are factory-programmed and do not require I²C access. The SI5350C-B04231-GTR retains its configuration in power-down and resumes operation within 2 ms of PDN deassertion.