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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Clock Generators, PLLs, Frequency Synthesizers

Skyworks Solutions Inc. SI5350C-B04470-GTR

Name: SI5350C-B04470-GTR
Brand: Skyworks Solutions Inc.
SKU: SI5350C-B04470-GTR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5350C-B04470-GTR

Manufacturer:: Skyworks Solutions Inc.

Category:: Clock Generators, PLLs, Frequency Synthesizers

Package:: 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)

Datasheet:: SI5350C-B04470-GTR.pdf

Description:: IC ANY FREQ ANY OUT REF C 10MSOP

Quantity:: RFQ Add To RFQ list

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Inventory:4,970

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Product details

Overview

SI5350C-B04470-GTR from Skyworks Solutions is a factory-programmed, pin-controlled CMOS clock generator with dual PLL + MultiSynth fractional synthesis architecture, delivering up to 4 independent output clocks (CLK0–CLK3) in the 2.5 kHz–200 MHz range, with <70 ps pk-pk period jitter, 0 ppm frequency error, and HCSL-compatible swing support at 2.5 V VDDO. It replaces discrete crystals, XOs, and PLLs in compact audio/video and networking systems.

For engineers reviewing the SI5350C-B04470-GTR datasheet, SI5350C-B04470-GTR pinout, SI5350C-B04470-GTR application, or SI5350C-B04470-GTR equivalent, key selection criteria include its 4-output 16-QFN (3×3 mm) package, dual-reference capability (25/27 MHz XTAL or 10–100 MHz CLKIN), per-output spread spectrum control, glitchless frequency switching via FS_0/FS_1 pins, and configurable output drive strength and state (high/low/Hi-Z) on disable.

Technical Context

The SI5350C-B04470-GTR implements two independent PLLs (PLLA and PLLB) feeding eight programmable MultiSynth fractional dividers - though only four outputs are enabled in this 16-QFN variant. Each output (CLK0–CLK3) can be assigned to either PLL, enabling mixed synchronous (locked to CLKIN) and free-running (locked to XTAL) clock domains simultaneously.

Its pin-based configuration uses P0–P3 for real-time control of spread spectrum (SSEN), power-down (PDN), frequency select (FS_0/FS_1), and loss-of-lock status (LOLB). Output buffers support independent VDDO supplies (1.8/2.5/3.3 V) per group (VDDOA/B), allowing level translation and HCSL-compatible differential signaling when VDDOA/VDDOB = 2.5 V and INV function is enabled.

Key Specifications

Parameter	Value and Actual Design Meaning
Output count	4 independent CMOS clock outputs (CLK0–CLK3), configured at factory for specific frequencies
Frequency range	2.5 kHz to 200 MHz per output; only two unique frequencies >112.5 MHz allowed simultaneously
Period jitter	<70 ps pk-pk typical (measured with 4 outputs active, one per VDDO rail)
Reference inputs	25 MHz or 27 MHz crystal (XA/XB) and/or external 10–100 MHz clock (CLKIN)
Supply flexibility	Core VDD: 1.71–1.89 V / 2.25–2.75 V / 3.0–3.6 V; Output VDDO: independently selectable per group
Spread spectrum	Selectable per output (PLLA-referenced only): down-spread (–0.1% to –2.5%) or center-spread (±0.1% to ±1.5%) at 31.5 kHz modulation rate
Power consumption	21 mA typical (4 outputs enabled); 50 µA in power-down mode (PDN = high)

Pinout & Package

SI5350C-B04470-GTR is packaged in a 16-pin QFN (3 mm × 3 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks Rev. 1.2 datasheet Section 7.2 and Figure 4 (16-QFN block diagram).

Pin/Terminal	Circuit Role	Design Meaning
VDD	Core supply	1.71–3.6 V digital core power; must be powered before or concurrently with VDDOx
GND	Ground reference	Common return for core and output buffers; requires low-impedance connection to thermal pad
CLK0–CLK3	CMOS clock outputs	Configurable frequency, phase, drive strength, and disable state (Hi-Z/low/high)
VDDOA, VDDOB	Output buffer supplies	Independent 1.71–3.6 V rails for CLK0/CLK1 (VDDOA) and CLK2/CLK3 (VDDOB); set to 2.5 V for HCSL compatibility
XA, XB	Crystal oscillator inputs	Differential crystal interface for 25 or 27 MHz AT-cut crystal; internal load caps (0/6/8/10 pF) configurable
CLKIN	External reference input	Single-ended 10–100 MHz clock input; enables synchronous outputs locked to external source
P0–P3	Programmable control pins	Configured as SSEN, PDN, FS_0, FS_1, or LOLB per factory programming; no I²C interface

Key Features

Feature	Design Value
Dual PLL + MultiSynth architecture	Enables simultaneous free-running (XTAL-based) and synchronized (CLKIN-based) outputs with zero ppm frequency error
Glitchless frequency switching	FS_0/FS_1 pins toggle between two preconfigured frequencies per output (CLK0–CLK2) without clock interruption
HCSL-compatible outputs	When VDDOA/VDDOB = 2.5 V and INV enabled, CLK0/CLK1 or CLK2/CLK3 form differential pairs with 50 Ω output impedance
Per-output spread spectrum	Reduces EMI by modulating selected outputs at 31.5 kHz; configurable down-spread (–0.1% to –2.5%) or center-spread (±0.1% to ±1.5%)
Independent VDDO rails	VDDOA and VDDOB allow level translation across voltage domains (e.g., 1.8 V SoC + 3.3 V peripheral interfaces)
Low-power operation	21 mA typical supply current with 4 outputs active; drops to 50 µA in hardware power-down (PDN = high)

Applications

Audio/Video Timing	Networking PHY Clocking
Use Scenario: Generating precise, low-jitter clocks for HDMI video processors, audio DACs, and SPDIF transceivers in set-top boxes and Blu-ray players. IC Role / Device Role / Timing Role: Replaces multiple discrete XOs (e.g., 24.576 MHz, 27 MHz, 74.25 MHz) with a single programmable source, reducing BOM count and board area. Use Value: Delivers <70 ps pk-pk jitter and 0 ppm frequency accuracy to meet HDMI 2.0 and AES3 timing compliance without external filtering.	Use Scenario: Providing synchronized 125 MHz and 25 MHz clocks to Ethernet PHYs and MAC controllers in residential gateways and switches. IC Role / Device Role / Timing Role: Generates both free-running system clocks and CLKIN-locked PHY clocks in same device, eliminating inter-chip skew. Use Value: Enables deterministic phase alignment between MAC and PHY layers while supporting PCIe Gen 1 compliance via low-jitter outputs.
Printers & Scanners	Industrial Embedded Control
Use Scenario: Driving image sensor interfaces, motor control ICs, and USB 2.0 controllers in multifunction printers and document scanners. IC Role / Device Role / Timing Role: Supplies multiple non-integer-related clocks (e.g., 48 MHz USB, 28.322 MHz sensor, 54 MHz motor driver) from one IC. Use Value: Eliminates crystal placement constraints and reduces EMI through per-output spread spectrum, easing FCC Class B certification.	Use Scenario: Providing stable, reconfigurable clocks for FPGA fabric, ADC sampling, and communication peripherals in programmable logic controllers. IC Role / Device Role / Timing Role: Acts as central timing hub with hardware-configurable outputs (FS_0/FS_1) for dynamic clock rate changes during mode transitions. Use Value: Supports glitchless frequency switching between operational modes (e.g., idle → high-speed acquisition) without firmware intervention.

Audio/Video Timing

Networking PHY Clocking

Use Scenario: Generating precise, low-jitter clocks for HDMI video processors, audio DACs, and SPDIF transceivers in set-top boxes and Blu-ray players.

IC Role / Device Role / Timing Role: Replaces multiple discrete XOs (e.g., 24.576 MHz, 27 MHz, 74.25 MHz) with a single programmable source, reducing BOM count and board area.

Use Value: Delivers <70 ps pk-pk jitter and 0 ppm frequency accuracy to meet HDMI 2.0 and AES3 timing compliance without external filtering.

Use Scenario: Providing synchronized 125 MHz and 25 MHz clocks to Ethernet PHYs and MAC controllers in residential gateways and switches.

IC Role / Device Role / Timing Role: Generates both free-running system clocks and CLKIN-locked PHY clocks in same device, eliminating inter-chip skew.

Use Value: Enables deterministic phase alignment between MAC and PHY layers while supporting PCIe Gen 1 compliance via low-jitter outputs.

Printers & Scanners

Industrial Embedded Control

Use Scenario: Driving image sensor interfaces, motor control ICs, and USB 2.0 controllers in multifunction printers and document scanners.

IC Role / Device Role / Timing Role: Supplies multiple non-integer-related clocks (e.g., 48 MHz USB, 28.322 MHz sensor, 54 MHz motor driver) from one IC.

Use Value: Eliminates crystal placement constraints and reduces EMI through per-output spread spectrum, easing FCC Class B certification.

Use Scenario: Providing stable, reconfigurable clocks for FPGA fabric, ADC sampling, and communication peripherals in programmable logic controllers.

IC Role / Device Role / Timing Role: Acts as central timing hub with hardware-configurable outputs (FS_0/FS_1) for dynamic clock rate changes during mode transitions.

Use Value: Supports glitchless frequency switching between operational modes (e.g., idle → high-speed acquisition) without firmware intervention.

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5350A-B-GM1	3-output variant in 10-MSOP; supports only XTAL reference (no CLKIN); no HCSL support	Suitable for simpler 3-clock systems without external sync requirements or differential signaling	Choose when board space allows MSOP and only 3 clocks + XTAL-only operation are needed
Si5351C-B-GM1	I²C-programmable (not factory-pin-configured); supports CLKIN + XTAL; 4-output 16-QFN package	Required where runtime reconfiguration or dynamic frequency updates are needed	Choose when firmware control over clock parameters is mandatory, not just hardware pin selection

Compared with SI5350C-B04470-GTR, Si5350A-B-GM1 offers lower pin count and cost but lacks CLKIN synchronization and HCSL; Si5351C-B-GM1 adds I²C flexibility at the expense of deterministic startup and higher software overhead.

Availability

SI5350C-B04470-GTR is available at Aetrix Electronics and suitable for audio/video equipment, networking PHY interfaces, and industrial embedded control systems requiring stable component supply, guaranteed factory programming, and long-term lifecycle support.

Supply support for SI5350C-B04470-GTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and power management technologies.

The SI5350C-B04470-GTR belongs to Skyworks' Si5350 family of factory-programmable clock generators, designed to replace multiple discrete timing components in space-constrained, low-power, and EMI-sensitive applications such as consumer AV, networking, and industrial control.

FAQ

What reference sources does the SI5350C-B04470-GTR support?

The SI5350C-B04470-GTR supports two reference sources: a 25 MHz or 27 MHz crystal connected to XA/XB pins, and/or an external 10–100 MHz clock applied to the CLKIN pin. Both can be used simultaneously-XTAL for free-running outputs and CLKIN for synchronized outputs. The SI5350C-B04470-GTR is factory-programmed to use both references per its specific configuration.

Does the SI5350C-B04470-GTR support HCSL output signaling?

Yes, the SI5350C-B04470-GTR supports HCSL-compatible outputs when VDDOA or VDDOB is set to 2.5 V and the INV function is enabled for one clock in a pair (e.g., CLK0/CLK1). This generates a differential signal with 50 Ω output impedance, meeting HCSL voltage swing requirements. This feature is confirmed for the 16-QFN package in the official datasheet.

How many unique frequencies above 112.5 MHz can the SI5350C-B04470-GTR generate simultaneously?

The SI5350C-B04470-GTR can generate only two unique frequencies above 112.5 MHz at the same time-for example, 125 MHz on CLK0 and 130 MHz on CLK1. Additional outputs above 112.5 MHz must duplicate one of those two frequencies. This limitation is specified in Table 7 of the SI5350C-B datasheet and applies to all package variants including the SI5350C-B04470-GTR.

What is the power-down current of the SI5350C-B04470-GTR?

In power-down mode (PDN pin held high), the SI5350C-B04470-GTR draws ≤50 µA, as specified in Table 4 (DC Characteristics) of the Skyworks datasheet. This ultra-low standby current enables rapid wake-up while minimizing system-level power loss during idle periods. The SI5350C-B04470-GTR resumes full operation within 1 ms after PDN is de-asserted.

Can the SI5350C-B04470-GTR generate spread spectrum on all four outputs?

Spread spectrum is supported only on outputs referenced to PLLA-not PLLB-and is configurable per output. The SI5350C-B04470-GTR can apply spread spectrum to any subset of its four outputs (CLK0–CLK3), provided they are PLLA-sourced. Outputs locked to CLKIN via PLLB cannot use spread spectrum, and applying it to such outputs has no effect.

SI5350C-B04470-GTR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: -

Package/Case:: 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

Type:: -

PLL:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Divider/Multiplier:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 10-MSOP

SI5350C-B04470-GTR FAQ

1.How can I place an order for SI5350C-B04470-GTR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5350C-B04470-GTR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5350C-B04470-GTR reliable?

The price and inventory of SI5350C-B04470-GTR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5350C-B04470-GTR is usually 5 days.

3.What payment methods are accepted for SI5350C-B04470-GTR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5350C-B04470-GTR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5350C-B04470-GTR?

SI5350C-B04470-GTR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5350C-B04470-GTR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5350C-B04470-GTR?

For technical support, including SI5350C-B04470-GTR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5350C-B04470-GTR requirements.

6.How does Aetrix verify that SI5350C-B04470-GTR is sourced from the original manufacturer or authorized distributors?

All SI5350C-B04470-GTR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5350C-B04470-GTR meets industry standards.

7.What is the process for return or replacement of SI5350C-B04470-GTR?

All SI5350C-B04470-GTR units undergo pre-shipment inspection (PSI). If there is an issue with SI5350C-B04470-GTR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5350C-B04470-GTR part is unused and in its original packaging.

Return procedure for SI5350C-B04470-GTR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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