Skyworks Solutions Inc. SI5350C-B04509-GTR
- Part No.:
- SI5350C-B04509-GTR
- Manufacturer:
- Skyworks Solutions Inc.
- Package:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
SI5350C-B04509-GTR.pdf
- Description:
- IC ANY FREQ ANY OUT REF C 10MSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SI5350C-B04509-GTR from Skyworks Solutions is a factory-programmed, pin-controlled CMOS clock generator with dual PLL + MultiSynth fractional synthesis architecture. It delivers up to 4 independent, non-integer-related output frequencies from 2.5 kHz to 200 MHz, supports 25/27 MHz crystal or 10–100 MHz CLKIN reference, and operates with core/output supply voltages independently selectable at 1.8 V, 2.5 V, or 3.3 V. It replaces multiple crystals, XOs, and PLLs in compact timing subsystems such as residential gateways and audio/video equipment.
For engineers reviewing the SI5350C-B04509-GTR datasheet, SI5350C-B04509-GTR pinout, SI5350C-B04509-GTR application, or SI5350C-B04509-GTR equivalent, key selection considerations include its 4-output 16-QFN (3×3 mm) package, glitchless frequency switching via FS_0/FS_1 pins, HCSL-compatible swing capability at 2.5 V VDDO, spread spectrum control per output, and support for static phase offset - all critical for EMI-sensitive, multi-clock domain designs.
Technical Context
The SI5350C-B04509-GTR implements a dual-loop PLL architecture where PLLA and PLLB each drive dedicated MultiSynth fractional dividers, enabling independent frequency synthesis on each of its four outputs. Each output (CLK0–CLK3) can be assigned to either PLL, allowing mixed free-running (crystal-referenced) and synchronous (CLKIN-referenced) clock domains within one device.
It uses programmable control pins (P0–P3) to configure spread spectrum enable (SSEN), power-down (PDN), and dual-frequency selection (FS_0/FS_1) without I²C. The device accepts a 25 MHz or 27 MHz fundamental-mode AT-cut crystal on XA/XB or an external 10–100 MHz clock on CLKIN, with internal load capacitance options (0/6/8/10 pF) eliminating external XTAL capacitors in most cases.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output count | 4 independent CMOS clock outputs (CLK0–CLK3), configured at factory for specific frequencies |
| Frequency range | 2.5 kHz to 200 MHz per output; only two unique frequencies >112.5 MHz allowed simultaneously |
| Reference inputs | 25 MHz or 27 MHz crystal (XA/XB) OR 10–100 MHz single-ended clock (CLKIN) |
| Core supply (VDD) | 1.71–1.89 V / 2.25–2.75 V / 3.0–3.6 V - supports mixed-voltage system integration |
| Output supply (VDDO) | Independent 1.71–1.89 V / 2.25–2.75 V / 3.0–3.6 V per output group - enables level translation |
| Period jitter | <70 ps pk-pk typical (16-QFN, 4 outputs active, 1 per VDDO rail) - meets PCIe Gen1 jitter requirements |
| Spread spectrum | Selectable per output: down-spread (–0.1% to –2.5%) or center-spread (±0.1% to ±1.5%) at 30–33 kHz modulation rate |
Pinout & Package
SI5350C-B04509-GTR is housed in a 16-pin QFN package (3 mm × 3 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks Rev. 1.2 datasheet Section 7.2.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND | Ground reference | Common return for core, outputs, and control logic; requires low-inductance connection to PCB ground plane |
| VDD | Core supply | Supplies internal PLLs, logic, and MultiSynths; must be powered before or concurrently with VDDO rails |
| VDDOA, VDDOB | Output buffer supplies | VDDOA powers CLK0/CLK1; VDDOB powers CLK2/CLK3 - enables independent voltage level setting per pair |
| CLK0–CLK3 | CMOS clock outputs | Configurable rise/fall time, duty cycle (45–55%), and invert/non-invert; support HCSL swing when VDDO = 2.5 V |
| XA, XB | Crystal oscillator inputs | Differential input for 25/27 MHz fundamental-mode AT-cut crystal; internal load caps configurable via ClockBuilder Pro |
| CLKIN | External reference input | Single-ended 10–100 MHz clock input; used for synchronous outputs locked to external source |
| P0–P3 | Programmable control pins | Factory-configured as SSEN, PDN, FS_0, FS_1 - enable spread spectrum disable, full power-down, and glitchless dual-frequency switching |
Key Features
| Feature | Design Value |
|---|---|
| Dual PLL + MultiSynth architecture | Enables simultaneous free-running (XTAL-based) and synchronized (CLKIN-based) clocks on same device without external components |
| Glitchless frequency switching | FS_0/FS_1 pins change output frequency (F1_x/F2_x) with zero-cycle glitches - essential for dynamic clock scaling in media processors |
| HCSL-compatible output swing | Configurable via 2.5 V VDDO and external 511 Ω/240 Ω termination - supports PCIe Gen1 and SATA differential clocking without external drivers |
| Per-output spread spectrum | Reduces EMI peak amplitude by modulating individual clock frequencies - avoids system-level redesign when failing radiated emissions tests |
| Static phase offset control | Allows precise inter-output phase alignment (e.g., 90° between CLK0/CLK1) - critical for sampling clock synchronization in ADC/DAC systems |
| Low-power operation | 21 mA typical core current with 4 outputs enabled - reduces thermal load in space-constrained residential gateway and set-top box designs |
Applications
| Residential Gateway Timing | Audio/Video Processor Clocking |
|---|---|
Use Scenario: Single-chip timing solution for DOCSIS 3.1/4.0 gateways requiring Ethernet PHY, USB 3.0, and MoCA clock domains. IC Role / Device Role / Timing Role: Generates 125 MHz (Ethernet), 48 MHz (USB), and 28.322 MHz (MoCA) from one 25 MHz crystal - replacing three discrete oscillators. Use Value: Reduces BOM count, board area, and EMI risk while enabling synchronized clock domain switching during sleep/wake transitions. |
Use Scenario: Clock source for HDMI transmitter, audio codec, and video decoder in Blu-ray players and streaming boxes. IC Role / Device Role / Timing Role: Delivers 74.25 MHz (HDMI), 24.576 MHz (audio), and 48 MHz (system bus) with <70 ps period jitter - meeting HDMI 2.0 and AES3 jitter specs. Use Value: Eliminates timing skew between video and audio paths, preventing lip-sync errors and frame drops during high-bitrate playback. |
| Network Attached Storage (NAS) | Industrial Print Controller |
Use Scenario: Multi-protocol storage controller supporting SATA, USB 3.0, and Gigabit Ethernet interfaces. IC Role / Device Role / Timing Role: Provides 150 MHz (SATA), 48 MHz (USB), and 125 MHz (Ethernet) with independent spread spectrum on SATA clock to pass FCC Class B emissions. Use Value: Avoids costly metal shielding and layout rework by integrating EMI mitigation directly into the clock generator. |
Use Scenario: Precision motion control and raster image processing in high-speed label printers and wide-format plotters. IC Role / Device Role / Timing Role: Generates 33.333 MHz (motor encoder), 27 MHz (FPGA fabric), and 28.322 MHz (image sensor interface) with static phase offset between encoder and sensor clocks. Use Value: Enables sub-micron print registration accuracy by aligning edge-triggered events across mechanical and imaging subsystems. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar clock generator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si5350A-B-GM1 | 3-output variant (10-MSOP); crystal-only reference (no CLKIN support); no HCSL compatibility | Suitable only for simpler, crystal-dependent 3-clock systems - cannot replace SI5350C-B04509-GTR in 4-output or CLKIN-synchronized designs | Select only if design requires exactly 3 outputs, no external reference, and no HCSL drive - otherwise insufficient feature set. |
| Si5351C-B-GM1 | I²C-programmable (not factory-programmed); supports CLKIN + crystal; 4-output 16-QFN package | Requires runtime configuration and firmware overhead; lacks pin-controlled FS/SSEN/PDN - unsuitable for boot-critical or I²C-less systems | Choose when field-upgradable frequency plans or dynamic reconfiguration are required - not for fixed, pin-strapped timing solutions. |
Compared with SI5350C-B04509-GTR, Si5350A-B-GM1 offers lower channel count and no CLKIN flexibility, while Si5351C-B-GM1 trades factory programming for I²C configurability - making SI5350C-B04509-GTR optimal for production-ready, pin-controlled, 4-output timing with mixed-reference support.
Availability
SI5350C-B04509-GTR is available at Aetrix Electronics and suitable for residential gateways, audio/video processors, and network-attached storage systems requiring stable component supply, long-term lifecycle assurance, and guaranteed factory-programmed configurations.
Supply support for SI5350C-B04509-GTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and power management ICs.
The Si5350C family is designed for high-density, low-EMI clock generation in consumer, networking, and computing applications - delivering customizable multi-frequency timing from a single chip to replace discrete oscillators and PLLs.
FAQ
What reference sources does the SI5350C-B04509-GTR support?
The SI5350C-B04509-GTR supports two reference sources: a 25 MHz or 27 MHz fundamental-mode AT-cut crystal connected to XA/XB pins, or a single-ended 10–100 MHz clock applied to the CLKIN pin. It cannot use both simultaneously for different outputs - each output is assigned to either the crystal-derived PLL or the CLKIN-derived PLL during factory programming. The SI5350C-B04509-GTR does not support voltage-controlled crystal oscillator (VCXO) or temperature-compensated (TCXO) references.
Does the SI5350C-B04509-GTR support HCSL output levels?
Yes, the SI5350C-B04509-GTR supports HCSL-compatible swing when the corresponding VDDO rail (VDDOA for CLK0/CLK1, VDDOB for CLK2/CLK3) is set to 2.5 V and external 511 Ω pull-down and 240 Ω series resistors are used per output pair. This capability is confirmed for the 16-QFN package and enables direct interface with PCIe Gen1 and SATA receivers without additional level-shifting circuitry - a feature not available in the 3-output MSOP variant.
How many unique high-frequency outputs can the SI5350C-B04509-GTR generate above 112.5 MHz?
The SI5350C-B04509-GTR can generate no more than two unique frequencies above 112.5 MHz simultaneously across its four outputs. For example, it may deliver 125 MHz on CLK0 and 130 MHz on CLK1, but cannot also output 150 MHz on CLK2. However, duplicate frequencies above 112.5 MHz are permitted - e.g., 125 MHz on both CLK0 and CLK1 is allowed. This limitation is inherent to the MultiSynth fractional divider architecture and applies regardless of reference source.
What is the power consumption of the SI5350C-B04509-GTR under typical operating conditions?
The SI5350C-B04509-GTR draws 21 mA typical core supply current (IDD) when all four outputs are enabled, measured at nominal VDD (1.8 V, 2.5 V, or 3.3 V) and 25 °C ambient. Power-down mode reduces current to ≤50 µA when the PDN pin is asserted high. Output buffer current is 2.2–5.6 mA per output (IDDOx) depending on load and frequency, with total system current scaling linearly with active outputs and VDDO voltage - enabling accurate power budgeting for battery-backed or thermally constrained designs.
Can the SI5350C-B04509-GTR perform glitchless frequency switching?
Yes, the SI5350C-B04509-GTR supports glitchless frequency switching on outputs CLK0–CLK2 using the factory-configured FS_0 and FS_1 pins. Each of these outputs is programmed with two frequencies (F1_x and F2_x), and asserting the appropriate combination of FS pins selects between them with zero-cycle timing disruption. This behavior is hardware-automated and requires no I²C interaction or software intervention - making SI5350C-B04509-GTR ideal for real-time systems like audio processors that must switch sample rates without audible artifacts.
SI5350C-B04509-GTR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- -
- Package/Case:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- -
- PLL:
- -
- Input:
- -
- Output:
- -
- Number of Circuits:
- -
- Ratio - Input:Output:
- -
- Differential - Input:Output:
- -
- Frequency - Max:
- -
- Divider/Multiplier:
- -
- Voltage - Supply:
- -
- Operating Temperature:
- -
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 10-MSOP
SI5350C-B04509-GTR FAQ
1.How can I place an order for SI5350C-B04509-GTR through Aetrix?
Please submit a Request for Quotation (RFQ) for SI5350C-B04509-GTR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI5350C-B04509-GTR reliable?
The price and inventory of SI5350C-B04509-GTR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5350C-B04509-GTR is usually 5 days.
3.What payment methods are accepted for SI5350C-B04509-GTR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5350C-B04509-GTR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI5350C-B04509-GTR?
SI5350C-B04509-GTR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI5350C-B04509-GTR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI5350C-B04509-GTR?
For technical support, including SI5350C-B04509-GTR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5350C-B04509-GTR requirements.
6.How does Aetrix verify that SI5350C-B04509-GTR is sourced from the original manufacturer or authorized distributors?
All SI5350C-B04509-GTR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5350C-B04509-GTR meets industry standards.
7.What is the process for return or replacement of SI5350C-B04509-GTR?
All SI5350C-B04509-GTR units undergo pre-shipment inspection (PSI). If there is an issue with SI5350C-B04509-GTR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI5350C-B04509-GTR part is unused and in its original packaging.
Return procedure for SI5350C-B04509-GTR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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