Skyworks Solutions Inc. SI5350C-B04728-GTR

Overview

SI5350C-B04728-GTR from Skyworks Solutions is a factory-programmed, pin-controlled CMOS clock generator with dual PLL + MultiSynth fractional synthesis architecture. It delivers up to 4 independent, non-integer-related output frequencies (2.5 kHz–200 MHz) with 0 ppm frequency error, <70 ps pk-pk period jitter (typ), and configurable spread spectrum per output-used in networking equipment, audio/video systems, and PCIe Gen 1-compliant server timing.

For engineers reviewing the SI5350C-B04728-GTR datasheet, SI5350C-B04728-GTR pinout, SI5350C-B04728-GTR application, or SI5350C-B04728-GTR equivalent, key selection criteria include its 16-QFN package with 4 outputs, support for 25/27 MHz crystal or 10–100 MHz CLKIN reference, independent VDD/VDDO voltage scaling (1.8/2.5/3.3 V), and glitchless frequency switching via FS_0/FS_1 pins.

Technical Context

The SI5350C-B04728-GTR implements a dual-loop PLL architecture: PLLA supports spread-spectrum-enabled outputs and high-resolution fractional synthesis, while PLLB provides low-jitter synchronous outputs locked to CLKIN. Each of its four outputs (CLK0–CLK3) is driven by an independent MultiSynth divider with selectable reference (PLLA or PLLB) and dual-frequency capability (F1_x/F2_x).

It accepts either a 25 MHz or 27 MHz fundamental-mode AT-cut crystal (XA/XB) or an external 10–100 MHz clock on CLKIN. Output buffers support HCSL-compatible swing when VDDO = 2.5 V and are configurable for rise/fall time, invert/non-invert, and disable state (high/low/high-Z), with dedicated control pins (P0–P3) for SSEN, PDN, and FS_0/FS_1.

Key Specifications

Pinout & Package

SI5350C-B04728-GTR is housed in a 16-pin QFN package (3 mm × 3 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks Rev. 1.2 datasheet Section 7.2.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Compared with SI5350C-B04728-GTR, Si5350A-B-GM1 lacks CLKIN and spread spectrum-limiting use to basic XO replacement-while Si5351C-B-GM1 trades factory simplicity for I²C flexibility, increasing software overhead but enabling adaptive timing.

Availability

SI5350C-B04728-GTR is available at Aetrix Electronics and suitable for networking equipment, audio/video systems, and server timing applications requiring stable component supply, long-term lifecycle support, and guaranteed factory programming.

Supply support for SI5350C-B04728-GTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and precision analog technologies.

The SI5350C-B04728-GTR belongs to Skyworks' Si535x clock generator family, designed specifically for replacing multiple crystals, oscillators, and PLLs in space-constrained, cost-sensitive applications demanding high-frequency accuracy and low jitter.

FAQ

What reference sources does the SI5350C-B04728-GTR support?

The SI5350C-B04728-GTR supports either a 25 MHz or 27 MHz fundamental-mode AT-cut crystal connected to XA/XB pins, or a single-ended 10–100 MHz clock applied to the CLKIN pin. It cannot accept both simultaneously-the configuration is fixed at factory programming. SI5350C-B04728-GTR uses the selected reference to drive its dual PLL architecture for precise output synthesis.

How many output frequencies can the SI5350C-B04728-GTR generate simultaneously above 112.5 MHz?

The SI5350C-B04728-GTR supports only two unique frequencies above 112.5 MHz at any time-for example, 125 MHz and 130 MHz-but allows duplication (e.g., 125 MHz on CLK0 and CLK1). This constraint arises from internal MultiSynth resource allocation. SI5350C-B04728-GTR's datasheet specifies this limit explicitly in Table 7's frequency range note.

Does the SI5350C-B04728-GTR support HCSL-compatible outputs?

Yes, SI5350C-B04728-GTR supports HCSL-compatible swing on CLK0/CLK1 (when VDDOA = 2.5 V) or CLK2/CLK3 (when VDDOB = 2.5 V), provided the device is in 10-MSOP or 20-QFN package. The 16-QFN variant (SI5350C-B04728-GTR) supports this feature only when using external termination networks per Figure 3 in the datasheet.

What is the power-down current of the SI5350C-B04728-GTR?

The SI5350C-B04728-GTR draws ≤50 µA in power-down mode when the PDN pin is driven high. This state disables all internal circuitry-including PLLs, MultiSynths, and output buffers-while retaining factory configuration. SI5350C-B04728-GTR resumes full operation within 1 ms after PDN returns low, per Table 5's TBYP specification.

Can the SI5350C-B04728-GTR generate glitchless frequency transitions?

Yes, SI5350C-B04728-GTR enables glitchless frequency changes on CLK0–CLK2 via the FS_0 and FS_1 pins, which select between two preprogrammed frequencies (F1_x/F2_x) per output. This occurs without cycle skipping or phase discontinuity because the MultiSynth divider recalculates on-the-fly under PLL lock. SI5350C-B04728-GTR guarantees this behavior per its functional description in Section 5.