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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Clock Generators, PLLs, Frequency Synthesizers

Skyworks Solutions Inc. SI5350C-B05479-GTR

Name: SI5350C-B05479-GTR
Brand: Skyworks Solutions Inc.
SKU: SI5350C-B05479-GTR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5350C-B05479-GTR

Manufacturer:: Skyworks Solutions Inc.

Category:: Clock Generators, PLLs, Frequency Synthesizers

Package:: 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)

Datasheet:: SI5350C-B05479-GTR.pdf

Description:: IC ANY FREQ ANY OUT REF C 10MSOP

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Product details

Overview

SI5350C-B05479-GTR from Skyworks Solutions is a factory-programmed, pin-controlled CMOS clock generator with dual PLL + MultiSynth fractional synthesis architecture. It delivers up to 4 independent, non-integer-related output frequencies (2.5 kHz–200 MHz) with 0 ppm frequency error, <70 ps pk-pk period jitter, and configurable spread spectrum-used in PCIe Gen 1-compliant networking and audio/video timing systems.

For engineers reviewing the SI5350C-B05479-GTR datasheet, SI5350C-B05479-GTR pinout, SI5350C-B05479-GTR application, or SI5350C-B05479-GTR equivalent, key selection considerations include its 16-QFN (3×3 mm) 4-output package, CLKIN/XTAL dual-reference support (10–100 MHz / 25 or 27 MHz), independent VDD/VDDO voltage scaling (1.8/2.5/3.3 V), and glitchless frequency switching via FS_0/FS_1 pins.

Technical Context

The SI5350C-B05479-GTR implements a dual-loop PLL architecture: PLLA supports spread-spectrum outputs and high-resolution fractional synthesis, while PLLB enables low-jitter synchronous clocks locked to CLKIN. Each of its four outputs (CLK0–CLK3) maps to a dedicated MultiSynth divider with independently configurable reference source (PLLA or PLLB), frequency, drive strength, and invert/non-invert state.

It accepts either a 25 MHz or 27 MHz fundamental-mode crystal on XA/XB or an external 10–100 MHz clock on CLKIN. Output buffers feature programmable rise/fall time control, HCSL-compatible swing at 2.5 V VDDO, and per-output enable (OEB_0/OEB_1/OEB_2), power-down (PDN), and spread-spectrum enable (SSEN) logic-level control pins.

Key Specifications

Parameter	Value and Actual Design Meaning
Output count	4 independent CMOS clock outputs (CLK0–CLK3), each configurable for free-running or synchronized operation
Frequency range	2.5 kHz to 200 MHz per output; only two unique frequencies >112.5 MHz allowed simultaneously
Period jitter	<70 ps pk-pk typical (measured across 10k cycles, all outputs active, default 50 Ω drive)
Reference inputs	Supports 25 MHz or 27 MHz crystal (XA/XB) OR 10–100 MHz external clock (CLKIN); both may be used concurrently
Supply flexibility	Separate core (VDD: 1.71–3.6 V) and output (VDDOx: 1.71–3.6 V) rails enable level translation between logic domains
Control interface	Pin-strapped configuration only (no I²C); includes FS_0/FS_1 for glitchless dual-frequency selection on CLK0–CLK2
EMI reduction	Programmable down-spread (–0.1% to –2.5%) or center-spread (±0.1% to ±1.5%) modulation at 30–33 kHz on PLLA-referenced outputs

Pinout & Package

SI5350C-B05479-GTR is housed in a RoHS-compliant, lead-free 16-pin QFN package (3 mm × 3 mm, 0.5 mm pitch, exposed thermal pad). The package supports reflow soldering per JEDEC J-STD-020 and provides optimized thermal performance (θJA = 65 °C/W on 4-layer board).

Pin	Circuit Role	Design Meaning
1 (GND)	Ground reference	Primary analog/digital ground return; must connect to exposed thermal pad
2 (CLK0)	Output clock 0	CMOS output; configurable frequency, phase, drive strength, and invert state
3 (VDDOA)	Output supply A	Provides voltage for CLK0/CLK1 buffers (1.71–3.6 V); enables level translation
4 (CLK1)	Output clock 1	CMOS output; supports glitchless dual-frequency selection via FS_0/FS_1
5 (P0)	Programmable control pin 0	Configurable as SSEN (spread spectrum enable) or OEB_0 (output enable for CLK0)
6 (P1)	Programmable control pin 1	Configurable as PDN (power-down) or OEB_1 (output enable for CLK1)
7 (P2)	Programmable control pin 2	Configurable as FS_0 (frequency select 0) or OEB_2 (output enable for CLK2)
8 (P3)	Programmable control pin 3	Configurable as FS_1 (frequency select 1) or LOLB (loss-of-lock status indicator)
9 (VDD)	Core supply	1.71–3.6 V digital core rail; must power up before or simultaneously with all VDDOx
10 (CLKIN)	External reference input	Accepts 10–100 MHz single-ended clock; used for synchronous outputs locked to external source
11 (XA)	Crystal input A	Connects to one terminal of 25/27 MHz AT-cut crystal; internal load capacitance selectable (0/6/8/10 pF)
12 (XB)	Crystal input B	Connects to second crystal terminal; floats when CLKIN is used as primary reference
13 (CLK2)	Output clock 2	CMOS output; supports dual-frequency selection and independent VDDOB supply
14 (VDDOB)	Output supply B	Provides voltage for CLK2/CLK3 buffers; independent of VDDOA and VDD
15 (CLK3)	Output clock 3	CMOS output; supports HCSL-compatible swing when VDDOB = 2.5 V
16 (GND)	Ground reference	Secondary ground connection; ties to exposed thermal pad and system GND plane

Key Features

Feature	Design Value
Dual PLL + MultiSynth fractional synthesis	Enables simultaneous generation of up to 4 non-integer-related frequencies with 0 ppm error relative to reference
Glitchless frequency switching	FS_0/FS_1 pins allow real-time, zero-cycle interruption switching between two preconfigured frequencies on CLK0–CLK2
HCSL-compatible output mode	VDDOB = 2.5 V enables CLK2/CLK3 to drive HCSL loads (50 Ω termination) without external components
Independent VDD/VDDO rails	Allows mixed-voltage system integration: e.g., 1.8 V core + 3.3 V I/O or 2.5 V HCSL outputs
Low-power operation	21 mA typical supply current with 4 outputs enabled; 50 µA in power-down mode (PDN = high)
Spread spectrum modulation	Configurable down-spread or center-spread profiles (0.1%–2.5%) reduce EMI peak emissions by spreading energy across bandwidth

Applications

Networking Switch Timing	Audio/Video Clock Synthesis
Use Scenario: Generating precise, low-jitter clocks for Ethernet PHY, packet processor, and SerDes interfaces in residential gateways and small-form-factor switches. IC Role / Device Role / Timing Role: Primary clock generator providing synchronous 125 MHz (PHY), 25 MHz (CPU), and 24.576 MHz (audio codec) from a single 25 MHz crystal reference. Use Value: Replaces three discrete oscillators, reduces PCB area by >60%, and eliminates inter-clock skew through common PLL source.	Use Scenario: Delivering multiple synchronized sample-rate clocks (e.g., 44.1 kHz, 48 kHz, 96 kHz) and video pixel clocks (74.25 MHz, 148.5 MHz) in Blu-ray players and AV receivers. IC Role / Device Role / Timing Role: Factory-configured clock source generating exact frequencies required by HDMI transmitter, SPDIF transceiver, and video DAC subsystems. Use Value: Eliminates need for separate crystal oscillators per domain, ensures zero ppm inter-channel drift, and supports dynamic format switching via FS pins.
PCIe Gen 1 Endpoint Clocking	Industrial Embedded Control
Use Scenario: Providing 100 MHz reference clock and 25 MHz auxiliary clock to PCIe endpoint devices (e.g., NVMe controllers, FPGA-based accelerators) in compact edge servers. IC Role / Device Role / Timing Role: PCIe Gen 1-compliant clock generator delivering sub-70 ps jitter clocks traceable to a single crystal, meeting PCI-SIG jitter compliance requirements. Use Value: Guarantees link stability without requiring external jitter cleaners; simplifies layout by removing multiple clock traces and decoupling networks.	Use Scenario: Supplying timing signals to microcontroller peripherals (UART, SPI, ADC), display drivers, and sensor interfaces in programmable logic controllers and HMI panels. IC Role / Device Role / Timing Role: Low-power, factory-programmed timing hub enabling flexible clock distribution across heterogeneous voltage domains (1.8 V MCU core, 3.3 V I/O, 2.5 V display interface). Use Value: Reduces BOM count by consolidating clocks, improves system reliability via single-point timing control, and supports firmware-upgradeable configurations via ClockBuilder Pro.

Networking Switch Timing

Audio/Video Clock Synthesis

Use Scenario: Generating precise, low-jitter clocks for Ethernet PHY, packet processor, and SerDes interfaces in residential gateways and small-form-factor switches.

IC Role / Device Role / Timing Role: Primary clock generator providing synchronous 125 MHz (PHY), 25 MHz (CPU), and 24.576 MHz (audio codec) from a single 25 MHz crystal reference.

Use Value: Replaces three discrete oscillators, reduces PCB area by >60%, and eliminates inter-clock skew through common PLL source.

Use Scenario: Delivering multiple synchronized sample-rate clocks (e.g., 44.1 kHz, 48 kHz, 96 kHz) and video pixel clocks (74.25 MHz, 148.5 MHz) in Blu-ray players and AV receivers.

IC Role / Device Role / Timing Role: Factory-configured clock source generating exact frequencies required by HDMI transmitter, SPDIF transceiver, and video DAC subsystems.

Use Value: Eliminates need for separate crystal oscillators per domain, ensures zero ppm inter-channel drift, and supports dynamic format switching via FS pins.

PCIe Gen 1 Endpoint Clocking

Industrial Embedded Control

Use Scenario: Providing 100 MHz reference clock and 25 MHz auxiliary clock to PCIe endpoint devices (e.g., NVMe controllers, FPGA-based accelerators) in compact edge servers.

IC Role / Device Role / Timing Role: PCIe Gen 1-compliant clock generator delivering sub-70 ps jitter clocks traceable to a single crystal, meeting PCI-SIG jitter compliance requirements.

Use Value: Guarantees link stability without requiring external jitter cleaners; simplifies layout by removing multiple clock traces and decoupling networks.

Use Scenario: Supplying timing signals to microcontroller peripherals (UART, SPI, ADC), display drivers, and sensor interfaces in programmable logic controllers and HMI panels.

IC Role / Device Role / Timing Role: Low-power, factory-programmed timing hub enabling flexible clock distribution across heterogeneous voltage domains (1.8 V MCU core, 3.3 V I/O, 2.5 V display interface).

Use Value: Reduces BOM count by consolidating clocks, improves system reliability via single-point timing control, and supports firmware-upgradeable configurations via ClockBuilder Pro.

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5350A-B-GM1	Factory-programmed 4-output variant supporting XTAL-only reference (25/27 MHz), no CLKIN input capability	Limited to free-running clocks; unsuitable for systems requiring synchronization to external timing sources like PCIe REFCLK	Select when only crystal-referenced outputs are needed and external clock injection is unnecessary
Si5351C-B-GM1	I²C-programmable 4-output clock generator with XTAL + CLKIN dual-reference support, but higher typical period jitter (110 ps pk-pk)	Requires runtime I²C configuration; not suitable for boot-critical, pin-strapped timing where firmware initialization is unavailable	Select when field-upgradable frequency plans or dynamic reconfiguration are required, and jitter budget allows ≥110 ps

Compared with Si5350A-B-GM1 and Si5351C-B-GM1, SI5350C-B05479-GTR uniquely combines pin-strapped simplicity, dual-reference flexibility (XTAL + CLKIN), and sub-70 ps jitter-making it optimal for fixed-function, EMI-sensitive, and PCIe-timing-critical designs where deterministic startup and minimal jitter are mandatory.

Availability

SI5350C-B05479-GTR is available at Aetrix Electronics and suitable for networking switch timing, audio/video clock synthesis, and PCIe Gen 1 endpoint clocking requiring stable component supply, long-term lifecycle assurance, and factory-programmed repeatability.

Supply support for SI5350C-B05479-GTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global leader in analog and mixed-signal semiconductors, specializing in RF, mobile, infrastructure, and timing solutions with emphasis on performance, integration, and reliability.

The Si5350C-B product line delivers factory-programmed, pin-configurable clock generators targeting space-constrained, low-power, and EMI-sensitive applications including consumer AV equipment, networking gear, and industrial control systems.

FAQ

What reference sources does the SI5350C-B05479-GTR support?

The SI5350C-B05479-GTR supports two independent reference sources: a 25 MHz or 27 MHz fundamental-mode crystal connected to XA/XB pins, and/or an external 10–100 MHz single-ended clock applied to the CLKIN pin. Both may be used simultaneously-e.g., XTAL for free-running outputs and CLKIN for synchronous outputs-enabling multi-domain timing in a single device. SI5350C-B05479-GTR does not require both references to be active.

Can the SI5350C-B05479-GTR generate HCSL-compatible outputs?

Yes, the SI5350C-B05479-GTR can drive HCSL-compatible loads when configured with VDDOB = 2.5 V and using CLK2/CLK3 as a complementary pair (one inverted). This requires external 50 Ω termination resistors per output and is supported only in the 10-MSOP and 20-QFN packages-not the 16-QFN package of SI5350C-B05479-GTR. Therefore, HCSL operation is not available for SI5350C-B05479-GTR.

How many unique high-frequency outputs can the SI5350C-B05479-GTR deliver above 112.5 MHz?

The SI5350C-B05479-GTR supports only two unique frequencies above 112.5 MHz simultaneously across its four outputs. For example, it may generate 125 MHz on CLK0 and 130 MHz on CLK1-but cannot add a third distinct frequency such as 150 MHz on CLK2. However, duplicate frequencies above 112.5 MHz are permitted: 125 MHz could appear on all four outputs if required. This limitation is enforced by the MultiSynth architecture and applies to SI5350C-B05479-GTR specifically.

What is the power consumption of the SI5350C-B05479-GTR under typical operating conditions?

With all four outputs enabled and operating at typical conditions (VDD = 2.5 V, VDDO = 2.5 V, TA = 25 °C), the SI5350C-B05479-GTR draws 21 mA typical core supply current (IDD) and ≤5.6 mA per output buffer (IDDOx). Total typical supply current is approximately 26.6 mA. In power-down mode (PDN = high), supply current drops to ≤50 µA. These values are measured per Table 4 in the official Skyworks datasheet for SI5350C-B05479-GTR.

Does the SI5350C-B05479-GTR support spread spectrum on all outputs?

No, spread spectrum is only available on outputs referenced to PLLA-not PLLB. Since SI5350C-B05479-GTR allows per-output selection of PLL reference (PLLA or PLLB), spread spectrum can be enabled only on those outputs assigned to PLLA. Outputs synchronized to CLKIN via PLLB cannot use spread spectrum. Additionally, if CLKIN itself carries spread spectrum, it propagates to PLLB outputs-but configuring spread spectrum on those outputs is prohibited and may cause instability. SI5350C-B05479-GTR enforces this restriction in hardware.

SI5350C-B05479-GTR Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: -

Package/Case:: 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

Type:: -

PLL:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Divider/Multiplier:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 10-MSOP

SI5350C-B05479-GTR FAQ

1.How can I place an order for SI5350C-B05479-GTR through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5350C-B05479-GTR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5350C-B05479-GTR reliable?

The price and inventory of SI5350C-B05479-GTR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5350C-B05479-GTR is usually 5 days.

3.What payment methods are accepted for SI5350C-B05479-GTR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5350C-B05479-GTR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5350C-B05479-GTR?

SI5350C-B05479-GTR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5350C-B05479-GTR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5350C-B05479-GTR?

For technical support, including SI5350C-B05479-GTR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5350C-B05479-GTR requirements.

6.How does Aetrix verify that SI5350C-B05479-GTR is sourced from the original manufacturer or authorized distributors?

All SI5350C-B05479-GTR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5350C-B05479-GTR meets industry standards.

7.What is the process for return or replacement of SI5350C-B05479-GTR?

All SI5350C-B05479-GTR units undergo pre-shipment inspection (PSI). If there is an issue with SI5350C-B05479-GTR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5350C-B05479-GTR part is unused and in its original packaging.

Return procedure for SI5350C-B05479-GTR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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