Skyworks Solutions Inc. SI5350C-B06408-GTR

Overview

SI5350C-B06408-GTR from Skyworks Solutions is a factory-programmed, pin-controlled CMOS clock generator with dual PLL + MultiSynth fractional synthesis architecture. It delivers up to 8 non-integer-related output frequencies (2.5 kHz–200 MHz) with 0 ppm frequency error, <70 ps pk-pk period jitter (typ), and independent VDD/VDDO supply rails (1.8/2.5/3.3 V). It replaces multiple crystals, XOs, and PLLs in compact timing-critical systems such as residential gateways and audio/video equipment.

For engineers reviewing the SI5350C-B06408-GTR datasheet, SI5350C-B06408-GTR pinout, SI5350C-B06408-GTR application, or SI5350C-B06408-GTR equivalent, key selection considerations include its 20-QFN (4×4 mm) 8-output package, factory-programmed configuration for CLKIN + XTAL reference support, HCSL-compatible swing capability at 2.5 V VDDO, and glitchless frequency switching via FS_0/FS_1 pins.

Technical Context

The SI5350C-B06408-GTR implements a dual-loop PLL architecture: PLLA supports spread spectrum and high-resolution fractional synthesis for outputs referenced to XTAL or CLKIN; PLLB provides low-jitter free-running or synchronized clocks without spread spectrum. Each of its eight outputs (CLK0–CLK7) is driven by an independent MultiSynth divider with configurable F1_x/F2_x frequency pairs and INV/non-INV selection.

It accepts dual reference inputs - a 25 or 27 MHz crystal across XA/XB, or an external 10–100 MHz clock on CLKIN - and supports static phase offset, rise/fall time control, and per-output spread spectrum modulation (±0.1% to ±1.5%, 30–33 kHz rate). Control logic interprets P0–P3 pin states for OEB_0/1/2, PDN, FS_0/1, SSEN, and LOLB functions.

Key Specifications

Pinout & Package

SI5350C-B06408-GTR is housed in a 20-pin QFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are defined per Skyworks Rev. 1.2 datasheet Section 7.1.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Compared with SI5350C-B06408-GTR, Si5350A-B-GM offers lower channel count and no CLKIN flexibility, while Si5351C-B-GM trades factory-programmed reliability and lower jitter for programmability - making SI5350C-B06408-GTR optimal for volume production with fixed, high-integrity timing requirements.

Availability

SI5350C-B06408-GTR is available at Aetrix Electronics and suitable for residential gateways, audio/video equipment, network-attached storage, industrial printers, and set-top box designs requiring stable component supply, guaranteed factory-programmed configuration, and long-term timing consistency.

Supply support for SI5350C-B06408-GTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and power management ICs for infrastructure, automotive, and consumer markets.

The Si5350C family is designed as a factory-programmed, pin-configurable clock generator targeting high-density, low-power embedded systems where replacing multiple discrete timing sources with a single configurable device improves reliability and reduces footprint.

FAQ

What reference inputs does the SI5350C-B06408-GTR support?

The SI5350C-B06408-GTR supports both a 25 MHz or 27 MHz crystal across XA/XB pins and an external 10–100 MHz clock on the CLKIN pin. These references can be used independently or together - for example, XTAL for free-running outputs and CLKIN for synchronous outputs locked to an external source. The device's dual PLL architecture allows outputs to be assigned to either reference domain.

How many output frequencies can the SI5350C-B06408-GTR generate simultaneously above 112.5 MHz?

The SI5350C-B06408-GTR supports only two unique frequencies above 112.5 MHz simultaneously across its eight outputs. For instance, it can deliver 125 MHz on CLK0 and 130 MHz on CLK1, but not 125 MHz, 130 MHz, and 150 MHz on three separate outputs. However, duplicate frequencies above 112.5 MHz (e.g., 125 MHz on CLK0–CLK3) are permitted and commonly used in multi-lane interfaces.

Does the SI5350C-B06408-GTR support HCSL-compatible outputs?

Yes, the SI5350C-B06408-GTR supports HCSL-compatible swing when configured with 2.5 V on the relevant VDDO rail (e.g., VDDOA = 2.5 V for CLK0/CLK1 pair) and external 511 Ω/240 Ω termination. This functionality is validated for the 10-MSOP and 20-QFN packages only and requires one output in the pair to be inverted using the INV function to form a differential HCSL signal.

What is the power-down current of the SI5350C-B06408-GTR?

The SI5350C-B06408-GTR draws ≤50 µA in power-down mode when the PDN pin is asserted high. This ultra-low quiescent current enables rapid wake-up (≤10 ms power-up time) while minimizing standby power in battery-backed or energy-sensitive applications such as residential gateways and portable instrumentation.

Can the SI5350C-B06408-GTR perform glitchless frequency switching?

Yes, the SI5350C-B06408-GTR supports glitchless frequency switching on outputs CLK0–CLK2 using the FS_0 and FS_1 pins. Each of these outputs can be preconfigured with two distinct frequencies (F1_x and F2_x); toggling the FS pins selects between them without clock interruption, enabling seamless transitions in applications like adaptive video frame rate scaling or multi-standard communication protocols.