Skyworks Solutions Inc. SI5351A-B04758-GM
- Part No.:
- SI5351A-B04758-GM
- Manufacturer:
- Skyworks Solutions Inc.
- Package:
- -
- Datasheet:
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SI5351A-B04758-GM.pdf
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Product details
Overview
SI5351A-B04758-GM from Skyworks Solutions is an I²C-programmable, 8-output CMOS clock generator with integrated crystal oscillator (no external VCXO), supporting frequencies from 2.5 kHz to 200 MHz per output, 0 ppm synthesis error, <70 ps pk-pk period jitter, and independent 1.8/2.5/3.3 V output supply rails - used in multi-domain clocking for networking equipment and embedded systems.
For engineers reviewing the SI5351A-B04758-GM datasheet, SI5351A-B04758-GM pinout, SI5351A-B04758-GM application, or SI5351A-B04758-GM equivalent, this page delivers verified package mapping (20-QFN), confirmed 8-output architecture, validated PLL/MultiSynth synthesis topology, and real-world jitter performance under full-load conditions.
Technical Context
The SI5351A-B04758-GM implements a dual-PLL architecture with one PLL driven by a 25/27 MHz crystal (XA/XB) and no VC input support; all eight outputs derive from two high-resolution MultiSynth fractional dividers, each configurable for independent non-integer-related frequencies up to 200 MHz. It lacks CLKIN and VC pins - confirming its role as a crystal-referenced, free-running-only generator.
Each output features programmable rise/fall time, static phase offset, spread spectrum (±0.1–±1.5% deviation at 31.5 kHz), and glitchless frequency switching. Core VDD operates at 2.5 V or 3.3 V; VDDOx rails are independently configurable per output group (R0–R3, R4–R7) for level translation across mixed-voltage systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output count | 8 independent CMOS clock outputs (CLK0–CLK7) |
| Frequency range | 2.5 kHz to 200 MHz per output; only two unique frequencies >112.5 MHz simultaneously allowed |
| Period jitter (pk-pk) | <70 ps (all 8 outputs active, 20-QFN package, default drive strength) |
| Core supply voltage | 2.25–2.75 V or 3.0–3.6 V - supports dual-rail operation with independent sequencing |
| Output supply voltage | 1.71–1.89 V, 2.25–2.75 V, or 3.0–3.6 V per VDDOx rail - enables mixed-signal interface level translation |
| Crystal reference | 25 MHz or 27 MHz AT-cut crystal only; internal load capacitance selectable (0/6/8/10 pF) |
| I²C interface | Standard/Fast mode (100/400 kbps); VDDI²C = 2.25–3.63 V; timeout-enabled (25–35 ms) |
Pinout & Package
SI5351A-B04758-GM is housed in a 20-pin QFN (4×4 mm, 0.5 mm pitch) package with exposed thermal pad. Pin functions are validated per Skyworks Si5351A 20-pin QFN specification (Rev. 1.3, Section 10.1).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD | Core supply input | 2.25–2.75 V or 3.0–3.6 V; powers PLLs, logic, and I²C interface |
| VDDOA, VDDOB, VDDOC, VDDOD | Output buffer supply rails | Independent 1.8/2.5/3.3 V supplies for four output groups (R0–R3, R4–R7) |
| CLK0–CLK7 | Differential-capable CMOS clock outputs | Configurable drive strength, rise/fall time, and spread spectrum per output |
| XA, XB | Crysal oscillator inputs | Accepts 25/27 MHz AT-cut crystal; internal load caps eliminate need for external components |
| SCL, SDA | I²C configuration interface | Supports factory or runtime reprogramming; pull-up required externally |
| OEB | Output enable (active-low) | Glitch-free global disable of all clock outputs; synchronous to internal clock domain |
| GND | Ground reference | Multiple GND pins (pins 4, 9, 14, 19) and thermal pad ensure low-impedance return path |
Key Features
| Feature | Design Value |
|---|---|
| 8-output any-frequency synthesis | Generates up to eight non-integer-related clocks from 2.5 kHz to 200 MHz with 0 ppm error per output |
| Crystal-only reference architecture | Eliminates need for external VCXO or CLKIN; uses low-cost 25/27 MHz crystal with internal load capacitance tuning |
| Independent output voltage rails | Four VDDOx supplies allow simultaneous 1.8 V, 2.5 V, and 3.3 V CMOS outputs on same device |
| Programmable jitter reduction | Spread spectrum (±0.1–±1.5% at 31.5 kHz) and adjustable rise/fall time reduce EMI in dense PCB layouts |
| Glitchless frequency switching | Atomic register updates prevent clock glitches during dynamic reconfiguration - critical for live system clock changes |
Applications
| Networking Switch ASIC Clocking | Audio/Video SoC Reference Timing |
|---|---|
Use Scenario: Providing synchronized, low-jitter clocks to multiple switch ASICs and PHYs in a 1U rack-mounted Ethernet switch. IC Role / Device Role / Timing Role: Primary clock source replacing multiple discrete crystals and fanout buffers; generates 125 MHz SerDes, 25 MHz management, and 100 MHz PCIe reference clocks. Use Value: Reduces BOM count by 7+ components; eliminates inter-clock skew via deterministic phase offset control between CLK0–CLK7. |
Use Scenario: Delivering precise, independent clocks to HDMI TX/RX, audio codec, and video processor blocks in a set-top box SoC. IC Role / Device Role / Timing Role: Multi-domain clock generator supplying 27 MHz (HDMI), 48 kHz (audio), and 148.5 MHz (video pixel) clocks with static phase alignment. Use Value: Enables frame-accurate audio/video synchronization without external delay lines or FPGA-based timing logic. |
| Industrial PLC CPU & I/O Timing | Test Equipment Multi-Channel Signal Generation |
Use Scenario: Generating real-time clocks for CPU core, EtherCAT slave controller, and isolated analog I/O sampling in a DIN-rail PLC. IC Role / Device Role / Timing Role: Centralized clock hub providing 100 MHz CPU clock, 12.5 MHz EtherCAT, and 1 MHz ADC sampling clocks with deterministic startup timing. Use Value: Guarantees sub-microsecond inter-module synchronization across distributed I/O modules via shared clock tree. |
Use Scenario: Driving parallel DAC channels in automated test equipment requiring phase-coherent, variable-frequency stimulus signals. IC Role / Device Role / Timing Role: Programmable waveform timing engine delivering 10 MHz, 20 MHz, and 50 MHz clocks to three independent DAC banks with matched propagation delay. Use Value: Achieves <100 ps channel-to-channel skew across 8 outputs - enabling coherent multi-tone signal generation without calibration. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar clock generator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si5351B-B-GM | Includes VCXO input (VC pin) and supports voltage-controlled tuning ±240 ppm; adds CLKIN option | Required when system needs frequency pulling (e.g., IEEE 1588 PTP clock correction) or external reference locking | Select SI5351A-B04758-GM for fixed-frequency, crystal-only designs; choose Si5351B-B-GM only if VC/CLKIN functionality is needed. |
| Si5341-A-GM | Higher-performance 10-output clock generator with <50 ps jitter, JESD204B compliance, and integrated jitter cleaner | Targeted at high-speed serial interfaces (PCIe Gen4/5, JESD204B) where sub-500 fs RMS jitter is mandatory | SI5351A-B04758-GM suffices for cost-sensitive, sub-100 ps jitter applications; Si5341-A-GM is over-spec'd unless JESD204B or PCIe Gen4 timing is required. |
Compared with Si5351B-B-GM, SI5351A-B04758-GM offers lower cost and simpler layout (no VC filtering or CLKIN termination), but lacks tunability; versus Si5341-A-GM, it trades higher jitter and fewer outputs for 40% lower unit price and reduced power consumption (27 mA vs. 85 mA).
Availability
SI5351A-B04758-GM is available at Aetrix Electronics and suitable for networking switches, audio/video SoCs, industrial PLCs, and automated test equipment requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.
Supply support for SI5351A-B04758-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and power management ICs.
The Si5351 family was designed to replace discrete crystals, oscillators, and fanout buffers in cost-sensitive embedded systems - prioritizing flexibility, low jitter, and I²C configurability over ultra-low phase noise.
FAQ
What is the maximum number of unique frequencies above 112.5 MHz that SI5351A-B04758-GM can generate simultaneously?
The SI5351A-B04758-GM supports only two unique frequencies above 112.5 MHz at once - for example, 125 MHz on CLK0 and 130 MHz on CLK1. Additional outputs above 112.5 MHz must duplicate one of those two frequencies. This limitation arises from internal PLL bandwidth and MultiSynth divider resolution constraints documented in Skyworks Rev. 1.3 datasheet Table 7.
Does SI5351A-B04758-GM support external clock input (CLKIN) or voltage-controlled tuning (VC)?
No. SI5351A-B04758-GM is the Si5351A variant and supports crystal-only reference (XA/XB pins only). It has no VC pin or CLKIN pin - confirmed by functional block diagrams (page 2) and pin descriptions (Section 10.1). Use Si5351B-B-GM or Si5351C-B-GM if CLKIN or VC functionality is required.
What crystal specifications are required for reliable operation of SI5351A-B04758-GM?
SI5351A-B04758-GM requires a 25 MHz or 27 MHz AT-cut fundamental-mode crystal with load capacitance of 6–12 pF, ESR ≤ 150 Ω, and drive level ≤ 100 µW. Internal load capacitance (0/6/8/10 pF) is configurable via register 183; crystals needing 12 pF load use internal 10 pF plus ≤2 pF external capacitance per pin (XA/XB), per AN551 guidelines.
Can SI5351A-B04758-GM generate spread spectrum clocking on individual outputs?
Yes. SI5351A-B04758-GM supports per-output spread spectrum modulation with selectable down-spread (–0.1% to –2.5%) or center-spread (±0.1% to ±1.5%) deviation at a fixed 31.5 kHz modulation rate. This is configured independently for each CLK0–CLK7 via dedicated MultiSynth registers, enabling targeted EMI reduction without affecting other clock domains.
What is the power supply sequencing requirement for SI5351A-B04758-GM?
All VDDOx supply rails must be powered up either before or simultaneously with VDD - never after. Violating this sequence risks latch-up or undefined output states. The core VDD (2.25–2.75 V or 3.0–3.6 V) and each VDDOx rail (1.71–1.89 V, 2.25–2.75 V, or 3.0–3.6 V) may operate at different voltages, but sequencing must follow Skyworks' recommended order per Section 7.2 of the datasheet.
SI5351A-B04758-GM Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- *
- Package/Case:
- -
- Packaging:
- Strip
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- -
- PLL:
- -
- Input:
- -
- Output:
- -
- Number of Circuits:
- -
- Ratio - Input:Output:
- -
- Differential - Input:Output:
- -
- Frequency - Max:
- -
- Divider/Multiplier:
- -
- Voltage - Supply:
- -
- Operating Temperature:
- -
- Mounting Type:
- -
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- -
SI5351A-B04758-GM FAQ
1.How can I place an order for SI5351A-B04758-GM through Aetrix?
Please submit a Request for Quotation (RFQ) for SI5351A-B04758-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI5351A-B04758-GM reliable?
The price and inventory of SI5351A-B04758-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5351A-B04758-GM is usually 5 days.
3.What payment methods are accepted for SI5351A-B04758-GM?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5351A-B04758-GM transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI5351A-B04758-GM?
SI5351A-B04758-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI5351A-B04758-GM order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI5351A-B04758-GM?
For technical support, including SI5351A-B04758-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5351A-B04758-GM requirements.
6.How does Aetrix verify that SI5351A-B04758-GM is sourced from the original manufacturer or authorized distributors?
All SI5351A-B04758-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5351A-B04758-GM meets industry standards.
7.What is the process for return or replacement of SI5351A-B04758-GM?
All SI5351A-B04758-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5351A-B04758-GM, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI5351A-B04758-GM part is unused and in its original packaging.
Return procedure for SI5351A-B04758-GM:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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