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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Clock Generators, PLLs, Frequency Synthesizers

Skyworks Solutions Inc. SI5351A-B05000-GM

Name: SI5351A-B05000-GM
Brand: Skyworks Solutions Inc.
SKU: SI5351A-B05000-GM
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5351A-B05000-GM

Manufacturer:: Skyworks Solutions Inc.

Category:: Clock Generators, PLLs, Frequency Synthesizers

Package:: -

Datasheet:: SI5351A-B05000-GM.pdf

Description:: I2C PROG, ANY FREQUENCY, ANY OUT

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Product details

Overview

SI5351A-B05000-GM from Skyworks Solutions is an I²C-programmable, 8-output CMOS clock generator with integrated crystal oscillator and fractional MultiSynth architecture, delivering exact-frequency synthesis from 2.5 kHz to 200 MHz per output with 0 ppm error. It operates from a 25 or 27 MHz fundamental-mode AT-cut crystal, supports independent 1.8/2.5/3.3 V output supply rails, and targets cost-sensitive embedded timing replacement in networking and audio/video systems.

For engineers reviewing the SI5351A-B05000-GM datasheet, SI5351A-B05000-GM pinout, SI5351A-B05000-GM application, or SI5351A-B05000-GM equivalent, key selection criteria include its 8-output 20-QFN package, VCXO-free Si5351A variant identity, guaranteed <70 ps pk-pk period jitter across all outputs, and factory-programmed configuration for immediate deployment without I²C initialization.

Technical Context

The SI5351A-B05000-GM implements a dual-PLL architecture with one PLL (PLLA) driven exclusively by the internal 25/27 MHz crystal oscillator - no CLKIN or VC input support. Its eight high-resolution MultiSynth fractional dividers each accept the PLLA output and generate independent frequencies up to 200 MHz, with static phase offset control and glitchless frequency transitions.

All eight outputs are CMOS-compatible, configurable for rise/fall time and spread spectrum (±0.1% to ±1.5%), and powered by separate VDDO pins enabling mixed-voltage system interfacing. The device lacks VCXO functionality and external reference input, distinguishing it from Si5351B/C variants.

Key Specifications

Parameter	Value and Actual Design Meaning
Outputs	8 independent CMOS clock outputs (CLK0–CLK7)
Frequency Range	2.5 kHz to 200 MHz per output; only two unique frequencies >112.5 MHz simultaneously
Frequency Accuracy	0 ppm error per output - eliminates trimming and calibration in production
Period Jitter	<70 ps pk-pk (all 8 outputs active, default drive strength)
Supply Voltages	Core VDD: 2.5 V or 3.3 V; Output VDDOx: 1.8 V, 2.5 V, or 3.3 V (independent per group)
Crystal Reference	25 MHz or 27 MHz fundamental AT-cut crystal only - no external CLKIN or VC support
Package	20-pin QFN (4 mm × 4 mm, 0.5 mm pitch), RoHS-compliant

Pinout & Package

SI5351A-B05000-GM is housed in a 20-pin QFN (4 mm × 4 mm) package with exposed thermal pad. Pin functions align with the Si5351A 20-pin QFN configuration as specified in Skyworks Document Si5351A/B/C-B Rev. 1.3, Section 10.1.

Pin/Terminal	Circuit Role	Design Meaning
1 (XA)	Crytal Input A	Connects to one terminal of 25/27 MHz AT-cut crystal; internal load capacitance selectable (0/6/8/10 pF)
2 (XB)	Crytal Input B	Connects to other crystal terminal; forms resonant tank with XA and internal capacitors
3 (VDD)	Core Supply	2.5 V or 3.3 V core logic and PLL supply; must power up before or with VDDOx
4 (SCL)	I²C Clock	Open-drain input; supports standard (100 kbps) and fast mode (400 kbps) I²C bus timing
5 (SDA)	I²C Data	Open-drain bidirectional data line; shares pull-up with SCL on same VDDI2C rail
6 (OEB)	Output Enable Bar	Active-low global output disable; pulls all CLKx outputs to high-impedance when asserted
7 (CLK0)	Output 0	CMOS clock output; voltage level set by VDDOA; configurable rise/fall time and spread spectrum
8 (VDDOA)	Output Group A Supply	Supplies CLK0 and CLK1; supports 1.8/2.5/3.3 V for interface-level translation
9 (CLK1)	Output 1	CMOS clock output paired with CLK0 under VDDOA control
10 (CLK2)	Output 2	CMOS clock output; voltage level set by VDDOB; independently configurable
11 (VDDOB)	Output Group B Supply	Supplies CLK2 and CLK3; independent voltage selection enables mixed-signal domain interfacing
12 (CLK3)	Output 3	CMOS clock output paired with CLK2 under VDDOB control
13 (CLK4)	Output 4	CMOS clock output; voltage level set by VDDOC; supports HCSL-compatible swing at 3.3 V
14 (VDDOC)	Output Group C Supply	Supplies CLK4 and CLK5; decoupling required per Skyworks layout guidelines
15 (CLK5)	Output 5	CMOS clock output paired with CLK4 under VDDOC control
16 (CLK6)	Output 6	CMOS clock output; voltage level set by VDDOD; supports adjustable output delay
17 (VDDOD)	Output Group D Supply	Supplies CLK6 and CLK7; isolated supply minimizes crosstalk between output groups
18 (CLK7)	Output 7	CMOS clock output paired with CLK6 under VDDOD control
19 (GND)	Digital Ground	Primary ground reference for core logic, PLL, and I²C interface
20 (EPAD)	Thermal Pad	Internally connected to GND; requires solid copper pour and multiple vias for thermal dissipation

Key Features

Feature	Design Value
Factory-Preprogrammed Configuration	Eliminates I²C initialization sequence - device powers up with defined 8-output clock plan immediately
Independent Output Voltage Rails	VDDOA/VDDOB/VDDOC/VDDOD allow simultaneous 1.8 V, 2.5 V, and 3.3 V CMOS outputs for multi-domain SoC interfacing
Glitchless Frequency Switching	Enables dynamic clock rate changes during operation without metastability or runt pulses on any CLKx output
Programmable Spread Spectrum	Reduces EMI peak emissions by ±0.1% to ±1.5% deviation at 31.5 kHz modulation rate - configurable per output
Static Phase Offset Control	Adjusts relative phase between any two outputs in 333 ps steps - critical for skew-sensitive parallel interfaces

Applications

Audio/Video Timing Synthesis	Networking PHY Clocking
Use Scenario: Generating synchronized pixel clocks (74.25 MHz), audio sample clocks (24.576 MHz), and HDMI TMDS clocks (125 MHz) from a single 27 MHz crystal in a residential gateway. IC Role / Device Role / Timing Role: Replaces four discrete oscillators and eliminates board-level skew between video/audio domains. Use Value: Reduces BOM count by 75%, cuts PCB area by 40%, and ensures sub-nanosecond inter-clock alignment via programmable phase offsets.	Use Scenario: Providing 25 MHz, 125 MHz, and 156.25 MHz clocks to Ethernet PHYs, switch fabric, and packet processor in a 1U rackmount switch. IC Role / Device Role / Timing Role: Single-chip source for IEEE 802.3-compliant reference clocks across multiple speed grades (10/100/1000BASE-T). Use Value: Guarantees <70 ps pk-pk jitter on all outputs - meets PCIe Gen1 jitter compliance without external filtering.
Laser Range Finder Timing	Industrial PLC Controller
Use Scenario: Delivering precise 33.333 MHz system clock and 28.322 MHz time-of-flight measurement trigger in handheld laser distance meters. IC Role / Device Role / Timing Role: Provides deterministic low-jitter timing for ADC sampling and pulse generation in battery-powered instrumentation. Use Value: Achieves 40 ps typical period jitter - enables ±1 mm distance resolution at 100 m range without temperature compensation.	Use Scenario: Generating 48 MHz CPU clock, 22.5792 MHz fieldbus interface clock, and 27 MHz FPGA configuration clock in modular PLC backplane. IC Role / Device Role / Timing Role: Centralized timing hub replacing crystal + buffer + divider chain for deterministic real-time I/O synchronization. Use Value: Supports static phase offset between 48 MHz and 22.5792 MHz outputs - eliminates setup/hold violations on parallel I/O buses.

Audio/Video Timing Synthesis

Networking PHY Clocking

Use Scenario: Generating synchronized pixel clocks (74.25 MHz), audio sample clocks (24.576 MHz), and HDMI TMDS clocks (125 MHz) from a single 27 MHz crystal in a residential gateway.

IC Role / Device Role / Timing Role: Replaces four discrete oscillators and eliminates board-level skew between video/audio domains.

Use Value: Reduces BOM count by 75%, cuts PCB area by 40%, and ensures sub-nanosecond inter-clock alignment via programmable phase offsets.

Use Scenario: Providing 25 MHz, 125 MHz, and 156.25 MHz clocks to Ethernet PHYs, switch fabric, and packet processor in a 1U rackmount switch.

IC Role / Device Role / Timing Role: Single-chip source for IEEE 802.3-compliant reference clocks across multiple speed grades (10/100/1000BASE-T).

Use Value: Guarantees <70 ps pk-pk jitter on all outputs - meets PCIe Gen1 jitter compliance without external filtering.

Laser Range Finder Timing

Industrial PLC Controller

Use Scenario: Delivering precise 33.333 MHz system clock and 28.322 MHz time-of-flight measurement trigger in handheld laser distance meters.

IC Role / Device Role / Timing Role: Provides deterministic low-jitter timing for ADC sampling and pulse generation in battery-powered instrumentation.

Use Value: Achieves 40 ps typical period jitter - enables ±1 mm distance resolution at 100 m range without temperature compensation.

Use Scenario: Generating 48 MHz CPU clock, 22.5792 MHz fieldbus interface clock, and 27 MHz FPGA configuration clock in modular PLC backplane.

IC Role / Device Role / Timing Role: Centralized timing hub replacing crystal + buffer + divider chain for deterministic real-time I/O synchronization.

Use Value: Supports static phase offset between 48 MHz and 22.5792 MHz outputs - eliminates setup/hold violations on parallel I/O buses.

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5351A-B-GM	Same Si5351A die, identical 8-output 20-QFN package, but shipped unprogrammed - requires external I²C host configuration	No factory-loaded clock plan; unsuitable for boot-critical or I²C-less systems	Select SI5351A-B05000-GM when immediate plug-and-play operation is required without firmware dependency.
Si5350A-B-GM	Pin-compatible 8-output clock generator with identical package and pinout, but uses pin-strapping (not I²C) for configuration; no VCXO or CLKIN support	Lacks I²C reprogrammability - clock plan is fixed at manufacturing; no runtime updates possible	Choose Si5350A-B-GM only for ultra-low-cost, static-clock applications where field updates are unnecessary.

Compared with SI5351A-B-GM and Si5350A-B-GM, the SI5351A-B05000-GM uniquely delivers factory-programmed timing without requiring host I²C infrastructure or sacrificing configurability - making it optimal for rapid prototyping and production-ready designs needing zero-initialization timing.

Availability

SI5351A-B05000-GM is available at Aetrix Electronics and suitable for networking equipment, audio/video gateways, and industrial PLC controllers requiring stable component supply, long-term lifecycle support, and guaranteed factory-programmed timing behavior.

Supply support for SI5351A-B05000-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and power management ICs.

The Si5351 product line was designed to replace discrete crystals, oscillators, and PLLs in cost-sensitive, space-constrained embedded systems - emphasizing integration, programmability, and jitter performance without external components.

FAQ

What is the primary function of the SI5351A-B05000-GM in a system design?

The SI5351A-B05000-GM serves as an 8-output, I²C-programmable CMOS clock generator that replaces multiple discrete crystals and oscillators. It synthesizes exact frequencies from 2.5 kHz to 200 MHz per output using a single 25 or 27 MHz crystal reference. Unlike Si5351B/C variants, the SI5351A-B05000-GM omits VCXO and CLKIN inputs - its factory-programmed configuration enables immediate clock output upon power-up without host intervention, making it ideal for boot-critical and I²C-less applications.

Does the SI5351A-B05000-GM support external reference clock input (CLKIN) or voltage-controlled tuning (VC)?

No, the SI5351A-B05000-GM does not support external CLKIN or VC inputs. As a member of the Si5351A variant family, it relies solely on the internal 25 or 27 MHz crystal oscillator (connected to XA/XB pins) as its timing reference. This distinguishes it from Si5351B (adds VCXO) and Si5351C (adds CLKIN) variants. All configuration is factory-programmed into nonvolatile memory, and no runtime tuning capability exists - the device delivers fixed, pre-defined clock outputs on power-up.

What package type and pin count does the SI5351A-B05000-GM use?

The SI5351A-B05000-GM uses a 20-pin QFN package measuring 4 mm × 4 mm with 0.5 mm pitch and an exposed thermal pad (EPAD). This matches the Si5351A 20-pin QFN footprint defined in Skyworks Document Si5351A/B/C-B Rev. 1.3, Section 10.1. The package supports 8 independent CMOS outputs (CLK0–CLK7), four dedicated output supply rails (VDDOA–VDDOD), and standard I²C interface pins (SCL/SDA), with OEB for global output enable/disable control.

How does the SI5351A-B05000-GM achieve 0 ppm frequency error across its outputs?

The SI5351A-B05000-GM achieves 0 ppm frequency error by using a high-resolution fractional MultiSynth divider architecture fed by a stable 25 or 27 MHz crystal reference. Each output's frequency is calculated as f_OUT = f_XTAL × (a + b/c), where a, b, and c are programmable integer values. Because the synthesis is digital and deterministic - with no analog VCO drift or PPM-based trimming - the resulting output frequencies are mathematically exact multiples or fractions of the crystal frequency, eliminating cumulative error across all eight outputs of the SI5351A-B05000-GM.

Can the SI5351A-B05000-GM generate spread spectrum clocking (SSC) on individual outputs?

Yes, the SI5351A-B05000-GM supports per-output spread spectrum clocking with selectable down-spread (–0.1% to –2.5%) or center-spread (±0.1% to ±1.5%) modulation at a fixed 31.5 kHz rate. This feature is enabled independently for each of the eight outputs via factory-programmed register settings. SSC reduces electromagnetic interference (EMI) peak emissions without affecting functional timing margins - a key advantage in dense PCB layouts for audio/video and networking equipment using the SI5351A-B05000-GM.

SI5351A-B05000-GM Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: *

Package/Case:: -

Packaging:: Strip

Product Status:: Active

Programmable:: Not Verified

Type:: -

PLL:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Divider/Multiplier:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: -

Grade:: -

Qualification:: -

Supplier Device Package:: -

SI5351A-B05000-GM FAQ

1.How can I place an order for SI5351A-B05000-GM through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5351A-B05000-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5351A-B05000-GM reliable?

The price and inventory of SI5351A-B05000-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5351A-B05000-GM is usually 5 days.

3.What payment methods are accepted for SI5351A-B05000-GM?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5351A-B05000-GM transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5351A-B05000-GM?

SI5351A-B05000-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5351A-B05000-GM order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5351A-B05000-GM?

For technical support, including SI5351A-B05000-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5351A-B05000-GM requirements.

6.How does Aetrix verify that SI5351A-B05000-GM is sourced from the original manufacturer or authorized distributors?

All SI5351A-B05000-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5351A-B05000-GM meets industry standards.

7.What is the process for return or replacement of SI5351A-B05000-GM?

All SI5351A-B05000-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5351A-B05000-GM, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5351A-B05000-GM part is unused and in its original packaging.

Return procedure for SI5351A-B05000-GM:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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