Skyworks Solutions Inc. SI5351A-B05516-GT

Overview

SI5351A-B05516-GT from Skyworks Solutions is an I²C-programmable, 8-output CMOS clock generator with integrated VCXO, generating precise frequencies from 2.5 kHz to 200 MHz per output with 0 ppm synthesis error. It replaces crystals, crystal oscillators, and VCXOs in cost-sensitive embedded timing applications using a single 25 or 27 MHz AT-cut crystal reference.

For engineers reviewing the SI5351A-B05516-GT datasheet, SI5351A-B05516-GT pinout, SI5351A-B05516-GT application, or SI5351A-B05516-GT equivalent, this device supports independent output voltage supplies (1.8/2.5/3.3 V), glitchless frequency changes, programmable rise/fall times, and static phase offset-critical for multi-domain clocking in networking, audio/video, and industrial control systems.

Technical Context

The SI5351A-B05516-GT implements a dual-PLL architecture: PLL A operates as a standard synthesizer, while PLL B functions as a highly linear VCXO with configurable pull range (±30 to ±240 ppm) and gain (18–150 ppm/V). Both PLLs accept the same 25/27 MHz crystal reference via XA/XB inputs.

Each of its eight outputs is driven by a dedicated MultiSynth fractional divider, enabling non-integer-related frequencies up to 200 MHz with <70 ps peak-to-peak period jitter (typical). Spread spectrum modulation (±0.1% to ±1.5%) and adjustable output delay are independently configurable per output.

Key Specifications

Pinout & Package

SI5351A-B05516-GT is housed in a 20-pin QFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are validated per Skyworks Si5351A 20-pin QFN specification (Rev. 1.3, Section 10.1).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Compared with SI5351A-B05516-GT, Si5351B-B-GM adds voltage-controlled frequency adjustment but increases design complexity with VC biasing; Si5351C-B-GM enables external reference locking but removes crystal autonomy-making SI5351A-B05516-GT optimal for standalone, crystal-referenced, multi-output clocking with minimal external components.

Availability

SI5351A-B05516-GT is available at Aetrix Electronics and suitable for networking equipment, audio/video consumer electronics, and industrial instrumentation requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for SI5351A-B05516-GT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and precision analog technologies.

The Si5351 family was designed to replace multiple discrete timing components-including crystals, oscillators, VCXOs, and fanout buffers-in cost- and space-constrained embedded systems, delivering programmable flexibility without sacrificing jitter performance or power efficiency.

FAQ

What is the maximum number of unique frequencies above 112.5 MHz that SI5351A-B05516-GT can generate simultaneously?

The SI5351A-B05516-GT supports only two unique frequencies above 112.5 MHz at any given time-for example, 125 MHz on CLK0 and 130 MHz on CLK1. Additional outputs may replicate those frequencies (e.g., 125 MHz on CLK0–CLK3), but no third distinct frequency >112.5 MHz is permitted. This limitation arises from internal PLL bandwidth and MultiSynth resource allocation in the SI5351A-B05516-GT architecture.

Does SI5351A-B05516-GT support HCSL-compatible output swing?

Yes, SI5351A-B05516-GT supports HCSL-compatible output swing through programmable drive strength and termination control. When configured with 50 Ω output impedance and appropriate VDDO (typically 1.8 V), its differential-like single-ended output meets HCSL voltage thresholds (0.35–0.55 V common-mode, 0.6–0.8 V swing) for direct interface with HCSL-receiving devices such as PCIe Gen1 controllers and SerDes PHYs.

Can SI5351A-B05516-GT operate with a 2.5 V core supply and 1.8 V output supplies simultaneously?

Yes, SI5351A-B05516-GT fully supports independent supply rails: VDD may be set to 2.5 V (within 2.25–2.75 V range), while VDDOA–VDDOD can each be independently biased to 1.8 V (1.71–1.89 V range). This enables mixed-signal system integration-such as driving 1.8 V FPGAs and 2.5 V ADCs-from a single SI5351A-B05516-GT without level shifters.

Is external load capacitance required when using a 10 pF crystal with SI5351A-B05516-GT?

No. SI5351A-B05516-GT provides selectable internal load capacitance (0, 6, 8, or 10 pF) via register 183 bits 7:6. A 10 pF crystal can be directly connected to XA/XB with internal 10 pF loading enabled, eliminating external capacitors. External capacitance is only needed for crystals requiring >10 pF (e.g., 12 pF), where ≤2 pF additional capacitance may be added externally per pin.

What is the power-up time for SI5351A-B05516-GT from VDD application to valid clock output?

SI5351A-B05516-GT achieves valid output clocks within 2 ms (typical) and 10 ms (maximum) after VDD reaches its minimum operating voltage (2.25 V for 2.5 V operation or 3.0 V for 3.3 V operation), assuming CL = 5 pF and output frequency >1 MHz. In PLL bypass mode-where the crystal oscillator directly drives outputs-the power-up time reduces to 0.5–1 ms, useful for fast-boot applications.