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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Clock Generators, PLLs, Frequency Synthesizers

Skyworks Solutions Inc. SI5351A-B05855-GT

Name: SI5351A-B05855-GT
Brand: Skyworks Solutions Inc.
SKU: SI5351A-B05855-GT
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SI5351A-B05855-GT

Manufacturer:: Skyworks Solutions Inc.

Category:: Clock Generators, PLLs, Frequency Synthesizers

Package:: -

Datasheet:: SI5351A-B05855-GT.pdf

Description:: I2C PROG, ANY FREQUENCY, ANY OUT

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Product details

Overview

SI5351A-B05855-GT from Skyworks Solutions is an I²C-programmable 8-output CMOS clock generator with integrated VCXO, generating free-running and synchronous clocks from 2.5 kHz to 200 MHz per output with 0 ppm frequency error. It replaces crystals, crystal oscillators, and discrete VCXOs in cost-sensitive embedded timing applications using a single 25 or 27 MHz AT-cut crystal reference.

For engineers reviewing the SI5351A-B05855-GT datasheet, SI5351A-B05855-GT pinout, SI5351A-B05855-GT application, or SI5351A-B05855-GT equivalent, key selection considerations include its 20-QFN (4×4 mm) package with 8 independent outputs, configurable VDDO voltage per bank (1.8/2.5/3.3 V), <70 ps peak-to-peak period jitter, and support for spread spectrum and static phase offset-critical for PCIe Gen 1, audio/video sync, and multi-domain clocking.

Technical Context

The SI5351A-B05855-GT implements a dual-PLL architecture with PLL A (SSC-capable) and PLL B (VCXO-enabled), each feeding eight independent MultiSynth fractional dividers. Its input stage accepts only a 25/27 MHz crystal (no CLKIN or VC pins enabled), and all outputs derive from PLL A via programmable integer/fractional division.

It supports per-output rise/fall time control, glitchless frequency transitions, and separate VDDO supply pins enabling level translation across three voltage domains. The device operates at core VDD = 2.5 V or 3.3 V and requires no external VCXO tuning components due to its internal voltage-controlled oscillator circuitry.

Key Specifications

Parameter	Value and Actual Design Meaning
Output count	8 independent CMOS clock outputs (CLK0–CLK7)
Frequency range	2.5 kHz to 200 MHz per output; two unique frequencies >112.5 MHz allowed simultaneously
Period jitter	<70 ps pk-pk (all outputs active, 20-QFN package)
Core supply	2.5 V or 3.3 V ±10%; independent VDDO supplies (1.8/2.5/3.3 V) per output bank
Crystal reference	25 MHz or 27 MHz AT-cut crystal only; internal load capacitance selectable (0/6/8/10 pF)
I²C interface	Standard/Fast mode (100/400 kbps); supports register-level configuration and RAM-based runtime updates
Package	20-pin QFN (4×4 mm, 0.5 mm pitch), RoHS-compliant, thermal resistance θJA = 41 °C/W (4-layer board)

Pinout & Package

SI5351A-B05855-GT is housed in a 20-pin QFN (4×4 mm, 0.5 mm pitch) package with exposed thermal pad. Pin functions are defined per Skyworks Rev. 1.3 datasheet Section 10.1 (Si5351A 20-pin QFN).

Pin/Terminal	Circuit Role	Design Meaning
XA, XB	Crytal oscillator input	Connects to 25/27 MHz AT-cut crystal; internal load capacitance configurable (0/6/8/10 pF)
SCL, SDA	I²C serial interface	Configures registers and loads custom frequency plans; supports standard/fast mode up to 400 kbps
CLK0–CLK7	CMOS clock outputs	Eight independent outputs; each configurable for frequency, drive strength, rise/fall time, and spread spectrum
VDDOA–VDDOD	Output buffer supply	Four independent VDDO rails (1.8/2.5/3.3 V) enabling mixed-voltage system interfacing
VDD	Core logic supply	2.5 V or 3.3 V ±10%; must power up before or concurrently with all VDDO rails
OEB	Output enable bar	Active-low global enable; pulls all outputs to high-impedance when asserted
NC	No connect	Pins 1, 4, 9, 12, 15, 18 - not bonded; must be left floating or grounded per layout guidelines

Key Features

Feature	Design Value
0 ppm frequency synthesis	Exact output frequencies generated via fractional MultiSynth dividers-no rounding error across 2.5 kHz–200 MHz range
Per-output spread spectrum	Configurable down-spread (–0.1% to –2.5%) or center-spread (±0.1% to ±1.5%) to reduce EMI without altering system timing margins
Static phase offset	Programmable 333 ps/step phase shift between any two outputs-enables precise skew alignment for DDR or video pixel clocks
Glitchless reprogramming	Frequency, duty cycle, and phase changes occur synchronously on next clock edge-no runt pulses or metastability in downstream logic
Low-power operation	27 mA typical supply current with all 8 outputs enabled at 3.3 V-optimized for battery-backed or thermally constrained designs

Applications

Audio/Video Sync	Networking Equipment
Use Scenario: Generating synchronized pixel clock (74.25 MHz), audio master clock (24.576 MHz), and HDMI TMDS clock (148.5 MHz) from a single crystal in set-top boxes. IC Role / Device Role / Timing Role: Single-chip multi-domain clock source replacing three discrete oscillators and eliminating inter-clock skew. Use Value: Reduces BOM count by 3×, eliminates crystal matching tolerance errors, and enables dynamic resync via I²C during format switching.	Use Scenario: Providing PCIe Gen 1 reference (100 MHz), USB 2.0 (48 MHz), and Ethernet PHY (25 MHz) clocks in residential gateways. IC Role / Device Role / Timing Role: PCIe-compliant clock generator meeting jitter and phase noise requirements for root complex and endpoint timing. Use Value: Meets PCIe Gen 1 spec (<70 ps pk-pk jitter) while supporting factory-programmed configurations for volume production.
Laser Range Finder	Industrial Instrumentation
Use Scenario: Delivering precise 125 MHz sampling clock and 28.322 MHz time-of-flight trigger in handheld laser distance meters. IC Role / Device Role / Timing Role: Low-jitter clock source for ADC sampling and digital pulse generation with sub-nanosecond phase control. Use Value: Enables <1 mm measurement resolution via deterministic jitter-limited timebase; adjustable output delay aligns trigger edges to sensor response.	Use Scenario: Replacing multiple fixed-frequency crystals in portable oscilloscopes requiring 33.333 MHz acquisition clock, 48 MHz MCU clock, and 22.5792 MHz display refresh. IC Role / Device Role / Timing Role: Configurable clock tree generator supporting mixed-voltage subsystems (1.8 V FPGA, 3.3 V microcontroller, 2.5 V ADC). Use Value: Eliminates crystal inventory complexity; per-output VDDO rails allow direct interface to diverse logic families without level shifters.

Audio/Video Sync

Networking Equipment

Use Scenario: Generating synchronized pixel clock (74.25 MHz), audio master clock (24.576 MHz), and HDMI TMDS clock (148.5 MHz) from a single crystal in set-top boxes.

IC Role / Device Role / Timing Role: Single-chip multi-domain clock source replacing three discrete oscillators and eliminating inter-clock skew.

Use Value: Reduces BOM count by 3×, eliminates crystal matching tolerance errors, and enables dynamic resync via I²C during format switching.

Use Scenario: Providing PCIe Gen 1 reference (100 MHz), USB 2.0 (48 MHz), and Ethernet PHY (25 MHz) clocks in residential gateways.

IC Role / Device Role / Timing Role: PCIe-compliant clock generator meeting jitter and phase noise requirements for root complex and endpoint timing.

Use Value: Meets PCIe Gen 1 spec (<70 ps pk-pk jitter) while supporting factory-programmed configurations for volume production.

Laser Range Finder

Industrial Instrumentation

Use Scenario: Delivering precise 125 MHz sampling clock and 28.322 MHz time-of-flight trigger in handheld laser distance meters.

IC Role / Device Role / Timing Role: Low-jitter clock source for ADC sampling and digital pulse generation with sub-nanosecond phase control.

Use Value: Enables <1 mm measurement resolution via deterministic jitter-limited timebase; adjustable output delay aligns trigger edges to sensor response.

Use Scenario: Replacing multiple fixed-frequency crystals in portable oscilloscopes requiring 33.333 MHz acquisition clock, 48 MHz MCU clock, and 22.5792 MHz display refresh.

IC Role / Device Role / Timing Role: Configurable clock tree generator supporting mixed-voltage subsystems (1.8 V FPGA, 3.3 V microcontroller, 2.5 V ADC).

Use Value: Eliminates crystal inventory complexity; per-output VDDO rails allow direct interface to diverse logic families without level shifters.

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
Si5351B-B-GM	Includes VC pin and full VCXO functionality; supports voltage-controlled tuning (±30 to ±240 ppm) and external CLKIN	Required where system-level frequency pulling or external reference synchronization is needed	Select SI5351A-B05855-GT when only crystal-referenced free-running clocks are required; choose Si5351B-B-GM if VCXO tuning or CLKIN lock is mandatory
Si5341-A-GM	Higher-performance 10-output clock generator with sub-50 fs RMS jitter, JESD204B compliance, and integrated jitter cleaner	Targeted at high-speed data converters and RF sampling systems demanding ultra-low jitter	Choose SI5351A-B05855-GT for cost-optimized consumer/industrial timing; select Si5341-A-GM only when <50 fs jitter or JESD204B deterministic latency is required

Compared with Si5351B-B-GM, SI5351A-B05855-GT omits VC and CLKIN pins-reducing layout complexity and cost for crystal-only use cases. Against Si5341-A-GM, it trades jitter performance and protocol support for lower price and simpler configuration, making it ideal for PCIe Gen 1, audio, and instrumentation where 70 ps jitter is sufficient.

Availability

SI5351A-B05855-GT is available at Aetrix Electronics and suitable for audio/video equipment, networking/communication devices, and industrial instrumentation requiring stable component supply, long-term lifecycle support, and factory-programmed frequency configurations.

Supply support for SI5351A-B05855-GT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions for wireless, broadband, automotive, and industrial markets.

The Si5351 family is designed as a low-cost, highly flexible clock generator platform targeting crystal replacement in cost-sensitive embedded systems-emphasizing I²C configurability, multi-output independence, and minimal external component count.

FAQ

What is the maximum number of unique frequencies above 112.5 MHz that SI5351A-B05855-GT can generate simultaneously?

The SI5351A-B05855-GT supports only two unique frequencies above 112.5 MHz at once-for example, 125 MHz on CLK0 and 130 MHz on CLK1. Additional outputs above 112.5 MHz must duplicate one of those two frequencies. This limitation arises from internal PLL bandwidth constraints and is specified in Table 7 of the Skyworks datasheet Rev. 1.3. SI5351A-B05855-GT enforces this rule in hardware; attempting to configure three distinct high-frequency outputs will result in invalid clock behavior.

Does SI5351A-B05855-GT support external clock input (CLKIN) or voltage control (VC) functionality?

No. SI5351A-B05855-GT is a variant of the Si5351A family and supports crystal-only reference operation via XA/XB pins. It lacks both the CLKIN and VC pins-confirmed by its pinout in Section 10.1 of the datasheet and ordering guide Table 1, which lists "XTAL only" under Frequency Reference. SI5351A-B05855-GT relies solely on the internal oscillator driven by a 25 or 27 MHz crystal; no external reference or tuning voltage is accepted.

What are the valid supply voltage options for VDD and VDDO rails on SI5351A-B05855-GT?

SI5351A-B05855-GT supports core VDD at either 2.5 V ±10% (2.25–2.75 V) or 3.3 V ±10% (3.0–3.6 V). Each of the four VDDO rails (VDDOA–VDDOD) independently accepts 1.8 V (1.71–1.89 V), 2.5 V (2.25–2.75 V), or 3.3 V (3.0–3.6 V)-enabling mixed-voltage interfacing to diverse logic families. Power sequencing requires all VDDO rails to be powered before or concurrently with VDD, as stated in Table 3 of the datasheet.

How does SI5351A-B05855-GT achieve 0 ppm frequency error across its output range?

SI5351A-B05855-GT achieves 0 ppm frequency error using high-resolution fractional MultiSynth dividers operating on a stable PLL-derived intermediate frequency. Unlike integer dividers that introduce rounding error, these dividers synthesize exact frequencies-including non-integer multiples-by combining integer and fractional division ratios derived from the 25/27 MHz crystal reference. This architecture eliminates cumulative error, ensuring every configured output frequency matches the target value precisely, as verified in Skyworks' functional description and electrical specifications.

Can SI5351A-B05855-GT outputs drive HCSL-compatible loads?

Yes. SI5351A-B05855-GT supports HCSL-compatible swing through programmable output drive strength and termination control. When configured for high-drive mode (50 Ω output impedance), its outputs meet HCSL voltage levels (peak-to-peak ~800 mV) into 50 Ω loads, as confirmed in the Features section and Table 7 (Output High/Low Voltage specs). This capability enables direct interface to PCIe Gen 1 receivers and other HCSL-clocked components without external resistors or level shifters.

SI5351A-B05855-GT Specifications

Product attributes: Attribute value

Manufacturer:: Skyworks Solutions Inc.

Series:: *

Package/Case:: -

Packaging:: Tube

Product Status:: Active

Programmable:: Not Verified

Type:: -

PLL:: -

Input:: -

Output:: -

Number of Circuits:: -

Ratio - Input:Output:: -

Differential - Input:Output:: -

Frequency - Max:: -

Divider/Multiplier:: -

Voltage - Supply:: -

Operating Temperature:: -

Mounting Type:: -

Grade:: -

Qualification:: -

Supplier Device Package:: -

SI5351A-B05855-GT FAQ

1.How can I place an order for SI5351A-B05855-GT through Aetrix?

Please submit a Request for Quotation (RFQ) for SI5351A-B05855-GT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SI5351A-B05855-GT reliable?

The price and inventory of SI5351A-B05855-GT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5351A-B05855-GT is usually 5 days.

3.What payment methods are accepted for SI5351A-B05855-GT?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5351A-B05855-GT transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SI5351A-B05855-GT?

SI5351A-B05855-GT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SI5351A-B05855-GT order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SI5351A-B05855-GT?

For technical support, including SI5351A-B05855-GT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5351A-B05855-GT requirements.

6.How does Aetrix verify that SI5351A-B05855-GT is sourced from the original manufacturer or authorized distributors?

All SI5351A-B05855-GT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5351A-B05855-GT meets industry standards.

7.What is the process for return or replacement of SI5351A-B05855-GT?

All SI5351A-B05855-GT units undergo pre-shipment inspection (PSI). If there is an issue with SI5351A-B05855-GT, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SI5351A-B05855-GT part is unused and in its original packaging.

Return procedure for SI5351A-B05855-GT:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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