Skyworks Solutions Inc. SI5351A-B05945-GT
- Part No.:
- SI5351A-B05945-GT
- Manufacturer:
- Skyworks Solutions Inc.
- Package:
- -
- Datasheet:
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SI5351A-B05945-GT.pdf
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Product details
Overview
SI5351A-B05945-GT from Skyworks Solutions is an I²C-programmable, 8-output CMOS clock generator with integrated VCXO architecture, generating precise frequencies from 2.5 kHz to 200 MHz per output with 0 ppm synthesis error. It operates from a 25 or 27 MHz crystal reference and supports independent 1.8/2.5/3.3 V output supply rails. It replaces discrete crystals, oscillators, and PLLs in embedded timing applications such as audio/video equipment and networking gear.
For engineers reviewing the SI5351A-B05945-GT datasheet, SI5351A-B05945-GT pinout, SI5351A-B05945-GT application, or SI5351A-B05945-GT equivalent, key selection factors include its 8-output QFN-20 package, VCXO tuning capability (±240 ppm pull range), <70 ps pk-pk period jitter, I²C configurability, and support for HCSL-compatible swing and spread-spectrum modulation.
Technical Context
The SI5351A-B05945-GT implements a dual-PLL architecture with one PLL dedicated to VCXO operation and the other supporting free-running or CLKIN-synchronized synthesis. Each of its eight outputs is driven by an independent MultiSynth fractional divider enabling non-integer-related frequency generation.
It features configurable rise/fall time control, static phase offset adjustment, glitchless frequency transitions, and separate core (VDD) and output (VDDOx) supply domains - allowing level translation across 1.8 V, 2.5 V, and 3.3 V logic families without external level shifters.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Outputs | 8 independent CMOS clock outputs (CLK0–CLK7) |
| Frequency Range | 2.5 kHz to 200 MHz per output; only two unique frequencies >112.5 MHz simultaneously allowed |
| Period Jitter | <70 ps pk-pk (typical, all outputs active, QFN-20 package) |
| VCXO Pull Range | Configurable ±240 ppm at 3.3 V VDD (Si5351B variant) |
| Supply Voltages | VDD = 2.25–2.75 V or 3.0–3.6 V; VDDOx = 1.71–1.89 V / 2.25–2.75 V / 3.0–3.6 V, independently selectable |
| I²C Interface | Standard/Fast Mode (100/400 kbps); supports register-based configuration and real-time reprogramming |
| Crystal Reference | 25 MHz or 27 MHz AT-cut crystal; internal load capacitance options (0/6/8/10 pF) |
Pinout & Package
SI5351A-B05945-GT is housed in a 20-pin QFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined per Skyworks datasheet Rev. 1.3, Section 10.1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| XA, XB | Crystal oscillator input terminals | Connect 25/27 MHz AT-cut crystal; internal load caps configurable via register 183 |
| SCL, SDA | I²C serial interface bus | Supports configuration and dynamic frequency updates; pull-up required externally |
| OEB | Output enable bar | Active-low global output disable; allows synchronous clock gating without reconfiguration |
| VC | VCXO control voltage input | Accepts 0–VDD tuning voltage; enables ±240 ppm frequency pull range (Si5351B function) |
| CLK0–CLK7 | Dedicated CMOS clock outputs | Each independently programmable; drive strength, duty cycle, and spread spectrum configurable per output |
| VDD, VDDOA–VDDOD | Power supply pins | VDD powers core logic; VDDOA–D power respective output banks for voltage-level translation |
Key Features
| Feature | Design Value |
|---|---|
| 0 ppm frequency synthesis error | Eliminates need for post-fabrication trimming or calibration in production systems |
| Glitchless frequency changes | Enables runtime clock switching in real-time systems without transient disruptions or metastability |
| Configurable spread spectrum per output | Reduces EMI peak emissions by up to 15 dB; selectable down-spread (–0.1% to –2.5%) or center-spread (±0.1% to ±1.5%) |
| Independent output voltage rails | Allows mixed-voltage system integration (e.g., 1.8 V FPGA core + 3.3 V peripheral interface) without external level shifters |
| Static phase offset control | Enables deterministic inter-output skew alignment for timing-critical interfaces like DDR or LVDS |
Applications
| Audio/Video Timing | Networking Equipment |
|---|---|
Use Scenario: Generating synchronized pixel clocks (74.25 MHz), audio sample clocks (24.576 MHz), and HDMI TMDS clocks in set-top boxes and AV receivers. IC Role / Device Role / Timing Role: Single-chip multi-domain clock source replacing four discrete oscillators and eliminating board-level skew. Use Value: Reduces BOM count and layout area while ensuring sub-100 ps inter-clock phase alignment across video/audio domains. | Use Scenario: Providing PCIe Gen1 reference clocks (100 MHz), Ethernet PHY clocks (25/125 MHz), and management controller clocks (33.333 MHz) in residential gateways. IC Role / Device Role / Timing Role: Configurable clock hub meeting multiple protocol-specific jitter and frequency requirements from one device. Use Value: Enables single-firmware clock tree configuration across SKUs, simplifying qualification and reducing inventory variants. |
| Laser Range Finder | Industrial Handheld Instrumentation |
Use Scenario: Driving high-speed ADC sampling clocks (125 MHz) and time-of-flight timing references (28.322 MHz) in compact laser distance meters. IC Role / Device Role / Timing Role: Low-jitter, low-power clock generator operating from battery-supplied 2.5 V rails with minimal external components. Use Value: Achieves <70 ps period jitter at 125 MHz while consuming <45 mA total supply current - critical for portable precision measurement. | Use Scenario: Supplying MCU core clock (48 MHz), display interface clock (33.333 MHz), and sensor interface clock (22.5792 MHz) in handheld test equipment. IC Role / Device Role / Timing Role: Flexible I²C-reprogrammable clock source supporting field-upgradable timing configurations. Use Value: Allows firmware-driven clock scaling during battery-saving modes without hardware redesign or component change. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar clock generator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si5351B-B-GM | Same 20-QFN package and 8-output capability; includes full VCXO functionality with wider tuning linearity (±5% vs. ±5% typical) and identical ±240 ppm pull range | Preferred where external voltage-controlled frequency adjustment is required (e.g., lock-to-reference or temperature compensation loops) | Select SI5351A-B05945-GT when VCXO is not needed; choose Si5351B-B-GM only if active tuning via VC pin is mandatory |
| Si5351C-B-GM | Supports external CLKIN (10–100 MHz) in addition to XTAL; lacks VC pin; otherwise identical architecture and output specs | Suitable for systems with existing high-accuracy reference clocks (e.g., GPS-disciplined OCXOs or network-synchronized PTP clocks) | Choose SI5351A-B05945-GT for crystal-only designs; use Si5351C-B-GM only when synchronizing to an external master clock is required |
Compared with Si5351B-B-GM and Si5351C-B-GM, SI5351A-B05945-GT provides identical 8-output flexibility and jitter performance but omits both VC and CLKIN inputs - making it the lowest-cost, simplest-to-integrate option for fixed-frequency, crystal-referenced applications requiring no synchronization or tuning.
Availability
SI5351A-B05945-GT is available at Aetrix Electronics and suitable for audio/video equipment, networking infrastructure, and industrial instrumentation requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.
Supply support for SI5351A-B05945-GT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and power management ICs.
The Si5351 family was designed to replace discrete timing components in cost-sensitive, space-constrained embedded systems - delivering programmable multi-output clock generation with zero-error synthesis and industry-leading jitter performance.
FAQ
What is the exact package type and footprint for SI5351A-B05945-GT?
The SI5351A-B05945-GT uses a 20-pin QFN package measuring 4 mm × 4 mm with 0.5 mm pitch and an exposed thermal pad. Its land pattern matches Skyworks' recommended layout in datasheet Rev. 1.3, Section 12.2. This package supports 8 outputs and is distinct from the 16-QFN (4-output) and 10-MSOP (3-output) variants in the same family.
Does SI5351A-B05945-GT support spread-spectrum clocking, and how is it configured?
Yes, SI5351A-B05945-GT supports spread-spectrum clocking on each output individually. It offers selectable down-spread (–0.1% to –2.5%) or center-spread (±0.1% to ±1.5%) modulation at 31.5 kHz nominal rate. Configuration is performed via I²C register writes to the Spread Spectrum Enable and Deviation registers (addresses 44–47), with no external components required.
Can SI5351A-B05945-GT generate frequencies above 112.5 MHz, and what are the constraints?
Yes, SI5351A-B05945-GT can generate frequencies up to 200 MHz, but only two unique frequencies above 112.5 MHz may be active simultaneously. For example, 125 MHz on CLK0 and 130 MHz on CLK1 is permitted; adding a third unique frequency >112.5 MHz (e.g., 150 MHz on CLK2) violates the specification. Duplicate frequencies (e.g., 125 MHz on CLK0–CLK3) are unrestricted.
What crystal specifications are required for reliable operation of SI5351A-B05945-GT?
SI5351A-B05945-GT requires a fundamental-mode AT-cut crystal at either 25 MHz or 27 MHz, with load capacitance of 6–12 pF and ESR ≤150 Ω. Skyworks recommends crystals rated for 100 µW max drive level. Internal load capacitance (0/6/8/10 pF) is selectable via register 183; crystals requiring 12 pF load use internal 10 pF plus ≤2 pF external capacitance.
Is SI5351A-B05945-GT pin-compatible with other Si5351 variants like Si5351B or Si5351C?
No - SI5351A-B05945-GT is not pin-compatible with Si5351B or Si5351C variants. While all share the same 20-QFN mechanical outline, the VC pin (pin 12) on Si5351B and CLKIN pin (pin 11) on Si5351C are NC (no-connect) on SI5351A-B05945-GT. Using a Si5351B/C PCB layout with SI5351A-B05945-GT requires verification that those pins are left unconnected or tied appropriately per the A version's pinout table.
SI5351A-B05945-GT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- *
- Package/Case:
- -
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- -
- PLL:
- -
- Input:
- -
- Output:
- -
- Number of Circuits:
- -
- Ratio - Input:Output:
- -
- Differential - Input:Output:
- -
- Frequency - Max:
- -
- Divider/Multiplier:
- -
- Voltage - Supply:
- -
- Operating Temperature:
- -
- Mounting Type:
- -
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- -
SI5351A-B05945-GT FAQ
1.How can I place an order for SI5351A-B05945-GT through Aetrix?
Please submit a Request for Quotation (RFQ) for SI5351A-B05945-GT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI5351A-B05945-GT reliable?
The price and inventory of SI5351A-B05945-GT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5351A-B05945-GT is usually 5 days.
3.What payment methods are accepted for SI5351A-B05945-GT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5351A-B05945-GT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI5351A-B05945-GT?
SI5351A-B05945-GT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI5351A-B05945-GT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI5351A-B05945-GT?
For technical support, including SI5351A-B05945-GT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5351A-B05945-GT requirements.
6.How does Aetrix verify that SI5351A-B05945-GT is sourced from the original manufacturer or authorized distributors?
All SI5351A-B05945-GT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5351A-B05945-GT meets industry standards.
7.What is the process for return or replacement of SI5351A-B05945-GT?
All SI5351A-B05945-GT units undergo pre-shipment inspection (PSI). If there is an issue with SI5351A-B05945-GT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI5351A-B05945-GT part is unused and in its original packaging.
Return procedure for SI5351A-B05945-GT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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