Skyworks Solutions Inc. SI5351B-B04480-GM
- Part No.:
- SI5351B-B04480-GM
- Manufacturer:
- Skyworks Solutions Inc.
- Package:
- -
- Datasheet:
-
SI5351B-B04480-GM.pdf
- Description:
- I2C PROG, ANY FREQUENCY, ANY OUT
- Quantity:
- Payment:

- Shipping:

Inventory:4,450
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SI5351B-B04480-GM from Skyworks Solutions is an I²C-programmable 8-output CMOS clock generator with integrated VCXO, designed to replace crystals, crystal oscillators, and voltage-controlled oscillators in cost-sensitive embedded timing applications. It delivers up to eight independent frequencies from 2.5 kHz to 200 MHz per output with 0 ppm synthesis error, supports 1.8/2.5/3.3 V output voltage levels, and operates from a 25 or 27 MHz fixed-frequency crystal.
For engineers reviewing the SI5351B-B04480-GM datasheet, SI5351B-B04480-GM pinout, SI5351B-B04480-GM application, or SI5351B-B04480-GM equivalent, key selection considerations include its VCXO tuning range (±240 ppm at 3.3 V), low period jitter (< 70 ps pk-pk), I²C configurability, and 20-pin QFN (4×4 mm) package with independent VDDO supply pins for level translation.
Technical Context
The SI5351B-B04480-GM implements a dual-PLL architecture: PLL A accepts either the internal crystal oscillator or external CLKIN (10–100 MHz), while PLL B functions as a highly linear VCXO locked to the same crystal reference. Both PLLs feed eight independent MultiSynth fractional dividers, enabling non-integer-related output frequencies.
It features configurable spread spectrum (±0.1% to ±1.5%), static phase offset control, glitchless frequency transitions, and programmable rise/fall times. The VC pin accepts 0–VDD control voltage with 18–150 ppm/V gain and ±5% linearity over 10–90% of VDD, supporting synchronous multi-output tuning without external varactors.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Outputs | 8 independent CMOS clock outputs (CLK0–CLK7) |
| Frequency Range | 2.5 kHz to 200 MHz per output; only two unique frequencies >112.5 MHz simultaneously |
| VCXO Pull Range | Configurable ±30 to ±240 ppm at 3.3 V core supply |
| Period Jitter | < 70 ps pk-pk (typical, all outputs active, default drive strength) |
| Output Voltage Levels | VDDOx independently configurable for 1.8 V, 2.5 V, or 3.3 V per bank |
| Crystal Reference | 25 MHz or 27 MHz AT-cut crystal; internal load capacitance options (0/6/8/10 pF) |
| I²C Interface | Standard/Fast mode (100/400 kbps); supports register-based configuration and real-time reprogramming |
Pinout & Package
SI5351B-B04480-GM is housed in a 20-pin QFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are defined per Si5351B 20-pin QFN layout (document revision 1.3, Section 10.2).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| XA, XB | Crystal oscillator input | Connects to 25/27 MHz AT-cut crystal; internal load caps selectable via register 183 |
| VC | VCXO control voltage input | Accepts 0–VDD analog tuning voltage; enables synchronized frequency pulling across all outputs |
| SCL, SDA | I²C serial interface | Two-wire bus for configuration, status readback, and dynamic frequency updates |
| OEB | Output enable bar | Active-low global output disable; allows hardware-controlled clock gating without I²C traffic |
| CLK0–CLK7 | CMOS clock outputs | Eight buffered outputs with independent MultiSynth dividers and VDDOx supply pins |
| VDDOA–VDDOD | Output buffer supply rails | Four independent 1.8/2.5/3.3 V supplies for output banks (A/B/C/D), enabling mixed-voltage system interfacing |
| VDD | Core logic supply | 2.25–2.75 V or 3.0–3.6 V; must power up before or concurrently with all VDDOx rails |
Key Features
| Feature | Design Value |
|---|---|
| VCXO integration | Eliminates need for external pullable crystal or varactor diode; enables single-control-voltage multi-output synchronization |
| MultiSynth fractional synthesis | Generates exact frequencies (0 ppm error) across 2.5 kHz–200 MHz without external PLL components |
| Independent VDDO rails | Four dedicated output supply pins allow simultaneous 1.8 V, 2.5 V, and 3.3 V clock outputs for mixed-signal SoC interfacing |
| Glitchless frequency switching | Enables runtime clock reconfiguration (e.g., CPU DVFS, display refresh rate changes) without output glitches or phase discontinuities |
| Configurable spread spectrum | Reduces EMI by applying selectable down-spread (–0.1% to –2.5%) or center-spread (±0.1% to ±1.5%) modulation per output |
Applications
| Audio/Video Timing | Networking Equipment |
|---|---|
Use Scenario: Generating precise pixel clocks (e.g., 74.25 MHz), audio sample rates (24.576 MHz), and HDMI TMDS clocks in set-top boxes and AV receivers. IC Role / Device Role / Timing Role: Primary multi-domain clock source replacing discrete crystal oscillators and fanout buffers. Use Value: Eliminates four separate oscillators; reduces board space and BOM count while maintaining <70 ps jitter for clean video/audio signal integrity. | Use Scenario: Providing synchronous Ethernet PHY clocks (25 MHz, 125 MHz), PCIe Gen1 reference (100 MHz), and management controller clocks in residential gateways and switches. IC Role / Device Role / Timing Role: Configurable clock generator with VCXO support for frequency stability under temperature variation and EMI constraints. Use Value: Enables single-device clock tree with ±240 ppm VCXO tuning margin for IEEE 1588 PTP compliance and robust link lock. |
| Industrial Instrumentation | Laser Rangefinding Systems |
Use Scenario: Supplying timebase clocks for ADC sampling (e.g., 28.322 MHz), FPGA logic clocks (33.333 MHz), and display controllers in handheld test equipment. IC Role / Device Role / Timing Role: Low-power, I²C-reconfigurable clock source supporting battery-operated portable instrumentation. Use Value: 22–45 mA core current (depending on active outputs) and programmable drive strength reduce power consumption vs. discrete oscillator solutions. | Use Scenario: Delivering high-stability trigger and sampling clocks (e.g., 125 MHz, 48 MHz) for time-of-flight measurement in laser distance meters. IC Role / Device Role / Timing Role: VCXO-based clock generator providing low-jitter timing critical for sub-nanosecond time resolution. Use Value: <70 ps period jitter and ±5% VCXO linearity ensure consistent pulse timing accuracy across operating temperature (–40°C to +85°C). |
Equivalent & Alternatives
The following parts are listed as comparable options for similar clock generator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si5351C-B-GM | Replaces VC input with external CLKIN (10–100 MHz); no VCXO capability | Suitable when a stable external reference clock is available instead of crystal + VC tuning | Select for synchronous clock distribution where external master clock exists and VCXO flexibility is unnecessary |
| Si5351A-B-GM | No VC pin or VCXO circuitry; free-running only from crystal reference | Lower-cost option for fixed-frequency, non-tunable clock generation | Choose when tuning range is not required and design uses only crystal-based free-running clocks |
Compared with SI5351C-B-GM and SI5351A-B-GM, the SI5351B-B04480-GM uniquely provides integrated VCXO functionality-enabling voltage-controlled frequency pulling across all eight outputs using a single analog control signal-making it the only choice among the three for designs requiring tunable, crystal-referenced synchronization without external components.
Availability
SI5351B-B04480-GM is available at Aetrix Electronics and suitable for networking equipment, industrial instrumentation, audio/video timing systems, and laser rangefinding applications requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for SI5351B-B04480-GM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Skyworks Solutions is a global semiconductor company specializing in analog and mixed-signal connectivity solutions, with leadership in RF, timing, and precision analog products.
The SI5351B-B04480-GM belongs to Skyworks' Si5351 family of I²C-programmable clock generators, engineered to simplify timing architecture in cost-sensitive, space-constrained embedded systems by consolidating multiple oscillators and PLLs into a single configurable IC.
FAQ
What is the maximum number of unique frequencies above 112.5 MHz that SI5351B-B04480-GM can generate simultaneously?
The SI5351B-B04480-GM supports only two unique frequencies above 112.5 MHz at any time-for example, 125 MHz and 130 MHz-but allows duplication of those frequencies across multiple outputs (e.g., 125 MHz on CLK0–CLK3 and 130 MHz on CLK4–CLK7). This constraint arises from internal PLL bandwidth and MultiSynth divider resource allocation within the device's synthesis architecture.
Does SI5351B-B04480-GM require external load capacitors for the 25 MHz crystal?
SI5351B-B04480-GM includes programmable internal load capacitance (0, 6, 8, or 10 pF) and typically does not require external load capacitors for standard 6–10 pF crystals. For 12 pF crystals, ≤2 pF additional external capacitance (e.g., 4 pF total across XA/XB) may be added per AN551 guidelines-but this is optional and application-dependent.
Can SI5351B-B04480-GM operate with different output voltage levels on different clock banks?
Yes. SI5351B-B04480-GM has four independent VDDO supply pins (VDDOA–VDDOD), each powering a pair of outputs (CLK0/CLK1, CLK2/CLK3, etc.). Each VDDO rail can be set to 1.8 V, 2.5 V, or 3.3 V, allowing mixed-voltage clock distribution-for instance, 1.8 V for FPGA I/O banks and 3.3 V for legacy peripherals-without level shifters.
What is the guaranteed VCXO linearity specification for SI5351B-B04480-GM?
The SI5351B-B04480-GM guarantees ±5% VCXO control voltage linearity (KVL) over the 10–90% VDD range, as specified in Table 5 of the datasheet. This ensures predictable, monotonic frequency response to analog tuning voltage, critical for closed-loop systems like PLLs or precision frequency calibration circuits.
Is SI5351B-B04480-GM pin-compatible with other Si5351 variants in the 20-QFN package?
Yes. All Si5351A/B/C variants in the 20-pin QFN (4×4 mm) package-including SI5351B-B04480-GM-share identical pinouts and footprint per Section 10.2 of the datasheet. However, functional differences exist: only Si5351B exposes the VC pin for VCXO operation, and only Si5351C connects CLKIN; unused pins (e.g., CLKIN on SI5351B) must remain unconnected or tied appropriately per design requirements.
SI5351B-B04480-GM Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Skyworks Solutions Inc.
- Series:
- *
- Package/Case:
- -
- Packaging:
- Strip
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- -
- PLL:
- -
- Input:
- -
- Output:
- -
- Number of Circuits:
- -
- Ratio - Input:Output:
- -
- Differential - Input:Output:
- -
- Frequency - Max:
- -
- Divider/Multiplier:
- -
- Voltage - Supply:
- -
- Operating Temperature:
- -
- Mounting Type:
- -
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- -
SI5351B-B04480-GM FAQ
1.How can I place an order for SI5351B-B04480-GM through Aetrix?
Please submit a Request for Quotation (RFQ) for SI5351B-B04480-GM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SI5351B-B04480-GM reliable?
The price and inventory of SI5351B-B04480-GM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SI5351B-B04480-GM is usually 5 days.
3.What payment methods are accepted for SI5351B-B04480-GM?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SI5351B-B04480-GM transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SI5351B-B04480-GM?
SI5351B-B04480-GM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SI5351B-B04480-GM order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SI5351B-B04480-GM?
For technical support, including SI5351B-B04480-GM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SI5351B-B04480-GM requirements.
6.How does Aetrix verify that SI5351B-B04480-GM is sourced from the original manufacturer or authorized distributors?
All SI5351B-B04480-GM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SI5351B-B04480-GM meets industry standards.
7.What is the process for return or replacement of SI5351B-B04480-GM?
All SI5351B-B04480-GM units undergo pre-shipment inspection (PSI). If there is an issue with SI5351B-B04480-GM, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SI5351B-B04480-GM part is unused and in its original packaging.
Return procedure for SI5351B-B04480-GM:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SI5351B-B04480-GM Tags
-
CD74HCT4046AM96
Texas Instruments

-
MC14046BDWR2G
onsemi

-
501MILFT
Renesas
-
CD74HC7046AM
Texas Instruments
-
CDCVF2505PWR
Texas Instruments

-
RC19004A100GNL#KB0
Renesas
-
SI5351A-B-GTR
Skyworks Solutions Inc.

-
CY2305SXI-1T
Infineon Technologies

-
570BILFT
Renesas

-
CDCE913PWR
Texas Instruments

-
CY2305SXI-1HT
Infineon Technologies

-
DS1086LU+T
Analog Devices Inc./Maxim Integrated
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
